vr.c revision 1.23 1 1.23 enami /* $NetBSD: vr.c,v 1.23 2001/05/17 06:00:22 enami Exp $ */
2 1.1 takemura
3 1.1 takemura /*-
4 1.1 takemura * Copyright (c) 1999
5 1.1 takemura * Shin Takemura and PocketBSD Project. All rights reserved.
6 1.1 takemura *
7 1.1 takemura * Redistribution and use in source and binary forms, with or without
8 1.1 takemura * modification, are permitted provided that the following conditions
9 1.1 takemura * are met:
10 1.1 takemura * 1. Redistributions of source code must retain the above copyright
11 1.1 takemura * notice, this list of conditions and the following disclaimer.
12 1.1 takemura * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 takemura * notice, this list of conditions and the following disclaimer in the
14 1.1 takemura * documentation and/or other materials provided with the distribution.
15 1.1 takemura * 3. All advertising materials mentioning features or use of this software
16 1.1 takemura * must display the following acknowledgement:
17 1.1 takemura * This product includes software developed by the PocketBSD project
18 1.1 takemura * and its contributors.
19 1.1 takemura * 4. Neither the name of the project nor the names of its contributors
20 1.1 takemura * may be used to endorse or promote products derived from this software
21 1.1 takemura * without specific prior written permission.
22 1.1 takemura *
23 1.1 takemura * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 1.1 takemura * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 1.1 takemura * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 1.1 takemura * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 1.1 takemura * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 1.1 takemura * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 1.1 takemura * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 1.1 takemura * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 1.1 takemura * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 1.1 takemura * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 1.1 takemura * SUCH DAMAGE.
34 1.1 takemura *
35 1.1 takemura */
36 1.1 takemura #include <sys/param.h>
37 1.1 takemura #include <sys/types.h>
38 1.1 takemura #include <sys/systm.h>
39 1.1 takemura #include <sys/device.h>
40 1.5 takemura #include <sys/reboot.h>
41 1.13 shin #include <sys/kcore.h>
42 1.1 takemura
43 1.1 takemura #include <machine/cpu.h>
44 1.1 takemura #include <machine/intr.h>
45 1.1 takemura #include <machine/reg.h>
46 1.1 takemura #include <machine/psl.h>
47 1.1 takemura #include <machine/locore.h>
48 1.1 takemura #include <machine/sysconf.h>
49 1.1 takemura #include <machine/bus.h>
50 1.1 takemura #include <machine/autoconf.h>
51 1.1 takemura
52 1.1 takemura #include <mips/mips_param.h> /* hokey spl()s */
53 1.1 takemura #include <mips/mips/mips_mcclock.h> /* mcclock CPUspeed estimation */
54 1.1 takemura
55 1.22 sato #include "opt_vr41xx.h"
56 1.1 takemura #include <hpcmips/vr/vr.h>
57 1.11 takemura #include <hpcmips/vr/vr_asm.h>
58 1.22 sato #include <hpcmips/vr/vrcpudef.h>
59 1.3 takemura #include <hpcmips/vr/vripreg.h>
60 1.1 takemura #include <hpcmips/vr/rtcreg.h>
61 1.12 sato #include <hpcmips/hpcmips/machdep.h> /* cpu_name */
62 1.1 takemura #include <machine/bootinfo.h>
63 1.1 takemura
64 1.8 takemura #include "vrip.h"
65 1.8 takemura #if NVRIP > 0
66 1.8 takemura #include <hpcmips/vr/vripvar.h>
67 1.8 takemura #endif
68 1.8 takemura
69 1.9 sato #include "vrbcu.h"
70 1.9 sato #if NVRBCU > 0
71 1.9 sato #include <hpcmips/vr/bcuvar.h>
72 1.9 sato #endif
73 1.9 sato
74 1.5 takemura #include "vrdsu.h"
75 1.5 takemura #if NVRDSU > 0
76 1.5 takemura #include <hpcmips/vr/vrdsuvar.h>
77 1.5 takemura #endif
78 1.5 takemura
79 1.1 takemura #include "com.h"
80 1.1 takemura #if NCOM > 0
81 1.1 takemura #include <sys/termios.h>
82 1.1 takemura #include <sys/ttydefaults.h>
83 1.1 takemura #include <dev/ic/comreg.h>
84 1.1 takemura #include <dev/ic/comvar.h>
85 1.1 takemura #include <hpcmips/vr/siureg.h>
86 1.1 takemura #include <hpcmips/vr/com_vripvar.h>
87 1.1 takemura #ifndef CONSPEED
88 1.1 takemura #define CONSPEED TTYDEF_SPEED
89 1.1 takemura #endif
90 1.1 takemura #endif
91 1.1 takemura
92 1.15 takemura #include "hpcfb.h"
93 1.3 takemura #include "vrkiu.h"
94 1.15 takemura #if NVRKIU > 0
95 1.3 takemura #include <dev/wscons/wsdisplayvar.h>
96 1.15 takemura #include <dev/rasops/rasops.h>
97 1.3 takemura #endif
98 1.3 takemura
99 1.15 takemura #if NHPCFB > 0
100 1.20 uch #include <dev/hpc/hpcfbvar.h>
101 1.3 takemura #endif
102 1.3 takemura
103 1.15 takemura #if NVRKIU > 0
104 1.3 takemura #include <arch/hpcmips/vr/vrkiuvar.h>
105 1.3 takemura #endif
106 1.3 takemura
107 1.1 takemura void vr_init __P((void));
108 1.1 takemura void vr_os_init __P((void));
109 1.1 takemura void vr_bus_reset __P((void));
110 1.16 uch int vr_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t));
111 1.1 takemura void vr_cons_init __P((void));
112 1.1 takemura void vr_device_register __P((struct device *, void *));
113 1.4 uch void vr_fb_init __P((caddr_t*));
114 1.13 shin void vr_mem_init __P((paddr_t));
115 1.13 shin void vr_find_dram __P((paddr_t, paddr_t));
116 1.5 takemura void vr_reboot __P((int howto, char *bootstr));
117 1.1 takemura
118 1.1 takemura extern unsigned nullclkread __P((void));
119 1.1 takemura extern unsigned (*clkread) __P((void));
120 1.1 takemura
121 1.1 takemura /*
122 1.1 takemura * CPU interrupt dispatch table (HwInt[0:3])
123 1.1 takemura */
124 1.1 takemura int null_handler __P((void*, u_int32_t, u_int32_t));
125 1.1 takemura static int (*intr_handler[4]) __P((void*, u_int32_t, u_int32_t)) =
126 1.1 takemura {
127 1.1 takemura null_handler,
128 1.1 takemura null_handler,
129 1.1 takemura null_handler,
130 1.1 takemura null_handler
131 1.1 takemura };
132 1.1 takemura static void *intr_arg[4];
133 1.1 takemura
134 1.13 shin extern phys_ram_seg_t mem_clusters[];
135 1.13 shin extern int mem_cluster_cnt;
136 1.13 shin
137 1.1 takemura void
138 1.1 takemura vr_init()
139 1.1 takemura {
140 1.1 takemura /*
141 1.1 takemura * Platform Information.
142 1.1 takemura */
143 1.1 takemura
144 1.1 takemura /*
145 1.1 takemura * Platform Specific Function Hooks
146 1.1 takemura */
147 1.1 takemura platform.os_init = vr_os_init;
148 1.16 uch platform.iointr = vr_intr;
149 1.1 takemura platform.bus_reset = vr_bus_reset;
150 1.1 takemura platform.cons_init = vr_cons_init;
151 1.1 takemura platform.device_register = vr_device_register;
152 1.4 uch platform.fb_init = vr_fb_init;
153 1.4 uch platform.mem_init = vr_mem_init;
154 1.5 takemura platform.reboot = vr_reboot;
155 1.1 takemura
156 1.9 sato #if NVRBCU > 0
157 1.12 sato sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
158 1.1 takemura vrbcu_vrip_getcpuname(),
159 1.1 takemura vrbcu_vrip_getcpumajor(),
160 1.10 shin vrbcu_vrip_getcpuminor(),
161 1.10 shin vrbcu_vrip_getcpuclock() / 1000000,
162 1.10 shin (vrbcu_vrip_getcpuclock() % 1000000) / 1000);
163 1.9 sato #else
164 1.12 sato sprintf(cpu_name, "NEC VR41xx");
165 1.9 sato #endif
166 1.4 uch }
167 1.4 uch
168 1.13 shin void
169 1.4 uch vr_mem_init(kernend)
170 1.13 shin paddr_t kernend;
171 1.4 uch {
172 1.13 shin mem_clusters[0].start = 0;
173 1.13 shin mem_clusters[0].size = kernend;
174 1.13 shin mem_cluster_cnt = 1;
175 1.13 shin vr_find_dram(kernend, 0x02000000);
176 1.13 shin vr_find_dram(0x02000000, 0x04000000);
177 1.13 shin vr_find_dram(0x04000000, 0x06000000);
178 1.13 shin vr_find_dram(0x06000000, 0x08000000);
179 1.13 shin
180 1.13 shin /* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/
181 1.13 shin memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF - (KERNBASE + 0x800));
182 1.13 shin }
183 1.13 shin
184 1.13 shin void
185 1.13 shin vr_find_dram(addr, end)
186 1.13 shin paddr_t addr, end;
187 1.13 shin {
188 1.13 shin int n;
189 1.13 shin caddr_t page;
190 1.13 shin #ifdef NARLY_MEMORY_PROBE
191 1.13 shin int x, i;
192 1.13 shin #endif
193 1.13 shin
194 1.13 shin n = mem_cluster_cnt;
195 1.13 shin for (; addr < end; addr += NBPG) {
196 1.13 shin
197 1.13 shin page = (void *)MIPS_PHYS_TO_KSEG1(addr);
198 1.13 shin if (badaddr(page, 4))
199 1.13 shin goto bad;
200 1.14 shin
201 1.14 shin /* stop memory probing at first memory image */
202 1.14 shin if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
203 1.14 shin return;
204 1.13 shin
205 1.13 shin *(volatile int *)(page+0) = 0xa5a5a5a5;
206 1.13 shin *(volatile int *)(page+4) = 0x5a5a5a5a;
207 1.13 shin wbflush();
208 1.13 shin if (*(volatile int *)(page+0) != 0xa5a5a5a5)
209 1.13 shin goto bad;
210 1.13 shin
211 1.13 shin *(volatile int *)(page+0) = 0x5a5a5a5a;
212 1.13 shin *(volatile int *)(page+4) = 0xa5a5a5a5;
213 1.13 shin wbflush();
214 1.13 shin if (*(volatile int *)(page+0) != 0x5a5a5a5a)
215 1.13 shin goto bad;
216 1.13 shin
217 1.13 shin #ifdef NARLY_MEMORY_PROBE
218 1.13 shin x = random();
219 1.13 shin for (i = 0; i < NBPG; i += 4)
220 1.13 shin *(volatile int *)(page+i) = (x ^ i);
221 1.4 uch wbflush();
222 1.13 shin for (i = 0; i < NBPG; i += 4)
223 1.13 shin if (*(volatile int *)(page+i) != (x ^ i))
224 1.13 shin goto bad;
225 1.13 shin
226 1.13 shin x = random();
227 1.13 shin for (i = 0; i < NBPG; i += 4)
228 1.13 shin *(volatile int *)(page+i) = (x ^ i);
229 1.13 shin wbflush();
230 1.13 shin for (i = 0; i < NBPG; i += 4)
231 1.13 shin if (*(volatile int *)(page+i) != (x ^ i))
232 1.13 shin goto bad;
233 1.13 shin #endif
234 1.13 shin
235 1.13 shin if (!mem_clusters[n].size)
236 1.13 shin mem_clusters[n].start = addr;
237 1.13 shin mem_clusters[n].size += NBPG;
238 1.13 shin continue;
239 1.13 shin
240 1.13 shin bad:
241 1.13 shin if (mem_clusters[n].size)
242 1.13 shin ++n;
243 1.13 shin continue;
244 1.4 uch }
245 1.13 shin if (mem_clusters[n].size)
246 1.13 shin ++n;
247 1.13 shin mem_cluster_cnt = n;
248 1.4 uch }
249 1.4 uch
250 1.4 uch void
251 1.4 uch vr_fb_init(kernend)
252 1.4 uch caddr_t *kernend;
253 1.4 uch {
254 1.4 uch /* Nothing to do */
255 1.1 takemura }
256 1.1 takemura
257 1.1 takemura void
258 1.1 takemura vr_os_init()
259 1.1 takemura {
260 1.1 takemura /*
261 1.1 takemura * Set up interrupt handling and I/O addresses.
262 1.1 takemura */
263 1.1 takemura
264 1.1 takemura splvec.splbio = MIPS_SPL0;
265 1.1 takemura splvec.splnet = MIPS_SPL0;
266 1.1 takemura splvec.spltty = MIPS_SPL0;
267 1.21 thorpej splvec.splvm = MIPS_SPL0;
268 1.1 takemura splvec.splclock = MIPS_SPL_0_1;
269 1.1 takemura splvec.splstatclock = MIPS_SPL_0_1;
270 1.1 takemura
271 1.1 takemura /* no high resolution timer circuit; possibly never called */
272 1.1 takemura clkread = nullclkread;
273 1.1 takemura
274 1.1 takemura #ifdef NOT_YET
275 1.1 takemura mcclock_addr = (volatile struct chiptime *)
276 1.1 takemura MIPS_PHYS_TO_KSEG1(Vr_SYS_CLOCK);
277 1.1 takemura mc_cpuspeed(mcclock_addr, MIPS_INT_MASK_1);
278 1.1 takemura #else
279 1.1 takemura printf("%s(%d): cpuspeed estimation is notimplemented\n",
280 1.1 takemura __FILE__, __LINE__);
281 1.1 takemura #endif
282 1.1 takemura #ifdef HPCMIPS_L1CACHE_DISABLE
283 1.1 takemura cpuspeed = 1; /* XXX, CPU is very very slow because L1 cache is */
284 1.1 takemura /* disabled. */
285 1.1 takemura #endif /* HPCMIPS_L1CAHCE_DISABLE */
286 1.1 takemura }
287 1.1 takemura
288 1.1 takemura
289 1.1 takemura /*
290 1.1 takemura * Initalize the memory system and I/O buses.
291 1.1 takemura */
292 1.1 takemura void
293 1.1 takemura vr_bus_reset()
294 1.1 takemura {
295 1.1 takemura printf("%s(%d): vr_bus_reset() not implemented.\n",
296 1.1 takemura __FILE__, __LINE__);
297 1.1 takemura }
298 1.1 takemura
299 1.1 takemura void
300 1.1 takemura vr_cons_init()
301 1.1 takemura {
302 1.15 takemura #if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0
303 1.1 takemura extern bus_space_tag_t system_bus_iot;
304 1.1 takemura extern bus_space_tag_t mb_bus_space_init __P((void));
305 1.19 takemura
306 1.19 takemura /*
307 1.19 takemura * At this time, system_bus_iot is not initialized yet.
308 1.19 takemura * Just initialize it here.
309 1.19 takemura */
310 1.19 takemura mb_bus_space_init();
311 1.1 takemura #endif
312 1.1 takemura
313 1.1 takemura #if NCOM > 0
314 1.18 jeffs #ifdef KGDB
315 1.18 jeffs /* if KGDB is defined, always use the serial port for KGDB */
316 1.23 enami if (com_vrip_cndb_attach(system_bus_iot, VRIP_SIU_ADDR, 9600,
317 1.23 enami VRCOM_FREQ, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
318 1.18 jeffs printf("%s(%d): can't init kgdb's serial port",
319 1.23 enami __FILE__, __LINE__);
320 1.18 jeffs }
321 1.18 jeffs #else
322 1.1 takemura if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
323 1.1 takemura /* Serial console */
324 1.23 enami if (com_vrip_cndb_attach(system_bus_iot,
325 1.23 enami VRIP_SIU_ADDR, CONSPEED, VRCOM_FREQ,
326 1.23 enami (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) {
327 1.23 enami printf("%s(%d): can't init serial console",
328 1.23 enami __FILE__, __LINE__);
329 1.1 takemura } else {
330 1.1 takemura return;
331 1.1 takemura }
332 1.1 takemura }
333 1.18 jeffs #endif
334 1.1 takemura #endif
335 1.1 takemura
336 1.15 takemura #if NHPCFB > 0
337 1.17 uch if (hpcfb_cnattach(NULL)) {
338 1.3 takemura printf("%s(%d): can't init fb console", __FILE__, __LINE__);
339 1.3 takemura } else {
340 1.3 takemura goto find_keyboard;
341 1.3 takemura }
342 1.3 takemura #endif
343 1.3 takemura
344 1.3 takemura find_keyboard:
345 1.22 sato #if NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR
346 1.3 takemura if (vrkiu_cnattach(system_bus_iot, VRIP_KIU_ADDR)) {
347 1.3 takemura printf("%s(%d): can't init vrkiu as console",
348 1.3 takemura __FILE__, __LINE__);
349 1.3 takemura } else {
350 1.3 takemura return;
351 1.3 takemura }
352 1.3 takemura #endif
353 1.1 takemura }
354 1.1 takemura
355 1.1 takemura void
356 1.1 takemura vr_device_register(dev, aux)
357 1.1 takemura struct device *dev;
358 1.1 takemura void *aux;
359 1.1 takemura {
360 1.2 shin printf("%s(%d): vr_device_register() not implemented.\n",
361 1.1 takemura __FILE__, __LINE__);
362 1.1 takemura panic("abort");
363 1.5 takemura }
364 1.5 takemura
365 1.5 takemura void
366 1.5 takemura vr_reboot(howto, bootstr)
367 1.5 takemura int howto;
368 1.5 takemura char *bootstr;
369 1.5 takemura {
370 1.7 takemura /*
371 1.7 takemura * power down
372 1.7 takemura */
373 1.7 takemura if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
374 1.7 takemura printf("fake powerdown\n");
375 1.7 takemura __asm(__CONCAT(".word ",___STRING(VR_OPCODE_HIBERNATE)));
376 1.7 takemura __asm("nop");
377 1.7 takemura __asm("nop");
378 1.7 takemura __asm("nop");
379 1.7 takemura __asm("nop");
380 1.7 takemura __asm("nop");
381 1.7 takemura __asm(".set reorder");
382 1.7 takemura /* not reach */
383 1.7 takemura vr_reboot(howto&~RB_HALT, bootstr);
384 1.7 takemura }
385 1.7 takemura /*
386 1.8 takemura * halt
387 1.7 takemura */
388 1.8 takemura if (howto & RB_HALT) {
389 1.8 takemura #if NVRIP > 0
390 1.8 takemura _spllower(~MIPS_INT_MASK_0);
391 1.8 takemura vrip_intr_suspend();
392 1.5 takemura #else
393 1.8 takemura splhigh();
394 1.5 takemura #endif
395 1.7 takemura __asm(".set noreorder");
396 1.7 takemura __asm(__CONCAT(".word ",___STRING(VR_OPCODE_SUSPEND)));
397 1.6 sato __asm("nop");
398 1.6 sato __asm("nop");
399 1.6 sato __asm("nop");
400 1.6 sato __asm("nop");
401 1.6 sato __asm("nop");
402 1.7 takemura __asm(".set reorder");
403 1.8 takemura #if NVRIP > 0
404 1.8 takemura vrip_intr_resume();
405 1.8 takemura #endif
406 1.6 sato }
407 1.8 takemura /*
408 1.8 takemura * reset
409 1.8 takemura */
410 1.8 takemura #if NVRDSU
411 1.8 takemura vrdsu_reset();
412 1.8 takemura #else
413 1.8 takemura printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
414 1.8 takemura #endif
415 1.1 takemura }
416 1.1 takemura
417 1.1 takemura void *
418 1.1 takemura vr_intr_establish(line, ih_fun, ih_arg)
419 1.1 takemura int line;
420 1.1 takemura int (*ih_fun) __P((void*, u_int32_t, u_int32_t));
421 1.1 takemura void *ih_arg;
422 1.1 takemura {
423 1.1 takemura if (intr_handler[line] != null_handler) {
424 1.1 takemura panic("vr_intr_establish: can't establish duplicated intr handler.");
425 1.1 takemura }
426 1.1 takemura intr_handler[line] = ih_fun;
427 1.1 takemura intr_arg[line] = ih_arg;
428 1.1 takemura
429 1.1 takemura return (void*)line;
430 1.1 takemura }
431 1.1 takemura
432 1.1 takemura
433 1.1 takemura void
434 1.1 takemura vr_intr_disestablish(ih)
435 1.1 takemura void *ih;
436 1.1 takemura {
437 1.1 takemura int line = (int)ih;
438 1.1 takemura intr_handler[line] = null_handler;
439 1.1 takemura intr_arg[line] = NULL;
440 1.1 takemura }
441 1.1 takemura
442 1.1 takemura int
443 1.1 takemura null_handler(arg, pc, statusReg)
444 1.1 takemura void *arg;
445 1.1 takemura u_int32_t pc;
446 1.1 takemura u_int32_t statusReg;
447 1.1 takemura {
448 1.1 takemura printf("null_handler\n");
449 1.1 takemura return 0;
450 1.1 takemura }
451 1.1 takemura
452 1.1 takemura /*
453 1.1 takemura * Handle interrupts.
454 1.1 takemura */
455 1.1 takemura int
456 1.16 uch vr_intr(status, cause, pc, ipending)
457 1.16 uch u_int32_t status, cause, pc, ipending;
458 1.1 takemura {
459 1.1 takemura int hwintr;
460 1.1 takemura
461 1.16 uch hwintr = (ffs(ipending >> 10) -1) & 0x3;
462 1.1 takemura (*intr_handler[hwintr])(intr_arg[hwintr], pc, status);
463 1.16 uch
464 1.1 takemura return (MIPS_SR_INT_IE | (status & ~cause & MIPS_HARD_INT_MASK));
465 1.1 takemura }
466 1.22 sato
467 1.22 sato
468 1.22 sato /*
469 1.22 sato int x4181 = VR4181;
470 1.22 sato int x4101 = VR4101;
471 1.22 sato int x4102 = VR4102;
472 1.22 sato int x4111 = VR4111;
473 1.22 sato int x4121 = VR4121;
474 1.22 sato int x4122 = VR4122;
475 1.22 sato int xo4181 = ONLY_VR4181;
476 1.22 sato int xo4101 = ONLY_VR4101;
477 1.22 sato int xo4102 = ONLY_VR4102;
478 1.22 sato int xo4111_4121 = ONLY_VR4111_4121;
479 1.22 sato int g4101=VRGROUP_4101;
480 1.22 sato int g4102=VRGROUP_4102;
481 1.22 sato int g4181=VRGROUP_4181;
482 1.22 sato int g4102_4121=VRGROUP_4102_4121;
483 1.22 sato int g4111_4121=VRGROUP_4111_4121;
484 1.22 sato int g4102_4122=VRGROUP_4102_4122;
485 1.22 sato int g4111_4122=VRGROUP_4111_4122;
486 1.22 sato int single_vrip_base=SINGLE_VRIP_BASE;
487 1.22 sato int vrip_base_addr=VRIP_BASE_ADDR;
488 1.22 sato */
489