vr.c revision 1.32 1 1.32 takemura /* $NetBSD: vr.c,v 1.32 2001/11/18 08:19:41 takemura Exp $ */
2 1.1 takemura
3 1.1 takemura /*-
4 1.31 uch * Copyright (c) 1999-2001
5 1.1 takemura * Shin Takemura and PocketBSD Project. All rights reserved.
6 1.1 takemura *
7 1.1 takemura * Redistribution and use in source and binary forms, with or without
8 1.1 takemura * modification, are permitted provided that the following conditions
9 1.1 takemura * are met:
10 1.1 takemura * 1. Redistributions of source code must retain the above copyright
11 1.1 takemura * notice, this list of conditions and the following disclaimer.
12 1.1 takemura * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 takemura * notice, this list of conditions and the following disclaimer in the
14 1.1 takemura * documentation and/or other materials provided with the distribution.
15 1.1 takemura * 3. All advertising materials mentioning features or use of this software
16 1.1 takemura * must display the following acknowledgement:
17 1.1 takemura * This product includes software developed by the PocketBSD project
18 1.1 takemura * and its contributors.
19 1.1 takemura * 4. Neither the name of the project nor the names of its contributors
20 1.1 takemura * may be used to endorse or promote products derived from this software
21 1.1 takemura * without specific prior written permission.
22 1.1 takemura *
23 1.1 takemura * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 1.1 takemura * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 1.1 takemura * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 1.1 takemura * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 1.1 takemura * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 1.1 takemura * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 1.1 takemura * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 1.1 takemura * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 1.1 takemura * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 1.1 takemura * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 1.1 takemura * SUCH DAMAGE.
34 1.1 takemura *
35 1.1 takemura */
36 1.29 uch
37 1.29 uch #include "opt_vr41xx.h"
38 1.31 uch #include "opt_tx39xx.h"
39 1.24 lukem #include "opt_kgdb.h"
40 1.24 lukem
41 1.1 takemura #include <sys/param.h>
42 1.1 takemura #include <sys/systm.h>
43 1.5 takemura #include <sys/reboot.h>
44 1.1 takemura
45 1.31 uch #include <uvm/uvm_extern.h>
46 1.31 uch
47 1.1 takemura #include <machine/sysconf.h>
48 1.32 takemura #include <machine/bootinfo.h>
49 1.1 takemura #include <machine/bus.h>
50 1.32 takemura #include <machine/bus_space_hpcmips.h>
51 1.1 takemura
52 1.26 enami #include <dev/hpc/hpckbdvar.h>
53 1.26 enami
54 1.30 uch #include <hpcmips/hpcmips/machdep.h> /* cpu_name, mem_cluster */
55 1.30 uch
56 1.1 takemura #include <hpcmips/vr/vr.h>
57 1.11 takemura #include <hpcmips/vr/vr_asm.h>
58 1.22 sato #include <hpcmips/vr/vrcpudef.h>
59 1.3 takemura #include <hpcmips/vr/vripreg.h>
60 1.1 takemura #include <hpcmips/vr/rtcreg.h>
61 1.1 takemura
62 1.8 takemura #include "vrip.h"
63 1.8 takemura #if NVRIP > 0
64 1.8 takemura #include <hpcmips/vr/vripvar.h>
65 1.8 takemura #endif
66 1.8 takemura
67 1.9 sato #include "vrbcu.h"
68 1.9 sato #if NVRBCU > 0
69 1.9 sato #include <hpcmips/vr/bcuvar.h>
70 1.9 sato #endif
71 1.9 sato
72 1.5 takemura #include "vrdsu.h"
73 1.5 takemura #if NVRDSU > 0
74 1.5 takemura #include <hpcmips/vr/vrdsuvar.h>
75 1.5 takemura #endif
76 1.5 takemura
77 1.1 takemura #include "com.h"
78 1.1 takemura #if NCOM > 0
79 1.1 takemura #include <sys/termios.h>
80 1.1 takemura #include <sys/ttydefaults.h>
81 1.1 takemura #include <dev/ic/comreg.h>
82 1.1 takemura #include <dev/ic/comvar.h>
83 1.1 takemura #include <hpcmips/vr/siureg.h>
84 1.1 takemura #include <hpcmips/vr/com_vripvar.h>
85 1.1 takemura #ifndef CONSPEED
86 1.1 takemura #define CONSPEED TTYDEF_SPEED
87 1.1 takemura #endif
88 1.1 takemura #endif
89 1.1 takemura
90 1.15 takemura #include "hpcfb.h"
91 1.3 takemura #include "vrkiu.h"
92 1.25 enami #if (NVRKIU > 0) || (NHPCFB > 0)
93 1.3 takemura #include <dev/wscons/wsdisplayvar.h>
94 1.15 takemura #include <dev/rasops/rasops.h>
95 1.3 takemura #endif
96 1.3 takemura
97 1.15 takemura #if NHPCFB > 0
98 1.20 uch #include <dev/hpc/hpcfbvar.h>
99 1.3 takemura #endif
100 1.3 takemura
101 1.15 takemura #if NVRKIU > 0
102 1.26 enami #include <arch/hpcmips/vr/vrkiureg.h>
103 1.3 takemura #include <arch/hpcmips/vr/vrkiuvar.h>
104 1.3 takemura #endif
105 1.3 takemura
106 1.31 uch #ifdef DEBUG
107 1.31 uch #define STATIC
108 1.31 uch #else
109 1.31 uch #define STATIC static
110 1.31 uch #endif
111 1.31 uch
112 1.31 uch /*
113 1.31 uch * This is a mask of bits to clear in the SR when we go to a
114 1.31 uch * given interrupt priority level.
115 1.31 uch */
116 1.31 uch const u_int32_t __ipl_sr_bits_vr[_IPL_N] = {
117 1.31 uch 0, /* IPL_NONE */
118 1.31 uch
119 1.31 uch MIPS_SOFT_INT_MASK_0, /* IPL_SOFT */
120 1.31 uch
121 1.31 uch MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */
122 1.31 uch
123 1.31 uch MIPS_SOFT_INT_MASK_0|
124 1.31 uch MIPS_SOFT_INT_MASK_1, /* IPL_SOFTNET */
125 1.31 uch
126 1.31 uch MIPS_SOFT_INT_MASK_0|
127 1.31 uch MIPS_SOFT_INT_MASK_1, /* IPL_SOFTSERIAL */
128 1.31 uch
129 1.31 uch MIPS_SOFT_INT_MASK_0|
130 1.31 uch MIPS_SOFT_INT_MASK_1|
131 1.31 uch MIPS_INT_MASK_0, /* IPL_BIO */
132 1.31 uch
133 1.31 uch MIPS_SOFT_INT_MASK_0|
134 1.31 uch MIPS_SOFT_INT_MASK_1|
135 1.31 uch MIPS_INT_MASK_0, /* IPL_NET */
136 1.31 uch
137 1.31 uch MIPS_SOFT_INT_MASK_0|
138 1.31 uch MIPS_SOFT_INT_MASK_1|
139 1.31 uch MIPS_INT_MASK_0, /* IPL_{TTY,SERIAL} */
140 1.31 uch
141 1.31 uch MIPS_SOFT_INT_MASK_0|
142 1.31 uch MIPS_SOFT_INT_MASK_1|
143 1.31 uch MIPS_INT_MASK_0|
144 1.31 uch MIPS_INT_MASK_1, /* IPL_{CLOCK,HIGH} */
145 1.31 uch };
146 1.31 uch
147 1.31 uch #if defined(VR41XX) && defined(TX39XX)
148 1.31 uch #define VR_INTR vr_intr
149 1.31 uch #else
150 1.31 uch #define VR_INTR cpu_intr /* locore_mips3 directly call this */
151 1.31 uch #endif
152 1.31 uch
153 1.31 uch void vr_init(void);
154 1.31 uch void VR_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
155 1.31 uch extern void vr_idle(void);
156 1.31 uch STATIC void vr_cons_init(void);
157 1.31 uch STATIC void vr_fb_init(caddr_t *);
158 1.31 uch STATIC void vr_mem_init(paddr_t);
159 1.31 uch STATIC void vr_find_dram(paddr_t, paddr_t);
160 1.31 uch STATIC void vr_reboot(int, char *);
161 1.1 takemura
162 1.1 takemura /*
163 1.1 takemura * CPU interrupt dispatch table (HwInt[0:3])
164 1.1 takemura */
165 1.31 uch STATIC int vr_null_handler(void *, u_int32_t, u_int32_t);
166 1.31 uch STATIC int (*vr_intr_handler[4])(void *, u_int32_t, u_int32_t) =
167 1.1 takemura {
168 1.31 uch vr_null_handler,
169 1.31 uch vr_null_handler,
170 1.31 uch vr_null_handler,
171 1.31 uch vr_null_handler
172 1.1 takemura };
173 1.31 uch STATIC void *vr_intr_arg[4];
174 1.1 takemura
175 1.1 takemura void
176 1.1 takemura vr_init()
177 1.1 takemura {
178 1.1 takemura /*
179 1.1 takemura * Platform Specific Function Hooks
180 1.1 takemura */
181 1.29 uch platform.cpu_idle = vr_idle;
182 1.31 uch platform.cpu_intr = VR_INTR;
183 1.29 uch platform.cons_init = vr_cons_init;
184 1.29 uch platform.fb_init = vr_fb_init;
185 1.29 uch platform.mem_init = vr_mem_init;
186 1.29 uch platform.reboot = vr_reboot;
187 1.1 takemura
188 1.9 sato #if NVRBCU > 0
189 1.12 sato sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
190 1.1 takemura vrbcu_vrip_getcpuname(),
191 1.1 takemura vrbcu_vrip_getcpumajor(),
192 1.10 shin vrbcu_vrip_getcpuminor(),
193 1.10 shin vrbcu_vrip_getcpuclock() / 1000000,
194 1.10 shin (vrbcu_vrip_getcpuclock() % 1000000) / 1000);
195 1.9 sato #else
196 1.12 sato sprintf(cpu_name, "NEC VR41xx");
197 1.9 sato #endif
198 1.4 uch }
199 1.4 uch
200 1.13 shin void
201 1.28 uch vr_mem_init(paddr_t kernend)
202 1.4 uch {
203 1.25 enami
204 1.13 shin mem_clusters[0].start = 0;
205 1.13 shin mem_clusters[0].size = kernend;
206 1.13 shin mem_cluster_cnt = 1;
207 1.25 enami
208 1.13 shin vr_find_dram(kernend, 0x02000000);
209 1.13 shin vr_find_dram(0x02000000, 0x04000000);
210 1.13 shin vr_find_dram(0x04000000, 0x06000000);
211 1.13 shin vr_find_dram(0x06000000, 0x08000000);
212 1.13 shin
213 1.13 shin /* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/
214 1.13 shin memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF - (KERNBASE + 0x800));
215 1.13 shin }
216 1.13 shin
217 1.13 shin void
218 1.28 uch vr_find_dram(paddr_t addr, paddr_t end)
219 1.13 shin {
220 1.13 shin int n;
221 1.13 shin caddr_t page;
222 1.13 shin #ifdef NARLY_MEMORY_PROBE
223 1.13 shin int x, i;
224 1.13 shin #endif
225 1.13 shin
226 1.25 enami #ifdef VR_FIND_DRAMLIM
227 1.25 enami if (VR_FIND_DRAMLIM < end)
228 1.25 enami end = VR_FIND_DRAMLIM;
229 1.31 uch #endif /* VR_FIND_DRAMLIM */
230 1.13 shin n = mem_cluster_cnt;
231 1.13 shin for (; addr < end; addr += NBPG) {
232 1.13 shin
233 1.13 shin page = (void *)MIPS_PHYS_TO_KSEG1(addr);
234 1.13 shin if (badaddr(page, 4))
235 1.13 shin goto bad;
236 1.14 shin
237 1.14 shin /* stop memory probing at first memory image */
238 1.14 shin if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
239 1.14 shin return;
240 1.13 shin
241 1.13 shin *(volatile int *)(page+0) = 0xa5a5a5a5;
242 1.13 shin *(volatile int *)(page+4) = 0x5a5a5a5a;
243 1.13 shin wbflush();
244 1.13 shin if (*(volatile int *)(page+0) != 0xa5a5a5a5)
245 1.13 shin goto bad;
246 1.13 shin
247 1.13 shin *(volatile int *)(page+0) = 0x5a5a5a5a;
248 1.13 shin *(volatile int *)(page+4) = 0xa5a5a5a5;
249 1.13 shin wbflush();
250 1.13 shin if (*(volatile int *)(page+0) != 0x5a5a5a5a)
251 1.13 shin goto bad;
252 1.13 shin
253 1.13 shin #ifdef NARLY_MEMORY_PROBE
254 1.13 shin x = random();
255 1.13 shin for (i = 0; i < NBPG; i += 4)
256 1.13 shin *(volatile int *)(page+i) = (x ^ i);
257 1.4 uch wbflush();
258 1.13 shin for (i = 0; i < NBPG; i += 4)
259 1.13 shin if (*(volatile int *)(page+i) != (x ^ i))
260 1.13 shin goto bad;
261 1.13 shin
262 1.13 shin x = random();
263 1.13 shin for (i = 0; i < NBPG; i += 4)
264 1.13 shin *(volatile int *)(page+i) = (x ^ i);
265 1.13 shin wbflush();
266 1.13 shin for (i = 0; i < NBPG; i += 4)
267 1.13 shin if (*(volatile int *)(page+i) != (x ^ i))
268 1.13 shin goto bad;
269 1.31 uch #endif /* NARLY_MEMORY_PROBE */
270 1.13 shin
271 1.13 shin if (!mem_clusters[n].size)
272 1.13 shin mem_clusters[n].start = addr;
273 1.13 shin mem_clusters[n].size += NBPG;
274 1.13 shin continue;
275 1.13 shin
276 1.13 shin bad:
277 1.13 shin if (mem_clusters[n].size)
278 1.13 shin ++n;
279 1.13 shin continue;
280 1.4 uch }
281 1.13 shin if (mem_clusters[n].size)
282 1.13 shin ++n;
283 1.13 shin mem_cluster_cnt = n;
284 1.4 uch }
285 1.4 uch
286 1.4 uch void
287 1.28 uch vr_fb_init(caddr_t *kernend)
288 1.4 uch {
289 1.4 uch /* Nothing to do */
290 1.1 takemura }
291 1.1 takemura
292 1.1 takemura void
293 1.1 takemura vr_cons_init()
294 1.1 takemura {
295 1.15 takemura #if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0
296 1.30 uch bus_space_tag_t iot = hpcmips_system_bus_space();
297 1.1 takemura #endif
298 1.1 takemura
299 1.1 takemura #if NCOM > 0
300 1.18 jeffs #ifdef KGDB
301 1.18 jeffs /* if KGDB is defined, always use the serial port for KGDB */
302 1.30 uch if (com_vrip_cndb_attach(iot, VRIP_SIU_ADDR, 9600, VRCOM_FREQ,
303 1.30 uch (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
304 1.18 jeffs printf("%s(%d): can't init kgdb's serial port",
305 1.23 enami __FILE__, __LINE__);
306 1.18 jeffs }
307 1.30 uch #else /* KGDB */
308 1.1 takemura if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
309 1.1 takemura /* Serial console */
310 1.30 uch if (com_vrip_cndb_attach(iot, VRIP_SIU_ADDR, CONSPEED,
311 1.30 uch VRCOM_FREQ, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) {
312 1.23 enami printf("%s(%d): can't init serial console",
313 1.23 enami __FILE__, __LINE__);
314 1.1 takemura } else {
315 1.1 takemura return;
316 1.1 takemura }
317 1.1 takemura }
318 1.30 uch #endif /* KGDB */
319 1.30 uch #endif /* NCOM > 0 */
320 1.1 takemura
321 1.15 takemura #if NHPCFB > 0
322 1.17 uch if (hpcfb_cnattach(NULL)) {
323 1.3 takemura printf("%s(%d): can't init fb console", __FILE__, __LINE__);
324 1.3 takemura } else {
325 1.3 takemura goto find_keyboard;
326 1.3 takemura }
327 1.25 enami find_keyboard:
328 1.30 uch #endif /* NHPCFB > 0 */
329 1.3 takemura
330 1.22 sato #if NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR
331 1.30 uch if (vrkiu_cnattach(iot, VRIP_KIU_ADDR)) {
332 1.3 takemura printf("%s(%d): can't init vrkiu as console",
333 1.3 takemura __FILE__, __LINE__);
334 1.3 takemura } else {
335 1.3 takemura return;
336 1.3 takemura }
337 1.30 uch #endif /* NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR */
338 1.5 takemura }
339 1.5 takemura
340 1.5 takemura void
341 1.28 uch vr_reboot(int howto, char *bootstr)
342 1.5 takemura {
343 1.7 takemura /*
344 1.7 takemura * power down
345 1.7 takemura */
346 1.7 takemura if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
347 1.7 takemura printf("fake powerdown\n");
348 1.7 takemura __asm(__CONCAT(".word ",___STRING(VR_OPCODE_HIBERNATE)));
349 1.7 takemura __asm("nop");
350 1.7 takemura __asm("nop");
351 1.7 takemura __asm("nop");
352 1.7 takemura __asm("nop");
353 1.7 takemura __asm("nop");
354 1.7 takemura __asm(".set reorder");
355 1.7 takemura /* not reach */
356 1.7 takemura vr_reboot(howto&~RB_HALT, bootstr);
357 1.7 takemura }
358 1.7 takemura /*
359 1.8 takemura * halt
360 1.7 takemura */
361 1.8 takemura if (howto & RB_HALT) {
362 1.8 takemura #if NVRIP > 0
363 1.8 takemura _spllower(~MIPS_INT_MASK_0);
364 1.8 takemura vrip_intr_suspend();
365 1.5 takemura #else
366 1.8 takemura splhigh();
367 1.5 takemura #endif
368 1.7 takemura __asm(".set noreorder");
369 1.7 takemura __asm(__CONCAT(".word ",___STRING(VR_OPCODE_SUSPEND)));
370 1.6 sato __asm("nop");
371 1.6 sato __asm("nop");
372 1.6 sato __asm("nop");
373 1.6 sato __asm("nop");
374 1.6 sato __asm("nop");
375 1.7 takemura __asm(".set reorder");
376 1.8 takemura #if NVRIP > 0
377 1.8 takemura vrip_intr_resume();
378 1.8 takemura #endif
379 1.6 sato }
380 1.8 takemura /*
381 1.8 takemura * reset
382 1.8 takemura */
383 1.8 takemura #if NVRDSU
384 1.8 takemura vrdsu_reset();
385 1.8 takemura #else
386 1.8 takemura printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
387 1.8 takemura #endif
388 1.1 takemura }
389 1.1 takemura
390 1.30 uch /*
391 1.30 uch * Handle interrupts.
392 1.30 uch */
393 1.31 uch void
394 1.31 uch VR_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
395 1.30 uch {
396 1.31 uch uvmexp.intrs++;
397 1.31 uch
398 1.31 uch if (ipending & MIPS_INT_MASK_5) {
399 1.31 uch /*
400 1.31 uch * spl* uses MIPS_INT_MASK not MIPS3_INT_MASK. it causes
401 1.31 uch * INT5 interrupt.
402 1.31 uch */
403 1.31 uch mips3_cp0_compare_write(mips3_cp0_count_read());
404 1.31 uch }
405 1.31 uch
406 1.31 uch /* for spllowersoftclock */
407 1.31 uch _splset(((status & ~cause) & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
408 1.31 uch
409 1.31 uch if (ipending & MIPS_INT_MASK_1) {
410 1.31 uch (*vr_intr_handler[1])(vr_intr_arg[1], pc, status);
411 1.30 uch
412 1.31 uch cause &= ~MIPS_INT_MASK_1;
413 1.31 uch _splset(((status & ~cause) & MIPS_HARD_INT_MASK)
414 1.31 uch | MIPS_SR_INT_IE);
415 1.31 uch }
416 1.31 uch
417 1.31 uch if (ipending & MIPS_INT_MASK_0) {
418 1.31 uch (*vr_intr_handler[0])(vr_intr_arg[0], pc, status);
419 1.31 uch
420 1.31 uch cause &= ~MIPS_INT_MASK_0;
421 1.31 uch }
422 1.31 uch _splset(((status & ~cause) & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
423 1.31 uch
424 1.31 uch softintr(ipending);
425 1.30 uch }
426 1.30 uch
427 1.1 takemura void *
428 1.30 uch vr_intr_establish(int line, int (*ih_fun)(void *, u_int32_t, u_int32_t),
429 1.28 uch void *ih_arg)
430 1.1 takemura {
431 1.28 uch
432 1.31 uch KDASSERT(vr_intr_handler[line] == vr_null_handler);
433 1.31 uch
434 1.31 uch vr_intr_handler[line] = ih_fun;
435 1.31 uch vr_intr_arg[line] = ih_arg;
436 1.1 takemura
437 1.31 uch return ((void *)line);
438 1.1 takemura }
439 1.1 takemura
440 1.1 takemura void
441 1.28 uch vr_intr_disestablish(void *ih)
442 1.1 takemura {
443 1.1 takemura int line = (int)ih;
444 1.28 uch
445 1.31 uch vr_intr_handler[line] = vr_null_handler;
446 1.31 uch vr_intr_arg[line] = NULL;
447 1.1 takemura }
448 1.1 takemura
449 1.1 takemura int
450 1.31 uch vr_null_handler(void *arg, u_int32_t pc, u_int32_t status)
451 1.1 takemura {
452 1.31 uch
453 1.31 uch printf("vr_null_handler\n");
454 1.28 uch
455 1.28 uch return (0);
456 1.1 takemura }
457 1.22 sato
458 1.22 sato /*
459 1.22 sato int x4181 = VR4181;
460 1.22 sato int x4101 = VR4101;
461 1.22 sato int x4102 = VR4102;
462 1.22 sato int x4111 = VR4111;
463 1.22 sato int x4121 = VR4121;
464 1.22 sato int x4122 = VR4122;
465 1.22 sato int xo4181 = ONLY_VR4181;
466 1.22 sato int xo4101 = ONLY_VR4101;
467 1.22 sato int xo4102 = ONLY_VR4102;
468 1.22 sato int xo4111_4121 = ONLY_VR4111_4121;
469 1.22 sato int g4101=VRGROUP_4101;
470 1.22 sato int g4102=VRGROUP_4102;
471 1.22 sato int g4181=VRGROUP_4181;
472 1.22 sato int g4102_4121=VRGROUP_4102_4121;
473 1.22 sato int g4111_4121=VRGROUP_4111_4121;
474 1.22 sato int g4102_4122=VRGROUP_4102_4122;
475 1.22 sato int g4111_4122=VRGROUP_4111_4122;
476 1.22 sato int single_vrip_base=SINGLE_VRIP_BASE;
477 1.22 sato int vrip_base_addr=VRIP_BASE_ADDR;
478 1.22 sato */
479