vr.c revision 1.33 1 1.33 takemura /* $NetBSD: vr.c,v 1.33 2001/12/29 04:27:33 takemura Exp $ */
2 1.1 takemura
3 1.1 takemura /*-
4 1.31 uch * Copyright (c) 1999-2001
5 1.1 takemura * Shin Takemura and PocketBSD Project. All rights reserved.
6 1.1 takemura *
7 1.1 takemura * Redistribution and use in source and binary forms, with or without
8 1.1 takemura * modification, are permitted provided that the following conditions
9 1.1 takemura * are met:
10 1.1 takemura * 1. Redistributions of source code must retain the above copyright
11 1.1 takemura * notice, this list of conditions and the following disclaimer.
12 1.1 takemura * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 takemura * notice, this list of conditions and the following disclaimer in the
14 1.1 takemura * documentation and/or other materials provided with the distribution.
15 1.1 takemura * 3. All advertising materials mentioning features or use of this software
16 1.1 takemura * must display the following acknowledgement:
17 1.1 takemura * This product includes software developed by the PocketBSD project
18 1.1 takemura * and its contributors.
19 1.1 takemura * 4. Neither the name of the project nor the names of its contributors
20 1.1 takemura * may be used to endorse or promote products derived from this software
21 1.1 takemura * without specific prior written permission.
22 1.1 takemura *
23 1.1 takemura * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 1.1 takemura * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 1.1 takemura * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 1.1 takemura * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 1.1 takemura * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 1.1 takemura * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 1.1 takemura * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 1.1 takemura * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 1.1 takemura * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 1.1 takemura * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 1.1 takemura * SUCH DAMAGE.
34 1.1 takemura *
35 1.1 takemura */
36 1.29 uch
37 1.29 uch #include "opt_vr41xx.h"
38 1.31 uch #include "opt_tx39xx.h"
39 1.24 lukem #include "opt_kgdb.h"
40 1.24 lukem
41 1.1 takemura #include <sys/param.h>
42 1.1 takemura #include <sys/systm.h>
43 1.5 takemura #include <sys/reboot.h>
44 1.1 takemura
45 1.31 uch #include <uvm/uvm_extern.h>
46 1.31 uch
47 1.1 takemura #include <machine/sysconf.h>
48 1.32 takemura #include <machine/bootinfo.h>
49 1.1 takemura #include <machine/bus.h>
50 1.32 takemura #include <machine/bus_space_hpcmips.h>
51 1.1 takemura
52 1.26 enami #include <dev/hpc/hpckbdvar.h>
53 1.26 enami
54 1.30 uch #include <hpcmips/hpcmips/machdep.h> /* cpu_name, mem_cluster */
55 1.30 uch
56 1.1 takemura #include <hpcmips/vr/vr.h>
57 1.11 takemura #include <hpcmips/vr/vr_asm.h>
58 1.22 sato #include <hpcmips/vr/vrcpudef.h>
59 1.3 takemura #include <hpcmips/vr/vripreg.h>
60 1.1 takemura #include <hpcmips/vr/rtcreg.h>
61 1.1 takemura
62 1.8 takemura #include "vrip.h"
63 1.8 takemura #if NVRIP > 0
64 1.8 takemura #include <hpcmips/vr/vripvar.h>
65 1.8 takemura #endif
66 1.8 takemura
67 1.9 sato #include "vrbcu.h"
68 1.9 sato #if NVRBCU > 0
69 1.9 sato #include <hpcmips/vr/bcuvar.h>
70 1.9 sato #endif
71 1.9 sato
72 1.5 takemura #include "vrdsu.h"
73 1.5 takemura #if NVRDSU > 0
74 1.5 takemura #include <hpcmips/vr/vrdsuvar.h>
75 1.5 takemura #endif
76 1.5 takemura
77 1.1 takemura #include "com.h"
78 1.33 takemura #include "sg2com_vrip.h"
79 1.33 takemura #if NCOM > 0 || NSG2COM_VRIP > 0
80 1.1 takemura #include <sys/termios.h>
81 1.1 takemura #include <sys/ttydefaults.h>
82 1.1 takemura #include <dev/ic/comreg.h>
83 1.1 takemura #include <dev/ic/comvar.h>
84 1.33 takemura #if NCOM > 0
85 1.1 takemura #include <hpcmips/vr/siureg.h>
86 1.1 takemura #include <hpcmips/vr/com_vripvar.h>
87 1.33 takemura #endif
88 1.33 takemura #if NSG2COM_VRIP > 0
89 1.33 takemura #include <hpcmips/vr/sg2comreg.h>
90 1.33 takemura #include <hpcmips/vr/sg2com_vripvar.h>
91 1.33 takemura #endif
92 1.1 takemura #ifndef CONSPEED
93 1.1 takemura #define CONSPEED TTYDEF_SPEED
94 1.1 takemura #endif
95 1.1 takemura #endif
96 1.1 takemura
97 1.15 takemura #include "hpcfb.h"
98 1.3 takemura #include "vrkiu.h"
99 1.25 enami #if (NVRKIU > 0) || (NHPCFB > 0)
100 1.3 takemura #include <dev/wscons/wsdisplayvar.h>
101 1.15 takemura #include <dev/rasops/rasops.h>
102 1.3 takemura #endif
103 1.3 takemura
104 1.15 takemura #if NHPCFB > 0
105 1.20 uch #include <dev/hpc/hpcfbvar.h>
106 1.3 takemura #endif
107 1.3 takemura
108 1.15 takemura #if NVRKIU > 0
109 1.26 enami #include <arch/hpcmips/vr/vrkiureg.h>
110 1.3 takemura #include <arch/hpcmips/vr/vrkiuvar.h>
111 1.3 takemura #endif
112 1.3 takemura
113 1.31 uch #ifdef DEBUG
114 1.31 uch #define STATIC
115 1.31 uch #else
116 1.31 uch #define STATIC static
117 1.31 uch #endif
118 1.31 uch
119 1.31 uch /*
120 1.31 uch * This is a mask of bits to clear in the SR when we go to a
121 1.31 uch * given interrupt priority level.
122 1.31 uch */
123 1.31 uch const u_int32_t __ipl_sr_bits_vr[_IPL_N] = {
124 1.31 uch 0, /* IPL_NONE */
125 1.31 uch
126 1.31 uch MIPS_SOFT_INT_MASK_0, /* IPL_SOFT */
127 1.31 uch
128 1.31 uch MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */
129 1.31 uch
130 1.31 uch MIPS_SOFT_INT_MASK_0|
131 1.31 uch MIPS_SOFT_INT_MASK_1, /* IPL_SOFTNET */
132 1.31 uch
133 1.31 uch MIPS_SOFT_INT_MASK_0|
134 1.31 uch MIPS_SOFT_INT_MASK_1, /* IPL_SOFTSERIAL */
135 1.31 uch
136 1.31 uch MIPS_SOFT_INT_MASK_0|
137 1.31 uch MIPS_SOFT_INT_MASK_1|
138 1.31 uch MIPS_INT_MASK_0, /* IPL_BIO */
139 1.31 uch
140 1.31 uch MIPS_SOFT_INT_MASK_0|
141 1.31 uch MIPS_SOFT_INT_MASK_1|
142 1.31 uch MIPS_INT_MASK_0, /* IPL_NET */
143 1.31 uch
144 1.31 uch MIPS_SOFT_INT_MASK_0|
145 1.31 uch MIPS_SOFT_INT_MASK_1|
146 1.31 uch MIPS_INT_MASK_0, /* IPL_{TTY,SERIAL} */
147 1.31 uch
148 1.31 uch MIPS_SOFT_INT_MASK_0|
149 1.31 uch MIPS_SOFT_INT_MASK_1|
150 1.31 uch MIPS_INT_MASK_0|
151 1.31 uch MIPS_INT_MASK_1, /* IPL_{CLOCK,HIGH} */
152 1.31 uch };
153 1.31 uch
154 1.31 uch #if defined(VR41XX) && defined(TX39XX)
155 1.31 uch #define VR_INTR vr_intr
156 1.31 uch #else
157 1.31 uch #define VR_INTR cpu_intr /* locore_mips3 directly call this */
158 1.31 uch #endif
159 1.31 uch
160 1.31 uch void vr_init(void);
161 1.31 uch void VR_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
162 1.31 uch extern void vr_idle(void);
163 1.31 uch STATIC void vr_cons_init(void);
164 1.31 uch STATIC void vr_fb_init(caddr_t *);
165 1.31 uch STATIC void vr_mem_init(paddr_t);
166 1.31 uch STATIC void vr_find_dram(paddr_t, paddr_t);
167 1.31 uch STATIC void vr_reboot(int, char *);
168 1.1 takemura
169 1.1 takemura /*
170 1.1 takemura * CPU interrupt dispatch table (HwInt[0:3])
171 1.1 takemura */
172 1.31 uch STATIC int vr_null_handler(void *, u_int32_t, u_int32_t);
173 1.31 uch STATIC int (*vr_intr_handler[4])(void *, u_int32_t, u_int32_t) =
174 1.1 takemura {
175 1.31 uch vr_null_handler,
176 1.31 uch vr_null_handler,
177 1.31 uch vr_null_handler,
178 1.31 uch vr_null_handler
179 1.1 takemura };
180 1.31 uch STATIC void *vr_intr_arg[4];
181 1.1 takemura
182 1.1 takemura void
183 1.1 takemura vr_init()
184 1.1 takemura {
185 1.1 takemura /*
186 1.1 takemura * Platform Specific Function Hooks
187 1.1 takemura */
188 1.29 uch platform.cpu_idle = vr_idle;
189 1.31 uch platform.cpu_intr = VR_INTR;
190 1.29 uch platform.cons_init = vr_cons_init;
191 1.29 uch platform.fb_init = vr_fb_init;
192 1.29 uch platform.mem_init = vr_mem_init;
193 1.29 uch platform.reboot = vr_reboot;
194 1.1 takemura
195 1.9 sato #if NVRBCU > 0
196 1.12 sato sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
197 1.1 takemura vrbcu_vrip_getcpuname(),
198 1.1 takemura vrbcu_vrip_getcpumajor(),
199 1.10 shin vrbcu_vrip_getcpuminor(),
200 1.10 shin vrbcu_vrip_getcpuclock() / 1000000,
201 1.10 shin (vrbcu_vrip_getcpuclock() % 1000000) / 1000);
202 1.9 sato #else
203 1.12 sato sprintf(cpu_name, "NEC VR41xx");
204 1.9 sato #endif
205 1.4 uch }
206 1.4 uch
207 1.13 shin void
208 1.28 uch vr_mem_init(paddr_t kernend)
209 1.4 uch {
210 1.25 enami
211 1.13 shin mem_clusters[0].start = 0;
212 1.13 shin mem_clusters[0].size = kernend;
213 1.13 shin mem_cluster_cnt = 1;
214 1.25 enami
215 1.13 shin vr_find_dram(kernend, 0x02000000);
216 1.13 shin vr_find_dram(0x02000000, 0x04000000);
217 1.13 shin vr_find_dram(0x04000000, 0x06000000);
218 1.13 shin vr_find_dram(0x06000000, 0x08000000);
219 1.13 shin
220 1.13 shin /* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/
221 1.13 shin memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF - (KERNBASE + 0x800));
222 1.13 shin }
223 1.13 shin
224 1.13 shin void
225 1.28 uch vr_find_dram(paddr_t addr, paddr_t end)
226 1.13 shin {
227 1.13 shin int n;
228 1.13 shin caddr_t page;
229 1.13 shin #ifdef NARLY_MEMORY_PROBE
230 1.13 shin int x, i;
231 1.13 shin #endif
232 1.13 shin
233 1.25 enami #ifdef VR_FIND_DRAMLIM
234 1.25 enami if (VR_FIND_DRAMLIM < end)
235 1.25 enami end = VR_FIND_DRAMLIM;
236 1.31 uch #endif /* VR_FIND_DRAMLIM */
237 1.13 shin n = mem_cluster_cnt;
238 1.13 shin for (; addr < end; addr += NBPG) {
239 1.13 shin
240 1.13 shin page = (void *)MIPS_PHYS_TO_KSEG1(addr);
241 1.13 shin if (badaddr(page, 4))
242 1.13 shin goto bad;
243 1.14 shin
244 1.14 shin /* stop memory probing at first memory image */
245 1.14 shin if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
246 1.14 shin return;
247 1.13 shin
248 1.13 shin *(volatile int *)(page+0) = 0xa5a5a5a5;
249 1.13 shin *(volatile int *)(page+4) = 0x5a5a5a5a;
250 1.13 shin wbflush();
251 1.13 shin if (*(volatile int *)(page+0) != 0xa5a5a5a5)
252 1.13 shin goto bad;
253 1.13 shin
254 1.13 shin *(volatile int *)(page+0) = 0x5a5a5a5a;
255 1.13 shin *(volatile int *)(page+4) = 0xa5a5a5a5;
256 1.13 shin wbflush();
257 1.13 shin if (*(volatile int *)(page+0) != 0x5a5a5a5a)
258 1.13 shin goto bad;
259 1.13 shin
260 1.13 shin #ifdef NARLY_MEMORY_PROBE
261 1.13 shin x = random();
262 1.13 shin for (i = 0; i < NBPG; i += 4)
263 1.13 shin *(volatile int *)(page+i) = (x ^ i);
264 1.4 uch wbflush();
265 1.13 shin for (i = 0; i < NBPG; i += 4)
266 1.13 shin if (*(volatile int *)(page+i) != (x ^ i))
267 1.13 shin goto bad;
268 1.13 shin
269 1.13 shin x = random();
270 1.13 shin for (i = 0; i < NBPG; i += 4)
271 1.13 shin *(volatile int *)(page+i) = (x ^ i);
272 1.13 shin wbflush();
273 1.13 shin for (i = 0; i < NBPG; i += 4)
274 1.13 shin if (*(volatile int *)(page+i) != (x ^ i))
275 1.13 shin goto bad;
276 1.31 uch #endif /* NARLY_MEMORY_PROBE */
277 1.13 shin
278 1.13 shin if (!mem_clusters[n].size)
279 1.13 shin mem_clusters[n].start = addr;
280 1.13 shin mem_clusters[n].size += NBPG;
281 1.13 shin continue;
282 1.13 shin
283 1.13 shin bad:
284 1.13 shin if (mem_clusters[n].size)
285 1.13 shin ++n;
286 1.13 shin continue;
287 1.4 uch }
288 1.13 shin if (mem_clusters[n].size)
289 1.13 shin ++n;
290 1.13 shin mem_cluster_cnt = n;
291 1.4 uch }
292 1.4 uch
293 1.4 uch void
294 1.28 uch vr_fb_init(caddr_t *kernend)
295 1.4 uch {
296 1.4 uch /* Nothing to do */
297 1.1 takemura }
298 1.1 takemura
299 1.1 takemura void
300 1.1 takemura vr_cons_init()
301 1.1 takemura {
302 1.33 takemura #if NCOM > 0 || NSG2COM_VRIP > 0 || NHPCFB > 0 || NVRKIU > 0
303 1.30 uch bus_space_tag_t iot = hpcmips_system_bus_space();
304 1.1 takemura #endif
305 1.1 takemura
306 1.1 takemura #if NCOM > 0
307 1.18 jeffs #ifdef KGDB
308 1.18 jeffs /* if KGDB is defined, always use the serial port for KGDB */
309 1.30 uch if (com_vrip_cndb_attach(iot, VRIP_SIU_ADDR, 9600, VRCOM_FREQ,
310 1.30 uch (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
311 1.18 jeffs printf("%s(%d): can't init kgdb's serial port",
312 1.23 enami __FILE__, __LINE__);
313 1.18 jeffs }
314 1.30 uch #else /* KGDB */
315 1.1 takemura if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
316 1.1 takemura /* Serial console */
317 1.30 uch if (com_vrip_cndb_attach(iot, VRIP_SIU_ADDR, CONSPEED,
318 1.30 uch VRCOM_FREQ, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) {
319 1.23 enami printf("%s(%d): can't init serial console",
320 1.23 enami __FILE__, __LINE__);
321 1.1 takemura } else {
322 1.33 takemura #if NSG2COM_VRIP == 0
323 1.1 takemura return;
324 1.33 takemura #endif
325 1.1 takemura }
326 1.1 takemura }
327 1.30 uch #endif /* KGDB */
328 1.30 uch #endif /* NCOM > 0 */
329 1.33 takemura
330 1.33 takemura #if NSG2COM_VRIP > 0
331 1.33 takemura #ifdef KGDB
332 1.33 takemura /* if KGDB is defined, always use the serial port for KGDB */
333 1.33 takemura if (sg2com_vrip_cndb_attach(iot, SG2COM_VRIP_ADDR, 9600, SG2COM_FREQ,
334 1.33 takemura (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
335 1.33 takemura printf("%s(%d): can't init kgdb's serial port",
336 1.33 takemura __FILE__, __LINE__);
337 1.33 takemura }
338 1.33 takemura #else /* KGDB */
339 1.33 takemura if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
340 1.33 takemura /* Serial console */
341 1.33 takemura if (sg2com_vrip_cndb_attach(iot, SG2COM_ADDR, CONSPEED,
342 1.33 takemura SG2COM_FREQ, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)){
343 1.33 takemura printf("%s(%d): can't init serial console",
344 1.33 takemura __FILE__, __LINE__);
345 1.33 takemura } else {
346 1.33 takemura return;
347 1.33 takemura }
348 1.33 takemura }
349 1.33 takemura #endif /* KGDB */
350 1.33 takemura #endif /* NSG2COM_VRIP > 0 */
351 1.1 takemura
352 1.15 takemura #if NHPCFB > 0
353 1.17 uch if (hpcfb_cnattach(NULL)) {
354 1.3 takemura printf("%s(%d): can't init fb console", __FILE__, __LINE__);
355 1.3 takemura } else {
356 1.3 takemura goto find_keyboard;
357 1.3 takemura }
358 1.25 enami find_keyboard:
359 1.30 uch #endif /* NHPCFB > 0 */
360 1.3 takemura
361 1.22 sato #if NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR
362 1.30 uch if (vrkiu_cnattach(iot, VRIP_KIU_ADDR)) {
363 1.3 takemura printf("%s(%d): can't init vrkiu as console",
364 1.3 takemura __FILE__, __LINE__);
365 1.3 takemura } else {
366 1.3 takemura return;
367 1.3 takemura }
368 1.30 uch #endif /* NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR */
369 1.5 takemura }
370 1.5 takemura
371 1.5 takemura void
372 1.28 uch vr_reboot(int howto, char *bootstr)
373 1.5 takemura {
374 1.7 takemura /*
375 1.7 takemura * power down
376 1.7 takemura */
377 1.7 takemura if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
378 1.7 takemura printf("fake powerdown\n");
379 1.7 takemura __asm(__CONCAT(".word ",___STRING(VR_OPCODE_HIBERNATE)));
380 1.7 takemura __asm("nop");
381 1.7 takemura __asm("nop");
382 1.7 takemura __asm("nop");
383 1.7 takemura __asm("nop");
384 1.7 takemura __asm("nop");
385 1.7 takemura __asm(".set reorder");
386 1.7 takemura /* not reach */
387 1.7 takemura vr_reboot(howto&~RB_HALT, bootstr);
388 1.7 takemura }
389 1.7 takemura /*
390 1.8 takemura * halt
391 1.7 takemura */
392 1.8 takemura if (howto & RB_HALT) {
393 1.8 takemura #if NVRIP > 0
394 1.8 takemura _spllower(~MIPS_INT_MASK_0);
395 1.8 takemura vrip_intr_suspend();
396 1.5 takemura #else
397 1.8 takemura splhigh();
398 1.5 takemura #endif
399 1.7 takemura __asm(".set noreorder");
400 1.7 takemura __asm(__CONCAT(".word ",___STRING(VR_OPCODE_SUSPEND)));
401 1.6 sato __asm("nop");
402 1.6 sato __asm("nop");
403 1.6 sato __asm("nop");
404 1.6 sato __asm("nop");
405 1.6 sato __asm("nop");
406 1.7 takemura __asm(".set reorder");
407 1.8 takemura #if NVRIP > 0
408 1.8 takemura vrip_intr_resume();
409 1.8 takemura #endif
410 1.6 sato }
411 1.8 takemura /*
412 1.8 takemura * reset
413 1.8 takemura */
414 1.8 takemura #if NVRDSU
415 1.8 takemura vrdsu_reset();
416 1.8 takemura #else
417 1.8 takemura printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
418 1.8 takemura #endif
419 1.1 takemura }
420 1.1 takemura
421 1.30 uch /*
422 1.30 uch * Handle interrupts.
423 1.30 uch */
424 1.31 uch void
425 1.31 uch VR_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
426 1.30 uch {
427 1.31 uch uvmexp.intrs++;
428 1.31 uch
429 1.31 uch if (ipending & MIPS_INT_MASK_5) {
430 1.31 uch /*
431 1.31 uch * spl* uses MIPS_INT_MASK not MIPS3_INT_MASK. it causes
432 1.31 uch * INT5 interrupt.
433 1.31 uch */
434 1.31 uch mips3_cp0_compare_write(mips3_cp0_count_read());
435 1.31 uch }
436 1.31 uch
437 1.31 uch /* for spllowersoftclock */
438 1.31 uch _splset(((status & ~cause) & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
439 1.31 uch
440 1.31 uch if (ipending & MIPS_INT_MASK_1) {
441 1.31 uch (*vr_intr_handler[1])(vr_intr_arg[1], pc, status);
442 1.30 uch
443 1.31 uch cause &= ~MIPS_INT_MASK_1;
444 1.31 uch _splset(((status & ~cause) & MIPS_HARD_INT_MASK)
445 1.31 uch | MIPS_SR_INT_IE);
446 1.31 uch }
447 1.31 uch
448 1.31 uch if (ipending & MIPS_INT_MASK_0) {
449 1.31 uch (*vr_intr_handler[0])(vr_intr_arg[0], pc, status);
450 1.31 uch
451 1.31 uch cause &= ~MIPS_INT_MASK_0;
452 1.31 uch }
453 1.31 uch _splset(((status & ~cause) & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
454 1.31 uch
455 1.31 uch softintr(ipending);
456 1.30 uch }
457 1.30 uch
458 1.1 takemura void *
459 1.30 uch vr_intr_establish(int line, int (*ih_fun)(void *, u_int32_t, u_int32_t),
460 1.28 uch void *ih_arg)
461 1.1 takemura {
462 1.28 uch
463 1.31 uch KDASSERT(vr_intr_handler[line] == vr_null_handler);
464 1.31 uch
465 1.31 uch vr_intr_handler[line] = ih_fun;
466 1.31 uch vr_intr_arg[line] = ih_arg;
467 1.1 takemura
468 1.31 uch return ((void *)line);
469 1.1 takemura }
470 1.1 takemura
471 1.1 takemura void
472 1.28 uch vr_intr_disestablish(void *ih)
473 1.1 takemura {
474 1.1 takemura int line = (int)ih;
475 1.28 uch
476 1.31 uch vr_intr_handler[line] = vr_null_handler;
477 1.31 uch vr_intr_arg[line] = NULL;
478 1.1 takemura }
479 1.1 takemura
480 1.1 takemura int
481 1.31 uch vr_null_handler(void *arg, u_int32_t pc, u_int32_t status)
482 1.1 takemura {
483 1.31 uch
484 1.31 uch printf("vr_null_handler\n");
485 1.28 uch
486 1.28 uch return (0);
487 1.1 takemura }
488 1.22 sato
489 1.22 sato /*
490 1.22 sato int x4181 = VR4181;
491 1.22 sato int x4101 = VR4101;
492 1.22 sato int x4102 = VR4102;
493 1.22 sato int x4111 = VR4111;
494 1.22 sato int x4121 = VR4121;
495 1.22 sato int x4122 = VR4122;
496 1.22 sato int xo4181 = ONLY_VR4181;
497 1.22 sato int xo4101 = ONLY_VR4101;
498 1.22 sato int xo4102 = ONLY_VR4102;
499 1.22 sato int xo4111_4121 = ONLY_VR4111_4121;
500 1.22 sato int g4101=VRGROUP_4101;
501 1.22 sato int g4102=VRGROUP_4102;
502 1.22 sato int g4181=VRGROUP_4181;
503 1.22 sato int g4102_4121=VRGROUP_4102_4121;
504 1.22 sato int g4111_4121=VRGROUP_4111_4121;
505 1.22 sato int g4102_4122=VRGROUP_4102_4122;
506 1.22 sato int g4111_4122=VRGROUP_4111_4122;
507 1.22 sato int single_vrip_base=SINGLE_VRIP_BASE;
508 1.22 sato int vrip_base_addr=VRIP_BASE_ADDR;
509 1.22 sato */
510