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vr.c revision 1.4
      1  1.4       uch /*	$NetBSD: vr.c,v 1.4 1999/11/21 07:01:54 uch Exp $	*/
      2  1.1  takemura 
      3  1.1  takemura /*-
      4  1.1  takemura  * Copyright (c) 1999
      5  1.1  takemura  *         Shin Takemura and PocketBSD Project. All rights reserved.
      6  1.1  takemura  *
      7  1.1  takemura  * Redistribution and use in source and binary forms, with or without
      8  1.1  takemura  * modification, are permitted provided that the following conditions
      9  1.1  takemura  * are met:
     10  1.1  takemura  * 1. Redistributions of source code must retain the above copyright
     11  1.1  takemura  *    notice, this list of conditions and the following disclaimer.
     12  1.1  takemura  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  takemura  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  takemura  *    documentation and/or other materials provided with the distribution.
     15  1.1  takemura  * 3. All advertising materials mentioning features or use of this software
     16  1.1  takemura  *    must display the following acknowledgement:
     17  1.1  takemura  *	This product includes software developed by the PocketBSD project
     18  1.1  takemura  *	and its contributors.
     19  1.1  takemura  * 4. Neither the name of the project nor the names of its contributors
     20  1.1  takemura  *    may be used to endorse or promote products derived from this software
     21  1.1  takemura  *    without specific prior written permission.
     22  1.1  takemura  *
     23  1.1  takemura  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  1.1  takemura  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  1.1  takemura  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  1.1  takemura  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  1.1  takemura  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  1.1  takemura  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  1.1  takemura  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  1.1  takemura  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  1.1  takemura  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  1.1  takemura  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  1.1  takemura  * SUCH DAMAGE.
     34  1.1  takemura  *
     35  1.1  takemura  */
     36  1.1  takemura #include <sys/param.h>
     37  1.1  takemura #include <sys/types.h>
     38  1.1  takemura #include <sys/systm.h>
     39  1.1  takemura #include <sys/device.h>
     40  1.1  takemura 
     41  1.1  takemura #include <machine/cpu.h>
     42  1.1  takemura #include <machine/intr.h>
     43  1.1  takemura #include <machine/reg.h>
     44  1.1  takemura #include <machine/psl.h>
     45  1.1  takemura #include <machine/locore.h>
     46  1.1  takemura #include <machine/sysconf.h>
     47  1.1  takemura #include <machine/bus.h>
     48  1.1  takemura #include <machine/autoconf.h>
     49  1.1  takemura 
     50  1.1  takemura #include <mips/mips_param.h>		/* hokey spl()s */
     51  1.1  takemura #include <mips/mips/mips_mcclock.h>	/* mcclock CPUspeed estimation */
     52  1.1  takemura 
     53  1.1  takemura #include <hpcmips/vr/vr.h>
     54  1.3  takemura #include <hpcmips/vr/vripreg.h>
     55  1.1  takemura #include <hpcmips/vr/rtcreg.h>
     56  1.1  takemura #include <hpcmips/hpcmips/machdep.h>	/* XXXjrs replace with vectors */
     57  1.1  takemura #include <machine/bootinfo.h>
     58  1.1  takemura 
     59  1.1  takemura #include "com.h"
     60  1.1  takemura #if NCOM > 0
     61  1.1  takemura #include <sys/termios.h>
     62  1.1  takemura #include <sys/ttydefaults.h>
     63  1.1  takemura #include <dev/ic/comreg.h>
     64  1.1  takemura #include <dev/ic/comvar.h>
     65  1.1  takemura #include <hpcmips/vr/siureg.h>
     66  1.1  takemura #include <hpcmips/vr/com_vripvar.h>
     67  1.1  takemura #ifndef CONSPEED
     68  1.1  takemura #define CONSPEED TTYDEF_SPEED
     69  1.1  takemura #endif
     70  1.1  takemura #endif
     71  1.1  takemura 
     72  1.3  takemura #include "fb.h"
     73  1.3  takemura #include "vrkiu.h"
     74  1.3  takemura #if NFB > 0 || NVRKIU > 0
     75  1.3  takemura #include <dev/rcons/raster.h>
     76  1.3  takemura #include <dev/wscons/wsdisplayvar.h>
     77  1.3  takemura #endif
     78  1.3  takemura 
     79  1.3  takemura #if NFB > 0
     80  1.3  takemura #include <arch/hpcmips/dev/fbvar.h>
     81  1.3  takemura #endif
     82  1.3  takemura 
     83  1.3  takemura #if NFB > 0
     84  1.3  takemura #include <arch/hpcmips/vr/vrkiuvar.h>
     85  1.3  takemura #endif
     86  1.3  takemura 
     87  1.1  takemura void	vr_init __P((void));
     88  1.1  takemura void	vr_os_init __P((void));
     89  1.1  takemura void	vr_bus_reset __P((void));
     90  1.1  takemura int	vr_intr __P((u_int32_t mask, u_int32_t pc, u_int32_t statusReg, u_int32_t causeReg));
     91  1.1  takemura void	vr_cons_init __P((void));
     92  1.1  takemura void	vr_device_register __P((struct device *, void *));
     93  1.4       uch void    vr_fb_init __P((caddr_t*));
     94  1.4       uch int     vr_mem_init __P((caddr_t));
     95  1.1  takemura 
     96  1.1  takemura char	*vrbcu_vrip_getcpuname __P((void));
     97  1.1  takemura int	vrbcu_vrip_getcpumajor __P((void));
     98  1.1  takemura int	vrbcu_vrip_getcpuminor __P((void));
     99  1.1  takemura 
    100  1.1  takemura extern unsigned nullclkread __P((void));
    101  1.1  takemura extern unsigned (*clkread) __P((void));
    102  1.1  takemura 
    103  1.1  takemura /*
    104  1.1  takemura  * CPU interrupt dispatch table (HwInt[0:3])
    105  1.1  takemura  */
    106  1.1  takemura int null_handler __P((void*, u_int32_t, u_int32_t));
    107  1.1  takemura static int (*intr_handler[4]) __P((void*, u_int32_t, u_int32_t)) =
    108  1.1  takemura {
    109  1.1  takemura 	null_handler,
    110  1.1  takemura 	null_handler,
    111  1.1  takemura 	null_handler,
    112  1.1  takemura 	null_handler
    113  1.1  takemura };
    114  1.1  takemura static void *intr_arg[4];
    115  1.1  takemura 
    116  1.1  takemura void
    117  1.1  takemura vr_init()
    118  1.1  takemura {
    119  1.1  takemura 	/*
    120  1.1  takemura 	 * Platform Information.
    121  1.1  takemura 	 */
    122  1.1  takemura 
    123  1.1  takemura 	/*
    124  1.1  takemura 	 * Platform Specific Function Hooks
    125  1.1  takemura 	 */
    126  1.1  takemura 	platform.os_init = vr_os_init;
    127  1.1  takemura 	platform.bus_reset = vr_bus_reset;
    128  1.1  takemura 	platform.cons_init = vr_cons_init;
    129  1.1  takemura 	platform.device_register = vr_device_register;
    130  1.4       uch 	platform.fb_init = vr_fb_init;
    131  1.4       uch 	platform.mem_init = vr_mem_init;
    132  1.1  takemura 
    133  1.1  takemura 	sprintf(cpu_model, "NEC %s rev%d.%d",
    134  1.1  takemura 		vrbcu_vrip_getcpuname(),
    135  1.1  takemura 		vrbcu_vrip_getcpumajor(),
    136  1.1  takemura 		vrbcu_vrip_getcpuminor());
    137  1.4       uch }
    138  1.4       uch 
    139  1.4       uch int
    140  1.4       uch vr_mem_init(kernend)
    141  1.4       uch 	caddr_t kernend; /* kseg0 */
    142  1.4       uch {
    143  1.4       uch 	u_int32_t startaddr, endaddr, page;
    144  1.4       uch 	int npage;
    145  1.4       uch #define VR41_SYSADDR_DRAMSTART 0x0
    146  1.4       uch #define VR41_SYSADDR_DRAM_LEN 0x04000000
    147  1.4       uch 	startaddr = MIPS_PHYS_TO_KSEG1(
    148  1.4       uch 		(btoc((u_int32_t)kernend - MIPS_KSEG0_START)) << PGSHIFT);
    149  1.4       uch 	endaddr = MIPS_PHYS_TO_KSEG1(VR41_SYSADDR_DRAMSTART +
    150  1.4       uch 				     VR41_SYSADDR_DRAM_LEN);
    151  1.4       uch 	for(page = startaddr, npage = 0; page < endaddr;
    152  1.4       uch 	    page+= NBPG, npage++) {
    153  1.4       uch 		if (badaddr((char*)page, 4))
    154  1.4       uch 			break;
    155  1.4       uch 		((volatile int *)page)[0] = 0xa5a5a5a5;
    156  1.4       uch 		((volatile int *)page)[4] = 0x5a5a5a5a;
    157  1.4       uch 		wbflush();
    158  1.4       uch 		if (*(volatile int *)page != 0xa5a5a5a5)
    159  1.4       uch 			break;
    160  1.4       uch 	}
    161  1.4       uch 	/* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/
    162  1.4       uch 	memset((void*)startaddr, 0, npage * NBPG);
    163  1.4       uch 	memset((void*)(KERNBASE + 0x400), 0, KERNTEXTOFF - KERNBASE - 0x800);
    164  1.4       uch 
    165  1.4       uch 	return npage;
    166  1.4       uch }
    167  1.4       uch 
    168  1.4       uch void
    169  1.4       uch vr_fb_init(kernend)
    170  1.4       uch 	caddr_t *kernend;
    171  1.4       uch {
    172  1.4       uch 	/* Nothing to do */
    173  1.1  takemura }
    174  1.1  takemura 
    175  1.1  takemura void
    176  1.1  takemura vr_os_init()
    177  1.1  takemura {
    178  1.1  takemura 	/*
    179  1.1  takemura 	 * Set up interrupt handling and I/O addresses.
    180  1.1  takemura 	 */
    181  1.1  takemura 	mips_hardware_intr = vr_intr;
    182  1.1  takemura 
    183  1.1  takemura 	splvec.splbio = MIPS_SPL0;
    184  1.1  takemura 	splvec.splnet = MIPS_SPL0;
    185  1.1  takemura 	splvec.spltty = MIPS_SPL0;
    186  1.1  takemura 	splvec.splimp = MIPS_SPL0;
    187  1.1  takemura 	splvec.splclock = MIPS_SPL_0_1;
    188  1.1  takemura 	splvec.splstatclock = MIPS_SPL_0_1;
    189  1.1  takemura 
    190  1.1  takemura 	/* no high resolution timer circuit; possibly never called */
    191  1.1  takemura 	clkread = nullclkread;
    192  1.1  takemura 
    193  1.1  takemura #ifdef NOT_YET
    194  1.1  takemura 	mcclock_addr = (volatile struct chiptime *)
    195  1.1  takemura 		MIPS_PHYS_TO_KSEG1(Vr_SYS_CLOCK);
    196  1.1  takemura 	mc_cpuspeed(mcclock_addr, MIPS_INT_MASK_1);
    197  1.1  takemura #else
    198  1.1  takemura 	printf("%s(%d): cpuspeed estimation is notimplemented\n",
    199  1.1  takemura 	       __FILE__, __LINE__);
    200  1.1  takemura #endif
    201  1.1  takemura #ifdef HPCMIPS_L1CACHE_DISABLE
    202  1.1  takemura 	cpuspeed = 1;	/* XXX, CPU is very very slow because L1 cache is */
    203  1.1  takemura 	/* disabled. */
    204  1.1  takemura #endif /*  HPCMIPS_L1CAHCE_DISABLE */
    205  1.1  takemura }
    206  1.1  takemura 
    207  1.1  takemura 
    208  1.1  takemura /*
    209  1.1  takemura  * Initalize the memory system and I/O buses.
    210  1.1  takemura  */
    211  1.1  takemura void
    212  1.1  takemura vr_bus_reset()
    213  1.1  takemura {
    214  1.1  takemura 	printf("%s(%d): vr_bus_reset() not implemented.\n",
    215  1.1  takemura 	       __FILE__, __LINE__);
    216  1.1  takemura }
    217  1.1  takemura 
    218  1.1  takemura void
    219  1.1  takemura vr_cons_init()
    220  1.1  takemura {
    221  1.3  takemura #if NCOM > 0 || NFB > 0 || NVRKIU > 0
    222  1.1  takemura 	extern bus_space_tag_t system_bus_iot;
    223  1.1  takemura 	extern bus_space_tag_t mb_bus_space_init __P((void));
    224  1.1  takemura #endif
    225  1.1  takemura 
    226  1.1  takemura #if NCOM > 0
    227  1.1  takemura 	if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
    228  1.1  takemura 		/* Serial console */
    229  1.1  takemura 		mb_bus_space_init(); /* At this time, not initialized yet */
    230  1.1  takemura 		if(com_vrip_cnattach(system_bus_iot, 0x0c000000, CONSPEED,
    231  1.1  takemura 				     VRCOM_FREQ,
    232  1.1  takemura 				     (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8)) {
    233  1.1  takemura 			printf("%s(%d): can't init serial console", __FILE__, __LINE__);
    234  1.1  takemura 		} else {
    235  1.1  takemura 			return;
    236  1.1  takemura 		}
    237  1.1  takemura 	}
    238  1.1  takemura #endif
    239  1.1  takemura 
    240  1.3  takemura #if NFB > 0
    241  1.3  takemura 	mb_bus_space_init(); /* At this time, not initialized yet */
    242  1.3  takemura 	if(fb_cnattach(system_bus_iot, 0x0c000000, 0, 0)) {
    243  1.3  takemura 		printf("%s(%d): can't init fb console", __FILE__, __LINE__);
    244  1.3  takemura 	} else {
    245  1.3  takemura 		goto find_keyboard;
    246  1.3  takemura 	}
    247  1.3  takemura #endif
    248  1.3  takemura 
    249  1.3  takemura  find_keyboard:
    250  1.3  takemura #if NVRKIU > 0
    251  1.3  takemura 	if (vrkiu_cnattach(system_bus_iot, VRIP_KIU_ADDR)) {
    252  1.3  takemura 		printf("%s(%d): can't init vrkiu as console",
    253  1.3  takemura 		       __FILE__, __LINE__);
    254  1.3  takemura 	} else {
    255  1.3  takemura 		return;
    256  1.3  takemura 	}
    257  1.3  takemura #endif
    258  1.1  takemura }
    259  1.1  takemura 
    260  1.1  takemura void
    261  1.1  takemura vr_device_register(dev, aux)
    262  1.1  takemura 	struct device *dev;
    263  1.1  takemura 	void *aux;
    264  1.1  takemura {
    265  1.2      shin 	printf("%s(%d): vr_device_register() not implemented.\n",
    266  1.1  takemura 	       __FILE__, __LINE__);
    267  1.1  takemura 	panic("abort");
    268  1.1  takemura }
    269  1.1  takemura 
    270  1.1  takemura void *
    271  1.1  takemura vr_intr_establish(line, ih_fun, ih_arg)
    272  1.1  takemura 	int line;
    273  1.1  takemura 	int (*ih_fun) __P((void*, u_int32_t, u_int32_t));
    274  1.1  takemura 	void *ih_arg;
    275  1.1  takemura {
    276  1.1  takemura 	if (intr_handler[line] != null_handler) {
    277  1.1  takemura 		panic("vr_intr_establish: can't establish duplicated intr handler.");
    278  1.1  takemura 	}
    279  1.1  takemura 	intr_handler[line] = ih_fun;
    280  1.1  takemura 	intr_arg[line] = ih_arg;
    281  1.1  takemura 
    282  1.1  takemura 	return (void*)line;
    283  1.1  takemura }
    284  1.1  takemura 
    285  1.1  takemura 
    286  1.1  takemura void
    287  1.1  takemura vr_intr_disestablish(ih)
    288  1.1  takemura 	void *ih;
    289  1.1  takemura {
    290  1.1  takemura 	int line = (int)ih;
    291  1.1  takemura 	intr_handler[line] = null_handler;
    292  1.1  takemura 	intr_arg[line] = NULL;
    293  1.1  takemura }
    294  1.1  takemura 
    295  1.1  takemura int
    296  1.1  takemura null_handler(arg, pc, statusReg)
    297  1.1  takemura 	void *arg;
    298  1.1  takemura 	u_int32_t pc;
    299  1.1  takemura 	u_int32_t statusReg;
    300  1.1  takemura {
    301  1.1  takemura 	printf("null_handler\n");
    302  1.1  takemura 	return 0;
    303  1.1  takemura }
    304  1.1  takemura 
    305  1.1  takemura /*
    306  1.1  takemura  * Handle interrupts.
    307  1.1  takemura  */
    308  1.1  takemura int
    309  1.1  takemura vr_intr(mask, pc, status, cause)
    310  1.1  takemura 	u_int32_t mask;
    311  1.1  takemura 	u_int32_t pc;
    312  1.1  takemura 	u_int32_t status;
    313  1.1  takemura 	u_int32_t cause;
    314  1.1  takemura {
    315  1.1  takemura 	int hwintr;
    316  1.1  takemura 
    317  1.1  takemura 	hwintr = (ffs(mask >> 10) -1) & 0x3;
    318  1.1  takemura 	(*intr_handler[hwintr])(intr_arg[hwintr], pc, status);
    319  1.1  takemura 	return (MIPS_SR_INT_IE | (status & ~cause & MIPS_HARD_INT_MASK));
    320  1.1  takemura }
    321