Home | History | Annotate | Line # | Download | only in vr
vr.c revision 1.48.2.1
      1  1.48.2.1        ad /*	$NetBSD: vr.c,v 1.48.2.1 2007/12/03 18:36:10 ad Exp $	*/
      2       1.1  takemura 
      3       1.1  takemura /*-
      4      1.35  takemura  * Copyright (c) 1999-2002
      5       1.1  takemura  *         Shin Takemura and PocketBSD Project. All rights reserved.
      6       1.1  takemura  *
      7       1.1  takemura  * Redistribution and use in source and binary forms, with or without
      8       1.1  takemura  * modification, are permitted provided that the following conditions
      9       1.1  takemura  * are met:
     10       1.1  takemura  * 1. Redistributions of source code must retain the above copyright
     11       1.1  takemura  *    notice, this list of conditions and the following disclaimer.
     12       1.1  takemura  * 2. Redistributions in binary form must reproduce the above copyright
     13       1.1  takemura  *    notice, this list of conditions and the following disclaimer in the
     14       1.1  takemura  *    documentation and/or other materials provided with the distribution.
     15       1.1  takemura  * 3. All advertising materials mentioning features or use of this software
     16       1.1  takemura  *    must display the following acknowledgement:
     17       1.1  takemura  *	This product includes software developed by the PocketBSD project
     18       1.1  takemura  *	and its contributors.
     19       1.1  takemura  * 4. Neither the name of the project nor the names of its contributors
     20       1.1  takemura  *    may be used to endorse or promote products derived from this software
     21       1.1  takemura  *    without specific prior written permission.
     22       1.1  takemura  *
     23       1.1  takemura  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24       1.1  takemura  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25       1.1  takemura  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26       1.1  takemura  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27       1.1  takemura  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28       1.1  takemura  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29       1.1  takemura  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30       1.1  takemura  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31       1.1  takemura  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32       1.1  takemura  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33       1.1  takemura  * SUCH DAMAGE.
     34       1.1  takemura  *
     35       1.1  takemura  */
     36      1.42     lukem 
     37      1.42     lukem #include <sys/cdefs.h>
     38  1.48.2.1        ad __KERNEL_RCSID(0, "$NetBSD: vr.c,v 1.48.2.1 2007/12/03 18:36:10 ad Exp $");
     39      1.29       uch 
     40      1.29       uch #include "opt_vr41xx.h"
     41      1.31       uch #include "opt_tx39xx.h"
     42      1.24     lukem #include "opt_kgdb.h"
     43      1.24     lukem 
     44       1.1  takemura #include <sys/param.h>
     45       1.1  takemura #include <sys/systm.h>
     46       1.5  takemura #include <sys/reboot.h>
     47       1.1  takemura 
     48      1.31       uch #include <uvm/uvm_extern.h>
     49      1.31       uch 
     50       1.1  takemura #include <machine/sysconf.h>
     51      1.32  takemura #include <machine/bootinfo.h>
     52       1.1  takemura #include <machine/bus.h>
     53      1.32  takemura #include <machine/bus_space_hpcmips.h>
     54      1.35  takemura #include <machine/platid.h>
     55      1.35  takemura #include <machine/platid_mask.h>
     56       1.1  takemura 
     57      1.26     enami #include <dev/hpc/hpckbdvar.h>
     58      1.30       uch 
     59       1.1  takemura #include <hpcmips/vr/vr.h>
     60      1.11  takemura #include <hpcmips/vr/vr_asm.h>
     61      1.22      sato #include <hpcmips/vr/vrcpudef.h>
     62       1.3  takemura #include <hpcmips/vr/vripreg.h>
     63       1.1  takemura #include <hpcmips/vr/rtcreg.h>
     64       1.1  takemura 
     65      1.40      shin #include <mips/cache.h>
     66      1.40      shin 
     67      1.38  takemura #include "vrip_common.h"
     68      1.38  takemura #if NVRIP_COMMON > 0
     69       1.8  takemura #include <hpcmips/vr/vripvar.h>
     70       1.8  takemura #endif
     71       1.8  takemura 
     72       1.9      sato #include "vrbcu.h"
     73       1.9      sato #if NVRBCU > 0
     74       1.9      sato #include <hpcmips/vr/bcuvar.h>
     75       1.9      sato #endif
     76       1.9      sato 
     77       1.5  takemura #include "vrdsu.h"
     78       1.5  takemura #if NVRDSU > 0
     79       1.5  takemura #include <hpcmips/vr/vrdsuvar.h>
     80       1.5  takemura #endif
     81       1.5  takemura 
     82       1.1  takemura #include "com.h"
     83      1.35  takemura #include "com_vrip.h"
     84      1.35  takemura #include "com_hpcio.h"
     85      1.35  takemura #if NCOM > 0
     86       1.1  takemura #include <sys/termios.h>
     87       1.1  takemura #include <sys/ttydefaults.h>
     88       1.1  takemura #include <dev/ic/comreg.h>
     89       1.1  takemura #include <dev/ic/comvar.h>
     90      1.35  takemura #if NCOM_VRIP > 0
     91       1.1  takemura #include <hpcmips/vr/siureg.h>
     92       1.1  takemura #include <hpcmips/vr/com_vripvar.h>
     93      1.33  takemura #endif
     94      1.35  takemura #if NCOM_HPCIO > 0
     95      1.35  takemura #include <hpcmips/dev/com_hpciovar.h>
     96      1.33  takemura #endif
     97       1.1  takemura #ifndef CONSPEED
     98       1.1  takemura #define CONSPEED TTYDEF_SPEED
     99       1.1  takemura #endif
    100       1.1  takemura #endif
    101       1.1  takemura 
    102      1.15  takemura #include "hpcfb.h"
    103       1.3  takemura #include "vrkiu.h"
    104      1.25     enami #if (NVRKIU > 0) || (NHPCFB > 0)
    105       1.3  takemura #include <dev/wscons/wsdisplayvar.h>
    106      1.15  takemura #include <dev/rasops/rasops.h>
    107       1.3  takemura #endif
    108       1.3  takemura 
    109      1.15  takemura #if NHPCFB > 0
    110      1.20       uch #include <dev/hpc/hpcfbvar.h>
    111       1.3  takemura #endif
    112       1.3  takemura 
    113      1.15  takemura #if NVRKIU > 0
    114      1.26     enami #include <arch/hpcmips/vr/vrkiureg.h>
    115       1.3  takemura #include <arch/hpcmips/vr/vrkiuvar.h>
    116       1.3  takemura #endif
    117       1.3  takemura 
    118      1.31       uch #ifdef DEBUG
    119      1.31       uch #define STATIC
    120      1.31       uch #else
    121      1.31       uch #define STATIC	static
    122      1.31       uch #endif
    123      1.31       uch 
    124      1.31       uch /*
    125      1.31       uch  * This is a mask of bits to clear in the SR when we go to a
    126      1.31       uch  * given interrupt priority level.
    127      1.31       uch  */
    128      1.31       uch const u_int32_t __ipl_sr_bits_vr[_IPL_N] = {
    129      1.31       uch 	0,					/* IPL_NONE */
    130      1.31       uch 
    131      1.31       uch 	MIPS_SOFT_INT_MASK_0,			/* IPL_SOFTCLOCK */
    132      1.31       uch 
    133      1.31       uch 	MIPS_SOFT_INT_MASK_0|
    134      1.31       uch 		MIPS_SOFT_INT_MASK_1,		/* IPL_SOFTNET */
    135      1.31       uch 
    136      1.31       uch 	MIPS_SOFT_INT_MASK_0|
    137      1.31       uch 		MIPS_SOFT_INT_MASK_1|
    138  1.48.2.1        ad 		MIPS_INT_MASK_0,		/* IPL_VM */
    139      1.31       uch 
    140      1.31       uch 	MIPS_SOFT_INT_MASK_0|
    141      1.31       uch 		MIPS_SOFT_INT_MASK_1|
    142      1.31       uch 		MIPS_INT_MASK_0|
    143  1.48.2.1        ad 		MIPS_INT_MASK_1,		/* IPL_SCHED */
    144      1.31       uch };
    145      1.31       uch 
    146      1.31       uch #if defined(VR41XX) && defined(TX39XX)
    147      1.31       uch #define	VR_INTR	vr_intr
    148      1.31       uch #else
    149      1.31       uch #define	VR_INTR	cpu_intr	/* locore_mips3 directly call this */
    150      1.31       uch #endif
    151      1.31       uch 
    152      1.31       uch void vr_init(void);
    153      1.31       uch void VR_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
    154      1.31       uch extern void vr_idle(void);
    155      1.31       uch STATIC void vr_cons_init(void);
    156      1.47  christos STATIC void vr_fb_init(void **);
    157      1.31       uch STATIC void vr_mem_init(paddr_t);
    158      1.31       uch STATIC void vr_find_dram(paddr_t, paddr_t);
    159      1.31       uch STATIC void vr_reboot(int, char *);
    160       1.1  takemura 
    161       1.1  takemura /*
    162       1.1  takemura  * CPU interrupt dispatch table (HwInt[0:3])
    163       1.1  takemura  */
    164      1.31       uch STATIC int vr_null_handler(void *, u_int32_t, u_int32_t);
    165      1.31       uch STATIC int (*vr_intr_handler[4])(void *, u_int32_t, u_int32_t) =
    166       1.1  takemura {
    167      1.31       uch 	vr_null_handler,
    168      1.31       uch 	vr_null_handler,
    169      1.31       uch 	vr_null_handler,
    170      1.31       uch 	vr_null_handler
    171       1.1  takemura };
    172      1.31       uch STATIC void *vr_intr_arg[4];
    173       1.1  takemura 
    174      1.35  takemura #if NCOM > 0
    175      1.35  takemura /*
    176      1.35  takemura  * machine dependent serial console info
    177      1.35  takemura  */
    178      1.35  takemura static struct vr_com_platdep {
    179      1.35  takemura 	platid_mask_t *platidmask;
    180      1.35  takemura 	int (*attach)(bus_space_tag_t, int, int, int, tcflag_t, int);
    181      1.35  takemura 	int addr;
    182      1.35  takemura 	int freq;
    183      1.35  takemura } platdep_com_table[] = {
    184      1.35  takemura #if NCOM_HPCIO > 0
    185      1.35  takemura 	{
    186      1.35  takemura 		&platid_mask_MACH_NEC_MCR_SIGMARION2,
    187      1.35  takemura 		com_hpcio_cndb_attach,	/* attach proc */
    188      1.35  takemura 		0x0b600000,		/* base address */
    189      1.35  takemura 		COM_FREQ,		/* frequency */
    190      1.35  takemura 	},
    191      1.35  takemura #endif
    192      1.35  takemura #if NCOM_VRIP > 0
    193      1.37  takemura #ifdef VR4102
    194      1.37  takemura 	{
    195      1.37  takemura 		&platid_mask_CPU_MIPS_VR_4102,
    196      1.37  takemura 		com_vrip_cndb_attach,	/* attach proc */
    197      1.37  takemura 		VR4102_SIU_ADDR,	/* base address */
    198      1.37  takemura 		VRCOM_FREQ,		/* frequency */
    199      1.37  takemura 	},
    200      1.37  takemura #endif /* VR4102 */
    201      1.37  takemura #ifdef VR4111
    202      1.37  takemura 	{
    203      1.37  takemura 		&platid_mask_CPU_MIPS_VR_4111,
    204      1.37  takemura 		com_vrip_cndb_attach,	/* attach proc */
    205      1.37  takemura 		VR4102_SIU_ADDR,	/* base address */
    206      1.37  takemura 		VRCOM_FREQ,		/* frequency */
    207      1.37  takemura 	},
    208      1.37  takemura #endif /* VR4111 */
    209      1.37  takemura #ifdef VR4121
    210      1.37  takemura 	{
    211      1.37  takemura 		&platid_mask_CPU_MIPS_VR_4121,
    212      1.37  takemura 		com_vrip_cndb_attach,	/* attach proc */
    213      1.37  takemura 		VR4102_SIU_ADDR,	/* base address */
    214      1.37  takemura 		VRCOM_FREQ,		/* frequency */
    215      1.37  takemura 	},
    216      1.37  takemura #endif /* VR4121 */
    217      1.37  takemura #ifdef VR4122
    218      1.37  takemura 	{
    219      1.37  takemura 		&platid_mask_CPU_MIPS_VR_4122,
    220      1.37  takemura 		com_vrip_cndb_attach,	/* attach proc */
    221      1.37  takemura 		VR4122_SIU_ADDR,	/* base address */
    222      1.37  takemura 		VRCOM_FREQ,		/* frequency */
    223      1.37  takemura 	},
    224      1.37  takemura #endif /* VR4122 */
    225      1.37  takemura #ifdef VR4131
    226      1.37  takemura 	{
    227      1.37  takemura 		&platid_mask_CPU_MIPS_VR_4122,
    228      1.37  takemura 		com_vrip_cndb_attach,	/* attach proc */
    229      1.37  takemura 		VR4122_SIU_ADDR,	/* base address */
    230      1.37  takemura 		VRCOM_FREQ,		/* frequency */
    231      1.37  takemura 	},
    232      1.37  takemura #endif /* VR4131 */
    233      1.37  takemura #ifdef SINGLE_VRIP_BASE
    234      1.35  takemura 	{
    235      1.35  takemura 		&platid_wild,
    236      1.35  takemura 		com_vrip_cndb_attach,	/* attach proc */
    237      1.35  takemura 		VRIP_SIU_ADDR,		/* base address */
    238      1.35  takemura 		VRCOM_FREQ,		/* frequency */
    239      1.35  takemura 	},
    240      1.37  takemura #endif /* SINGLE_VRIP_BASE */
    241      1.37  takemura #else /* NCOM_VRIP > 0 */
    242      1.35  takemura 	/* dummy */
    243      1.35  takemura 	{
    244      1.35  takemura 		&platid_wild,
    245      1.35  takemura 		NULL,			/* attach proc */
    246      1.35  takemura 		0,			/* base address */
    247      1.35  takemura 		0,			/* frequency */
    248      1.35  takemura 	},
    249      1.37  takemura #endif /* NCOM_VRIP > 0 */
    250      1.35  takemura };
    251      1.35  takemura #endif /* NCOM > 0 */
    252      1.35  takemura 
    253      1.39  takemura #if NVRKIU > 0
    254      1.39  takemura /*
    255      1.39  takemura  * machine dependent keyboard info
    256      1.39  takemura  */
    257      1.39  takemura static struct vr_kiu_platdep {
    258      1.39  takemura 	platid_mask_t *platidmask;
    259      1.39  takemura 	int addr;
    260      1.39  takemura } platdep_kiu_table[] = {
    261      1.39  takemura #ifdef VR4102
    262      1.39  takemura 	{
    263      1.39  takemura 		&platid_mask_CPU_MIPS_VR_4102,
    264      1.39  takemura 		VR4102_KIU_ADDR,	/* base address */
    265      1.39  takemura 	},
    266      1.39  takemura #endif /* VR4102 */
    267      1.39  takemura #ifdef VR4111
    268      1.39  takemura 	{
    269      1.39  takemura 		&platid_mask_CPU_MIPS_VR_4111,
    270      1.39  takemura 		VR4102_KIU_ADDR,	/* base address */
    271      1.39  takemura 	},
    272      1.39  takemura #endif /* VR4111 */
    273      1.39  takemura #ifdef VR4121
    274      1.39  takemura 	{
    275      1.39  takemura 		&platid_mask_CPU_MIPS_VR_4121,
    276      1.39  takemura 		VR4102_KIU_ADDR,	/* base address */
    277      1.39  takemura 	},
    278      1.39  takemura #endif /* VR4121 */
    279      1.39  takemura 	{
    280      1.39  takemura 		&platid_wild,
    281      1.39  takemura #ifdef SINGLE_VRIP_BASE
    282      1.39  takemura 		VRIP_KIU_ADDR,		/* base address */
    283      1.39  takemura #else
    284      1.39  takemura 		VRIP_NO_ADDR,		/* base address */
    285      1.39  takemura #endif /* SINGLE_VRIP_BASE */
    286      1.39  takemura 	},
    287      1.39  takemura };
    288      1.39  takemura #endif /* NVRKIU > 0 */
    289      1.39  takemura 
    290       1.1  takemura void
    291       1.1  takemura vr_init()
    292       1.1  takemura {
    293       1.1  takemura 	/*
    294       1.1  takemura 	 * Platform Specific Function Hooks
    295       1.1  takemura 	 */
    296      1.29       uch 	platform.cpu_idle	= vr_idle;
    297      1.31       uch 	platform.cpu_intr	= VR_INTR;
    298      1.29       uch 	platform.cons_init	= vr_cons_init;
    299      1.29       uch 	platform.fb_init	= vr_fb_init;
    300      1.29       uch 	platform.mem_init	= vr_mem_init;
    301      1.29       uch 	platform.reboot		= vr_reboot;
    302       1.1  takemura 
    303       1.9      sato #if NVRBCU > 0
    304      1.12      sato 	sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
    305       1.1  takemura 		vrbcu_vrip_getcpuname(),
    306       1.1  takemura 		vrbcu_vrip_getcpumajor(),
    307      1.10      shin 		vrbcu_vrip_getcpuminor(),
    308      1.10      shin 		vrbcu_vrip_getcpuclock() / 1000000,
    309      1.10      shin 		(vrbcu_vrip_getcpuclock() % 1000000) / 1000);
    310       1.9      sato #else
    311      1.12      sato 	sprintf(cpu_name, "NEC VR41xx");
    312       1.9      sato #endif
    313       1.4       uch }
    314       1.4       uch 
    315      1.13      shin void
    316      1.28       uch vr_mem_init(paddr_t kernend)
    317       1.4       uch {
    318      1.25     enami 
    319      1.13      shin 	mem_clusters[0].start = 0;
    320      1.13      shin 	mem_clusters[0].size = kernend;
    321      1.13      shin 	mem_cluster_cnt = 1;
    322      1.25     enami 
    323      1.13      shin 	vr_find_dram(kernend, 0x02000000);
    324      1.13      shin 	vr_find_dram(0x02000000, 0x04000000);
    325      1.13      shin 	vr_find_dram(0x04000000, 0x06000000);
    326      1.13      shin 	vr_find_dram(0x06000000, 0x08000000);
    327      1.13      shin }
    328      1.13      shin 
    329      1.13      shin void
    330      1.28       uch vr_find_dram(paddr_t addr, paddr_t end)
    331      1.13      shin {
    332      1.13      shin 	int n;
    333      1.48        he 	char *page;
    334      1.13      shin #ifdef NARLY_MEMORY_PROBE
    335      1.13      shin 	int x, i;
    336      1.13      shin #endif
    337      1.13      shin 
    338      1.25     enami #ifdef VR_FIND_DRAMLIM
    339      1.25     enami 	if (VR_FIND_DRAMLIM < end)
    340      1.25     enami 		end = VR_FIND_DRAMLIM;
    341      1.31       uch #endif /* VR_FIND_DRAMLIM */
    342      1.13      shin 	n = mem_cluster_cnt;
    343      1.41   thorpej 	for (; addr < end; addr += PAGE_SIZE) {
    344      1.13      shin 
    345      1.48        he 		page = (char *)MIPS_PHYS_TO_KSEG1(addr);
    346      1.13      shin 		if (badaddr(page, 4))
    347      1.13      shin 			goto bad;
    348      1.14      shin 
    349      1.14      shin 		/* stop memory probing at first memory image */
    350      1.14      shin 		if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
    351      1.14      shin 			return;
    352      1.13      shin 
    353      1.13      shin 		*(volatile int *)(page+0) = 0xa5a5a5a5;
    354      1.13      shin 		*(volatile int *)(page+4) = 0x5a5a5a5a;
    355      1.13      shin 		wbflush();
    356      1.13      shin 		if (*(volatile int *)(page+0) != 0xa5a5a5a5)
    357      1.13      shin 			goto bad;
    358      1.13      shin 
    359      1.13      shin 		*(volatile int *)(page+0) = 0x5a5a5a5a;
    360      1.13      shin 		*(volatile int *)(page+4) = 0xa5a5a5a5;
    361      1.13      shin 		wbflush();
    362      1.13      shin 		if (*(volatile int *)(page+0) != 0x5a5a5a5a)
    363      1.13      shin 			goto bad;
    364      1.13      shin 
    365      1.13      shin #ifdef NARLY_MEMORY_PROBE
    366      1.13      shin 		x = random();
    367      1.41   thorpej 		for (i = 0; i < PAGE_SIZE; i += 4)
    368      1.13      shin 			*(volatile int *)(page+i) = (x ^ i);
    369       1.4       uch 		wbflush();
    370      1.41   thorpej 		for (i = 0; i < PAGE_SIZE; i += 4)
    371      1.13      shin 			if (*(volatile int *)(page+i) != (x ^ i))
    372      1.13      shin 				goto bad;
    373      1.13      shin 
    374      1.13      shin 		x = random();
    375      1.41   thorpej 		for (i = 0; i < PAGE_SIZE; i += 4)
    376      1.13      shin 			*(volatile int *)(page+i) = (x ^ i);
    377      1.13      shin 		wbflush();
    378      1.41   thorpej 		for (i = 0; i < PAGE_SIZE; i += 4)
    379      1.13      shin 			if (*(volatile int *)(page+i) != (x ^ i))
    380      1.13      shin 				goto bad;
    381      1.31       uch #endif /* NARLY_MEMORY_PROBE */
    382      1.13      shin 
    383      1.13      shin 		if (!mem_clusters[n].size)
    384      1.13      shin 			mem_clusters[n].start = addr;
    385      1.41   thorpej 		mem_clusters[n].size += PAGE_SIZE;
    386      1.13      shin 		continue;
    387      1.13      shin 
    388      1.13      shin 	bad:
    389      1.13      shin 		if (mem_clusters[n].size)
    390      1.13      shin 			++n;
    391      1.13      shin 		continue;
    392       1.4       uch 	}
    393      1.13      shin 	if (mem_clusters[n].size)
    394      1.13      shin 		++n;
    395      1.13      shin 	mem_cluster_cnt = n;
    396       1.4       uch }
    397       1.4       uch 
    398       1.4       uch void
    399      1.47  christos vr_fb_init(void **kernend)
    400       1.4       uch {
    401       1.4       uch 	/* Nothing to do */
    402       1.1  takemura }
    403       1.1  takemura 
    404       1.1  takemura void
    405       1.1  takemura vr_cons_init()
    406       1.1  takemura {
    407      1.35  takemura #if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0
    408      1.30       uch 	bus_space_tag_t iot = hpcmips_system_bus_space();
    409       1.1  takemura #endif
    410      1.35  takemura #if NCOM > 0
    411      1.35  takemura 	static struct vr_com_platdep *com_info;
    412      1.35  takemura #endif
    413      1.39  takemura #if NVRKIU > 0
    414      1.39  takemura 	static struct vr_kiu_platdep *kiu_info;
    415      1.39  takemura #endif
    416       1.1  takemura 
    417       1.1  takemura #if NCOM > 0
    418      1.35  takemura 	com_info = platid_search(&platid, platdep_com_table,
    419      1.35  takemura 	    sizeof(platdep_com_table)/sizeof(*platdep_com_table),
    420      1.35  takemura 	    sizeof(*platdep_com_table));
    421      1.18     jeffs #ifdef KGDB
    422      1.35  takemura 	if (com_info->attach != NULL) {
    423      1.35  takemura 		/* if KGDB is defined, always use the serial port for KGDB */
    424      1.35  takemura 		if ((*com_info->attach)(iot, com_info->addr, 9600,
    425      1.35  takemura 		    com_info->freq,
    426      1.35  takemura 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
    427      1.35  takemura 			printf("%s(%d): can't init kgdb's serial port",
    428      1.23     enami 			    __FILE__, __LINE__);
    429       1.1  takemura 		}
    430      1.33  takemura #else /* KGDB */
    431      1.35  takemura 	if (com_info->attach != NULL && (bootinfo->bi_cnuse&BI_CNUSE_SERIAL)) {
    432      1.33  takemura 		/* Serial console */
    433      1.35  takemura 		if ((*com_info->attach)(iot, com_info->addr, CONSPEED,
    434      1.35  takemura 		    com_info->freq,
    435      1.35  takemura 		    (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) {
    436      1.33  takemura 			printf("%s(%d): can't init serial console",
    437      1.33  takemura 			    __FILE__, __LINE__);
    438      1.33  takemura 		} else {
    439      1.33  takemura 			return;
    440      1.33  takemura 		}
    441      1.33  takemura 	}
    442      1.33  takemura #endif /* KGDB */
    443      1.35  takemura #endif /* NCOM > 0 */
    444       1.1  takemura 
    445      1.15  takemura #if NHPCFB > 0
    446      1.17       uch 	if (hpcfb_cnattach(NULL)) {
    447       1.3  takemura 		printf("%s(%d): can't init fb console", __FILE__, __LINE__);
    448       1.3  takemura 	} else {
    449       1.3  takemura 		goto find_keyboard;
    450       1.3  takemura 	}
    451      1.25     enami  find_keyboard:
    452      1.30       uch #endif /* NHPCFB > 0 */
    453       1.3  takemura 
    454      1.39  takemura #if NVRKIU > 0
    455      1.39  takemura 	kiu_info = platid_search(&platid, platdep_kiu_table,
    456      1.39  takemura 	    sizeof(platdep_kiu_table)/sizeof(*platdep_kiu_table),
    457      1.39  takemura 	    sizeof(*platdep_kiu_table));
    458      1.39  takemura 	if (kiu_info->addr != VRIP_NO_ADDR) {
    459      1.39  takemura 		if (vrkiu_cnattach(iot, kiu_info->addr)) {
    460      1.39  takemura 			printf("%s(%d): can't init vrkiu as console",
    461      1.39  takemura 			    __FILE__, __LINE__);
    462      1.39  takemura 		} else {
    463      1.39  takemura 			return;
    464      1.39  takemura 		}
    465       1.3  takemura 	}
    466      1.39  takemura #endif /* NVRKIU > 0 */
    467       1.5  takemura }
    468       1.5  takemura 
    469      1.40      shin extern char vr_hibernate[];
    470      1.40      shin extern char evr_hibernate[];
    471      1.40      shin 
    472       1.5  takemura void
    473      1.28       uch vr_reboot(int howto, char *bootstr)
    474       1.5  takemura {
    475       1.7  takemura 	/*
    476       1.7  takemura 	 * power down
    477       1.7  takemura 	 */
    478       1.7  takemura 	if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
    479       1.7  takemura 		printf("fake powerdown\n");
    480      1.40      shin 		/*
    481      1.40      shin 		 * copy vr_hibernate() to top of physical memory.
    482      1.40      shin 		 */
    483      1.40      shin 		memcpy((void *)MIPS_KSEG0_START, vr_hibernate,
    484      1.40      shin 		   evr_hibernate - (char *)vr_hibernate);
    485      1.40      shin 		/* sync I&D cache */
    486      1.40      shin 		mips_dcache_wbinv_all();
    487      1.40      shin 		mips_icache_sync_all();
    488      1.40      shin 		/*
    489      1.40      shin 		 * call vr_hibernate() at MIPS_KSEG0_START.
    490      1.40      shin 		 */
    491      1.40      shin 		((void (*)(void *,int))MIPS_KSEG0_START)(
    492      1.40      shin 		    (void *)MIPS_KSEG0_START, ptoa(physmem));
    493       1.7  takemura 		/* not reach */
    494       1.7  takemura 		vr_reboot(howto&~RB_HALT, bootstr);
    495       1.7  takemura 	}
    496       1.7  takemura 	/*
    497       1.8  takemura 	 * halt
    498       1.7  takemura 	 */
    499       1.8  takemura 	if (howto & RB_HALT) {
    500      1.38  takemura #if NVRIP_COMMON > 0
    501       1.8  takemura 		_spllower(~MIPS_INT_MASK_0);
    502       1.8  takemura 		vrip_intr_suspend();
    503       1.5  takemura #else
    504       1.8  takemura 		splhigh();
    505       1.5  takemura #endif
    506       1.7  takemura 		__asm(".set noreorder");
    507      1.44   mycroft 		__asm(".word	" ___STRING(VR_OPCODE_SUSPEND));
    508       1.6      sato 		__asm("nop");
    509       1.6      sato 		__asm("nop");
    510       1.6      sato 		__asm("nop");
    511       1.6      sato 		__asm("nop");
    512       1.6      sato 		__asm("nop");
    513       1.7  takemura 		__asm(".set reorder");
    514      1.38  takemura #if NVRIP_COMMON > 0
    515       1.8  takemura 		vrip_intr_resume();
    516       1.8  takemura #endif
    517       1.6      sato 	}
    518       1.8  takemura 	/*
    519       1.8  takemura 	 * reset
    520       1.8  takemura 	 */
    521       1.8  takemura #if NVRDSU
    522       1.8  takemura 	vrdsu_reset();
    523       1.8  takemura #else
    524       1.8  takemura 	printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
    525       1.8  takemura #endif
    526       1.1  takemura }
    527       1.1  takemura 
    528      1.30       uch /*
    529      1.30       uch  * Handle interrupts.
    530      1.30       uch  */
    531      1.31       uch void
    532      1.31       uch VR_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
    533      1.30       uch {
    534      1.31       uch 	uvmexp.intrs++;
    535      1.31       uch 
    536      1.45  hamajima 	/* Deal with unneded compare interrupts occasionally so that we can
    537      1.45  hamajima 	 * keep spllowersoftclock. */
    538      1.31       uch 	if (ipending & MIPS_INT_MASK_5) {
    539      1.45  hamajima 		mips3_cp0_compare_write(0);
    540      1.31       uch 	}
    541      1.31       uch 
    542      1.31       uch 	if (ipending & MIPS_INT_MASK_1) {
    543      1.45  hamajima 		_splset(MIPS_SR_INT_IE); /* for spllowersoftclock */
    544      1.45  hamajima 		/* Remove the lower priority pending bits from status so that
    545      1.45  hamajima 		 * spllowersoftclock will not happen if other interrupts are
    546      1.45  hamajima 		 * pending. */
    547      1.45  hamajima 		(*vr_intr_handler[1])(vr_intr_arg[1], pc, status & ~(ipending
    548      1.45  hamajima 		& (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)));
    549      1.31       uch 	}
    550      1.31       uch 
    551      1.31       uch 	if (ipending & MIPS_INT_MASK_0) {
    552      1.45  hamajima 		_splset(MIPS_INT_MASK_1|MIPS_SR_INT_IE);
    553      1.31       uch 		(*vr_intr_handler[0])(vr_intr_arg[0], pc, status);
    554      1.45  hamajima 	}
    555      1.31       uch 
    556  1.48.2.1        ad #ifdef __HAVE_FAST_SOFTINTS
    557      1.45  hamajima 	if (ipending & MIPS_SOFT_INT_MASK_1) {
    558      1.45  hamajima 		_splset(MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SR_INT_IE);
    559      1.45  hamajima 		softintr(MIPS_SOFT_INT_MASK_1);
    560      1.31       uch 	}
    561      1.31       uch 
    562      1.45  hamajima 	if (ipending & MIPS_SOFT_INT_MASK_0) {
    563      1.45  hamajima 		_splset(MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_1|MIPS_INT_MASK_0|
    564      1.45  hamajima 		    MIPS_SR_INT_IE);
    565      1.45  hamajima 		softintr(MIPS_SOFT_INT_MASK_0);
    566      1.45  hamajima 	}
    567  1.48.2.1        ad #endif
    568      1.30       uch }
    569      1.30       uch 
    570       1.1  takemura void *
    571      1.30       uch vr_intr_establish(int line, int (*ih_fun)(void *, u_int32_t, u_int32_t),
    572      1.28       uch     void *ih_arg)
    573       1.1  takemura {
    574      1.28       uch 
    575      1.31       uch 	KDASSERT(vr_intr_handler[line] == vr_null_handler);
    576      1.31       uch 
    577      1.31       uch 	vr_intr_handler[line] = ih_fun;
    578      1.31       uch 	vr_intr_arg[line] = ih_arg;
    579       1.1  takemura 
    580      1.31       uch 	return ((void *)line);
    581       1.1  takemura }
    582       1.1  takemura 
    583       1.1  takemura void
    584      1.28       uch vr_intr_disestablish(void *ih)
    585       1.1  takemura {
    586       1.1  takemura 	int line = (int)ih;
    587      1.28       uch 
    588      1.31       uch 	vr_intr_handler[line] = vr_null_handler;
    589      1.31       uch 	vr_intr_arg[line] = NULL;
    590       1.1  takemura }
    591       1.1  takemura 
    592       1.1  takemura int
    593      1.31       uch vr_null_handler(void *arg, u_int32_t pc, u_int32_t status)
    594       1.1  takemura {
    595      1.31       uch 
    596      1.31       uch 	printf("vr_null_handler\n");
    597      1.28       uch 
    598      1.28       uch 	return (0);
    599       1.1  takemura }
    600      1.22      sato 
    601      1.22      sato /*
    602      1.22      sato int x4181 = VR4181;
    603      1.22      sato int x4101 = VR4101;
    604      1.22      sato int x4102 = VR4102;
    605      1.22      sato int x4111 = VR4111;
    606      1.22      sato int x4121 = VR4121;
    607      1.22      sato int x4122 = VR4122;
    608      1.22      sato int xo4181 = ONLY_VR4181;
    609      1.22      sato int xo4101 = ONLY_VR4101;
    610      1.22      sato int xo4102 = ONLY_VR4102;
    611      1.22      sato int xo4111_4121 = ONLY_VR4111_4121;
    612      1.22      sato int g4101=VRGROUP_4101;
    613      1.22      sato int g4102=VRGROUP_4102;
    614      1.22      sato int g4181=VRGROUP_4181;
    615      1.22      sato int g4102_4121=VRGROUP_4102_4121;
    616      1.22      sato int g4111_4121=VRGROUP_4111_4121;
    617      1.22      sato int g4102_4122=VRGROUP_4102_4122;
    618      1.22      sato int g4111_4122=VRGROUP_4111_4122;
    619      1.22      sato int single_vrip_base=SINGLE_VRIP_BASE;
    620      1.22      sato int vrip_base_addr=VRIP_BASE_ADDR;
    621      1.22      sato */
    622