vr.c revision 1.51 1 1.51 tsutsui /* $NetBSD: vr.c,v 1.51 2008/04/04 12:36:06 tsutsui Exp $ */
2 1.1 takemura
3 1.1 takemura /*-
4 1.35 takemura * Copyright (c) 1999-2002
5 1.1 takemura * Shin Takemura and PocketBSD Project. All rights reserved.
6 1.1 takemura *
7 1.1 takemura * Redistribution and use in source and binary forms, with or without
8 1.1 takemura * modification, are permitted provided that the following conditions
9 1.1 takemura * are met:
10 1.1 takemura * 1. Redistributions of source code must retain the above copyright
11 1.1 takemura * notice, this list of conditions and the following disclaimer.
12 1.1 takemura * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 takemura * notice, this list of conditions and the following disclaimer in the
14 1.1 takemura * documentation and/or other materials provided with the distribution.
15 1.1 takemura * 3. All advertising materials mentioning features or use of this software
16 1.1 takemura * must display the following acknowledgement:
17 1.1 takemura * This product includes software developed by the PocketBSD project
18 1.1 takemura * and its contributors.
19 1.1 takemura * 4. Neither the name of the project nor the names of its contributors
20 1.1 takemura * may be used to endorse or promote products derived from this software
21 1.1 takemura * without specific prior written permission.
22 1.1 takemura *
23 1.1 takemura * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 1.1 takemura * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 1.1 takemura * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 1.1 takemura * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 1.1 takemura * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 1.1 takemura * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 1.1 takemura * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 1.1 takemura * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 1.1 takemura * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 1.1 takemura * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 1.1 takemura * SUCH DAMAGE.
34 1.1 takemura *
35 1.1 takemura */
36 1.42 lukem
37 1.42 lukem #include <sys/cdefs.h>
38 1.51 tsutsui __KERNEL_RCSID(0, "$NetBSD: vr.c,v 1.51 2008/04/04 12:36:06 tsutsui Exp $");
39 1.29 uch
40 1.29 uch #include "opt_vr41xx.h"
41 1.31 uch #include "opt_tx39xx.h"
42 1.24 lukem #include "opt_kgdb.h"
43 1.24 lukem
44 1.1 takemura #include <sys/param.h>
45 1.1 takemura #include <sys/systm.h>
46 1.5 takemura #include <sys/reboot.h>
47 1.50 ad #include <sys/device.h>
48 1.50 ad #include <sys/bus.h>
49 1.1 takemura
50 1.31 uch #include <uvm/uvm_extern.h>
51 1.31 uch
52 1.1 takemura #include <machine/sysconf.h>
53 1.32 takemura #include <machine/bootinfo.h>
54 1.32 takemura #include <machine/bus_space_hpcmips.h>
55 1.35 takemura #include <machine/platid.h>
56 1.35 takemura #include <machine/platid_mask.h>
57 1.1 takemura
58 1.26 enami #include <dev/hpc/hpckbdvar.h>
59 1.30 uch
60 1.1 takemura #include <hpcmips/vr/vr.h>
61 1.11 takemura #include <hpcmips/vr/vr_asm.h>
62 1.22 sato #include <hpcmips/vr/vrcpudef.h>
63 1.3 takemura #include <hpcmips/vr/vripreg.h>
64 1.1 takemura #include <hpcmips/vr/rtcreg.h>
65 1.1 takemura
66 1.40 shin #include <mips/cache.h>
67 1.40 shin
68 1.38 takemura #include "vrip_common.h"
69 1.38 takemura #if NVRIP_COMMON > 0
70 1.8 takemura #include <hpcmips/vr/vripvar.h>
71 1.8 takemura #endif
72 1.8 takemura
73 1.9 sato #include "vrbcu.h"
74 1.9 sato #if NVRBCU > 0
75 1.9 sato #include <hpcmips/vr/bcuvar.h>
76 1.9 sato #endif
77 1.9 sato
78 1.5 takemura #include "vrdsu.h"
79 1.5 takemura #if NVRDSU > 0
80 1.5 takemura #include <hpcmips/vr/vrdsuvar.h>
81 1.5 takemura #endif
82 1.5 takemura
83 1.1 takemura #include "com.h"
84 1.35 takemura #include "com_vrip.h"
85 1.35 takemura #include "com_hpcio.h"
86 1.35 takemura #if NCOM > 0
87 1.1 takemura #include <sys/termios.h>
88 1.1 takemura #include <sys/ttydefaults.h>
89 1.1 takemura #include <dev/ic/comreg.h>
90 1.1 takemura #include <dev/ic/comvar.h>
91 1.35 takemura #if NCOM_VRIP > 0
92 1.1 takemura #include <hpcmips/vr/siureg.h>
93 1.1 takemura #include <hpcmips/vr/com_vripvar.h>
94 1.33 takemura #endif
95 1.35 takemura #if NCOM_HPCIO > 0
96 1.35 takemura #include <hpcmips/dev/com_hpciovar.h>
97 1.33 takemura #endif
98 1.1 takemura #ifndef CONSPEED
99 1.1 takemura #define CONSPEED TTYDEF_SPEED
100 1.1 takemura #endif
101 1.1 takemura #endif
102 1.1 takemura
103 1.15 takemura #include "hpcfb.h"
104 1.3 takemura #include "vrkiu.h"
105 1.25 enami #if (NVRKIU > 0) || (NHPCFB > 0)
106 1.3 takemura #include <dev/wscons/wsdisplayvar.h>
107 1.15 takemura #include <dev/rasops/rasops.h>
108 1.3 takemura #endif
109 1.3 takemura
110 1.15 takemura #if NHPCFB > 0
111 1.20 uch #include <dev/hpc/hpcfbvar.h>
112 1.3 takemura #endif
113 1.3 takemura
114 1.15 takemura #if NVRKIU > 0
115 1.26 enami #include <arch/hpcmips/vr/vrkiureg.h>
116 1.3 takemura #include <arch/hpcmips/vr/vrkiuvar.h>
117 1.3 takemura #endif
118 1.3 takemura
119 1.31 uch #ifdef DEBUG
120 1.31 uch #define STATIC
121 1.31 uch #else
122 1.31 uch #define STATIC static
123 1.31 uch #endif
124 1.31 uch
125 1.31 uch /*
126 1.31 uch * This is a mask of bits to clear in the SR when we go to a
127 1.31 uch * given interrupt priority level.
128 1.31 uch */
129 1.31 uch const u_int32_t __ipl_sr_bits_vr[_IPL_N] = {
130 1.31 uch 0, /* IPL_NONE */
131 1.31 uch
132 1.31 uch MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */
133 1.31 uch
134 1.31 uch MIPS_SOFT_INT_MASK_0|
135 1.31 uch MIPS_SOFT_INT_MASK_1, /* IPL_SOFTNET */
136 1.31 uch
137 1.31 uch MIPS_SOFT_INT_MASK_0|
138 1.31 uch MIPS_SOFT_INT_MASK_1|
139 1.49 ad MIPS_INT_MASK_0, /* IPL_VM */
140 1.31 uch
141 1.31 uch MIPS_SOFT_INT_MASK_0|
142 1.31 uch MIPS_SOFT_INT_MASK_1|
143 1.31 uch MIPS_INT_MASK_0|
144 1.49 ad MIPS_INT_MASK_1, /* IPL_SCHED */
145 1.31 uch };
146 1.31 uch
147 1.31 uch #if defined(VR41XX) && defined(TX39XX)
148 1.31 uch #define VR_INTR vr_intr
149 1.31 uch #else
150 1.31 uch #define VR_INTR cpu_intr /* locore_mips3 directly call this */
151 1.31 uch #endif
152 1.31 uch
153 1.31 uch void vr_init(void);
154 1.31 uch void VR_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
155 1.31 uch extern void vr_idle(void);
156 1.31 uch STATIC void vr_cons_init(void);
157 1.47 christos STATIC void vr_fb_init(void **);
158 1.31 uch STATIC void vr_mem_init(paddr_t);
159 1.31 uch STATIC void vr_find_dram(paddr_t, paddr_t);
160 1.31 uch STATIC void vr_reboot(int, char *);
161 1.1 takemura
162 1.1 takemura /*
163 1.1 takemura * CPU interrupt dispatch table (HwInt[0:3])
164 1.1 takemura */
165 1.31 uch STATIC int vr_null_handler(void *, u_int32_t, u_int32_t);
166 1.31 uch STATIC int (*vr_intr_handler[4])(void *, u_int32_t, u_int32_t) =
167 1.1 takemura {
168 1.31 uch vr_null_handler,
169 1.31 uch vr_null_handler,
170 1.31 uch vr_null_handler,
171 1.31 uch vr_null_handler
172 1.1 takemura };
173 1.31 uch STATIC void *vr_intr_arg[4];
174 1.1 takemura
175 1.35 takemura #if NCOM > 0
176 1.35 takemura /*
177 1.35 takemura * machine dependent serial console info
178 1.35 takemura */
179 1.35 takemura static struct vr_com_platdep {
180 1.35 takemura platid_mask_t *platidmask;
181 1.35 takemura int (*attach)(bus_space_tag_t, int, int, int, tcflag_t, int);
182 1.35 takemura int addr;
183 1.35 takemura int freq;
184 1.35 takemura } platdep_com_table[] = {
185 1.35 takemura #if NCOM_HPCIO > 0
186 1.35 takemura {
187 1.35 takemura &platid_mask_MACH_NEC_MCR_SIGMARION2,
188 1.35 takemura com_hpcio_cndb_attach, /* attach proc */
189 1.35 takemura 0x0b600000, /* base address */
190 1.35 takemura COM_FREQ, /* frequency */
191 1.35 takemura },
192 1.35 takemura #endif
193 1.35 takemura #if NCOM_VRIP > 0
194 1.37 takemura #ifdef VR4102
195 1.37 takemura {
196 1.37 takemura &platid_mask_CPU_MIPS_VR_4102,
197 1.37 takemura com_vrip_cndb_attach, /* attach proc */
198 1.37 takemura VR4102_SIU_ADDR, /* base address */
199 1.37 takemura VRCOM_FREQ, /* frequency */
200 1.37 takemura },
201 1.37 takemura #endif /* VR4102 */
202 1.37 takemura #ifdef VR4111
203 1.37 takemura {
204 1.37 takemura &platid_mask_CPU_MIPS_VR_4111,
205 1.37 takemura com_vrip_cndb_attach, /* attach proc */
206 1.37 takemura VR4102_SIU_ADDR, /* base address */
207 1.37 takemura VRCOM_FREQ, /* frequency */
208 1.37 takemura },
209 1.37 takemura #endif /* VR4111 */
210 1.37 takemura #ifdef VR4121
211 1.37 takemura {
212 1.37 takemura &platid_mask_CPU_MIPS_VR_4121,
213 1.37 takemura com_vrip_cndb_attach, /* attach proc */
214 1.37 takemura VR4102_SIU_ADDR, /* base address */
215 1.37 takemura VRCOM_FREQ, /* frequency */
216 1.37 takemura },
217 1.37 takemura #endif /* VR4121 */
218 1.37 takemura #ifdef VR4122
219 1.37 takemura {
220 1.37 takemura &platid_mask_CPU_MIPS_VR_4122,
221 1.37 takemura com_vrip_cndb_attach, /* attach proc */
222 1.37 takemura VR4122_SIU_ADDR, /* base address */
223 1.37 takemura VRCOM_FREQ, /* frequency */
224 1.37 takemura },
225 1.37 takemura #endif /* VR4122 */
226 1.37 takemura #ifdef VR4131
227 1.37 takemura {
228 1.37 takemura &platid_mask_CPU_MIPS_VR_4122,
229 1.37 takemura com_vrip_cndb_attach, /* attach proc */
230 1.37 takemura VR4122_SIU_ADDR, /* base address */
231 1.37 takemura VRCOM_FREQ, /* frequency */
232 1.37 takemura },
233 1.37 takemura #endif /* VR4131 */
234 1.37 takemura #ifdef SINGLE_VRIP_BASE
235 1.35 takemura {
236 1.35 takemura &platid_wild,
237 1.35 takemura com_vrip_cndb_attach, /* attach proc */
238 1.35 takemura VRIP_SIU_ADDR, /* base address */
239 1.35 takemura VRCOM_FREQ, /* frequency */
240 1.35 takemura },
241 1.37 takemura #endif /* SINGLE_VRIP_BASE */
242 1.37 takemura #else /* NCOM_VRIP > 0 */
243 1.35 takemura /* dummy */
244 1.35 takemura {
245 1.35 takemura &platid_wild,
246 1.35 takemura NULL, /* attach proc */
247 1.35 takemura 0, /* base address */
248 1.35 takemura 0, /* frequency */
249 1.35 takemura },
250 1.37 takemura #endif /* NCOM_VRIP > 0 */
251 1.35 takemura };
252 1.35 takemura #endif /* NCOM > 0 */
253 1.35 takemura
254 1.39 takemura #if NVRKIU > 0
255 1.39 takemura /*
256 1.39 takemura * machine dependent keyboard info
257 1.39 takemura */
258 1.39 takemura static struct vr_kiu_platdep {
259 1.39 takemura platid_mask_t *platidmask;
260 1.39 takemura int addr;
261 1.39 takemura } platdep_kiu_table[] = {
262 1.39 takemura #ifdef VR4102
263 1.39 takemura {
264 1.39 takemura &platid_mask_CPU_MIPS_VR_4102,
265 1.39 takemura VR4102_KIU_ADDR, /* base address */
266 1.39 takemura },
267 1.39 takemura #endif /* VR4102 */
268 1.39 takemura #ifdef VR4111
269 1.39 takemura {
270 1.39 takemura &platid_mask_CPU_MIPS_VR_4111,
271 1.39 takemura VR4102_KIU_ADDR, /* base address */
272 1.39 takemura },
273 1.39 takemura #endif /* VR4111 */
274 1.39 takemura #ifdef VR4121
275 1.39 takemura {
276 1.39 takemura &platid_mask_CPU_MIPS_VR_4121,
277 1.39 takemura VR4102_KIU_ADDR, /* base address */
278 1.39 takemura },
279 1.39 takemura #endif /* VR4121 */
280 1.39 takemura {
281 1.39 takemura &platid_wild,
282 1.39 takemura #ifdef SINGLE_VRIP_BASE
283 1.39 takemura VRIP_KIU_ADDR, /* base address */
284 1.39 takemura #else
285 1.39 takemura VRIP_NO_ADDR, /* base address */
286 1.39 takemura #endif /* SINGLE_VRIP_BASE */
287 1.39 takemura },
288 1.39 takemura };
289 1.39 takemura #endif /* NVRKIU > 0 */
290 1.39 takemura
291 1.1 takemura void
292 1.1 takemura vr_init()
293 1.1 takemura {
294 1.1 takemura /*
295 1.1 takemura * Platform Specific Function Hooks
296 1.1 takemura */
297 1.29 uch platform.cpu_idle = vr_idle;
298 1.31 uch platform.cpu_intr = VR_INTR;
299 1.29 uch platform.cons_init = vr_cons_init;
300 1.29 uch platform.fb_init = vr_fb_init;
301 1.29 uch platform.mem_init = vr_mem_init;
302 1.29 uch platform.reboot = vr_reboot;
303 1.1 takemura
304 1.9 sato #if NVRBCU > 0
305 1.12 sato sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
306 1.1 takemura vrbcu_vrip_getcpuname(),
307 1.1 takemura vrbcu_vrip_getcpumajor(),
308 1.10 shin vrbcu_vrip_getcpuminor(),
309 1.10 shin vrbcu_vrip_getcpuclock() / 1000000,
310 1.10 shin (vrbcu_vrip_getcpuclock() % 1000000) / 1000);
311 1.9 sato #else
312 1.12 sato sprintf(cpu_name, "NEC VR41xx");
313 1.9 sato #endif
314 1.4 uch }
315 1.4 uch
316 1.13 shin void
317 1.28 uch vr_mem_init(paddr_t kernend)
318 1.4 uch {
319 1.25 enami
320 1.13 shin mem_clusters[0].start = 0;
321 1.13 shin mem_clusters[0].size = kernend;
322 1.13 shin mem_cluster_cnt = 1;
323 1.25 enami
324 1.13 shin vr_find_dram(kernend, 0x02000000);
325 1.13 shin vr_find_dram(0x02000000, 0x04000000);
326 1.13 shin vr_find_dram(0x04000000, 0x06000000);
327 1.13 shin vr_find_dram(0x06000000, 0x08000000);
328 1.13 shin }
329 1.13 shin
330 1.13 shin void
331 1.28 uch vr_find_dram(paddr_t addr, paddr_t end)
332 1.13 shin {
333 1.13 shin int n;
334 1.48 he char *page;
335 1.13 shin #ifdef NARLY_MEMORY_PROBE
336 1.13 shin int x, i;
337 1.13 shin #endif
338 1.13 shin
339 1.25 enami #ifdef VR_FIND_DRAMLIM
340 1.25 enami if (VR_FIND_DRAMLIM < end)
341 1.25 enami end = VR_FIND_DRAMLIM;
342 1.31 uch #endif /* VR_FIND_DRAMLIM */
343 1.13 shin n = mem_cluster_cnt;
344 1.41 thorpej for (; addr < end; addr += PAGE_SIZE) {
345 1.13 shin
346 1.48 he page = (char *)MIPS_PHYS_TO_KSEG1(addr);
347 1.13 shin if (badaddr(page, 4))
348 1.13 shin goto bad;
349 1.14 shin
350 1.14 shin /* stop memory probing at first memory image */
351 1.14 shin if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
352 1.14 shin return;
353 1.13 shin
354 1.13 shin *(volatile int *)(page+0) = 0xa5a5a5a5;
355 1.13 shin *(volatile int *)(page+4) = 0x5a5a5a5a;
356 1.13 shin wbflush();
357 1.13 shin if (*(volatile int *)(page+0) != 0xa5a5a5a5)
358 1.13 shin goto bad;
359 1.13 shin
360 1.13 shin *(volatile int *)(page+0) = 0x5a5a5a5a;
361 1.13 shin *(volatile int *)(page+4) = 0xa5a5a5a5;
362 1.13 shin wbflush();
363 1.13 shin if (*(volatile int *)(page+0) != 0x5a5a5a5a)
364 1.13 shin goto bad;
365 1.13 shin
366 1.13 shin #ifdef NARLY_MEMORY_PROBE
367 1.13 shin x = random();
368 1.41 thorpej for (i = 0; i < PAGE_SIZE; i += 4)
369 1.13 shin *(volatile int *)(page+i) = (x ^ i);
370 1.4 uch wbflush();
371 1.41 thorpej for (i = 0; i < PAGE_SIZE; i += 4)
372 1.13 shin if (*(volatile int *)(page+i) != (x ^ i))
373 1.13 shin goto bad;
374 1.13 shin
375 1.13 shin x = random();
376 1.41 thorpej for (i = 0; i < PAGE_SIZE; i += 4)
377 1.13 shin *(volatile int *)(page+i) = (x ^ i);
378 1.13 shin wbflush();
379 1.41 thorpej for (i = 0; i < PAGE_SIZE; i += 4)
380 1.13 shin if (*(volatile int *)(page+i) != (x ^ i))
381 1.13 shin goto bad;
382 1.31 uch #endif /* NARLY_MEMORY_PROBE */
383 1.13 shin
384 1.13 shin if (!mem_clusters[n].size)
385 1.13 shin mem_clusters[n].start = addr;
386 1.41 thorpej mem_clusters[n].size += PAGE_SIZE;
387 1.13 shin continue;
388 1.13 shin
389 1.13 shin bad:
390 1.13 shin if (mem_clusters[n].size)
391 1.13 shin ++n;
392 1.13 shin continue;
393 1.4 uch }
394 1.13 shin if (mem_clusters[n].size)
395 1.13 shin ++n;
396 1.13 shin mem_cluster_cnt = n;
397 1.4 uch }
398 1.4 uch
399 1.4 uch void
400 1.47 christos vr_fb_init(void **kernend)
401 1.4 uch {
402 1.4 uch /* Nothing to do */
403 1.1 takemura }
404 1.1 takemura
405 1.1 takemura void
406 1.1 takemura vr_cons_init()
407 1.1 takemura {
408 1.35 takemura #if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0
409 1.30 uch bus_space_tag_t iot = hpcmips_system_bus_space();
410 1.1 takemura #endif
411 1.35 takemura #if NCOM > 0
412 1.35 takemura static struct vr_com_platdep *com_info;
413 1.35 takemura #endif
414 1.39 takemura #if NVRKIU > 0
415 1.39 takemura static struct vr_kiu_platdep *kiu_info;
416 1.39 takemura #endif
417 1.1 takemura
418 1.1 takemura #if NCOM > 0
419 1.35 takemura com_info = platid_search(&platid, platdep_com_table,
420 1.35 takemura sizeof(platdep_com_table)/sizeof(*platdep_com_table),
421 1.35 takemura sizeof(*platdep_com_table));
422 1.18 jeffs #ifdef KGDB
423 1.35 takemura if (com_info->attach != NULL) {
424 1.35 takemura /* if KGDB is defined, always use the serial port for KGDB */
425 1.35 takemura if ((*com_info->attach)(iot, com_info->addr, 9600,
426 1.35 takemura com_info->freq,
427 1.35 takemura (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
428 1.35 takemura printf("%s(%d): can't init kgdb's serial port",
429 1.23 enami __FILE__, __LINE__);
430 1.1 takemura }
431 1.33 takemura #else /* KGDB */
432 1.35 takemura if (com_info->attach != NULL && (bootinfo->bi_cnuse&BI_CNUSE_SERIAL)) {
433 1.33 takemura /* Serial console */
434 1.35 takemura if ((*com_info->attach)(iot, com_info->addr, CONSPEED,
435 1.35 takemura com_info->freq,
436 1.35 takemura (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) {
437 1.33 takemura printf("%s(%d): can't init serial console",
438 1.33 takemura __FILE__, __LINE__);
439 1.33 takemura } else {
440 1.33 takemura return;
441 1.33 takemura }
442 1.33 takemura }
443 1.33 takemura #endif /* KGDB */
444 1.35 takemura #endif /* NCOM > 0 */
445 1.1 takemura
446 1.15 takemura #if NHPCFB > 0
447 1.17 uch if (hpcfb_cnattach(NULL)) {
448 1.3 takemura printf("%s(%d): can't init fb console", __FILE__, __LINE__);
449 1.3 takemura } else {
450 1.3 takemura goto find_keyboard;
451 1.3 takemura }
452 1.25 enami find_keyboard:
453 1.30 uch #endif /* NHPCFB > 0 */
454 1.3 takemura
455 1.39 takemura #if NVRKIU > 0
456 1.39 takemura kiu_info = platid_search(&platid, platdep_kiu_table,
457 1.39 takemura sizeof(platdep_kiu_table)/sizeof(*platdep_kiu_table),
458 1.39 takemura sizeof(*platdep_kiu_table));
459 1.39 takemura if (kiu_info->addr != VRIP_NO_ADDR) {
460 1.39 takemura if (vrkiu_cnattach(iot, kiu_info->addr)) {
461 1.39 takemura printf("%s(%d): can't init vrkiu as console",
462 1.39 takemura __FILE__, __LINE__);
463 1.39 takemura } else {
464 1.39 takemura return;
465 1.39 takemura }
466 1.3 takemura }
467 1.39 takemura #endif /* NVRKIU > 0 */
468 1.5 takemura }
469 1.5 takemura
470 1.40 shin extern char vr_hibernate[];
471 1.40 shin extern char evr_hibernate[];
472 1.40 shin
473 1.5 takemura void
474 1.28 uch vr_reboot(int howto, char *bootstr)
475 1.5 takemura {
476 1.7 takemura /*
477 1.7 takemura * power down
478 1.7 takemura */
479 1.7 takemura if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
480 1.7 takemura printf("fake powerdown\n");
481 1.40 shin /*
482 1.40 shin * copy vr_hibernate() to top of physical memory.
483 1.40 shin */
484 1.40 shin memcpy((void *)MIPS_KSEG0_START, vr_hibernate,
485 1.40 shin evr_hibernate - (char *)vr_hibernate);
486 1.40 shin /* sync I&D cache */
487 1.40 shin mips_dcache_wbinv_all();
488 1.40 shin mips_icache_sync_all();
489 1.40 shin /*
490 1.40 shin * call vr_hibernate() at MIPS_KSEG0_START.
491 1.40 shin */
492 1.40 shin ((void (*)(void *,int))MIPS_KSEG0_START)(
493 1.40 shin (void *)MIPS_KSEG0_START, ptoa(physmem));
494 1.7 takemura /* not reach */
495 1.7 takemura vr_reboot(howto&~RB_HALT, bootstr);
496 1.7 takemura }
497 1.7 takemura /*
498 1.8 takemura * halt
499 1.7 takemura */
500 1.8 takemura if (howto & RB_HALT) {
501 1.38 takemura #if NVRIP_COMMON > 0
502 1.8 takemura _spllower(~MIPS_INT_MASK_0);
503 1.8 takemura vrip_intr_suspend();
504 1.5 takemura #else
505 1.8 takemura splhigh();
506 1.5 takemura #endif
507 1.7 takemura __asm(".set noreorder");
508 1.44 mycroft __asm(".word " ___STRING(VR_OPCODE_SUSPEND));
509 1.6 sato __asm("nop");
510 1.6 sato __asm("nop");
511 1.6 sato __asm("nop");
512 1.6 sato __asm("nop");
513 1.6 sato __asm("nop");
514 1.7 takemura __asm(".set reorder");
515 1.38 takemura #if NVRIP_COMMON > 0
516 1.8 takemura vrip_intr_resume();
517 1.8 takemura #endif
518 1.6 sato }
519 1.8 takemura /*
520 1.8 takemura * reset
521 1.8 takemura */
522 1.8 takemura #if NVRDSU
523 1.8 takemura vrdsu_reset();
524 1.8 takemura #else
525 1.8 takemura printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
526 1.8 takemura #endif
527 1.1 takemura }
528 1.1 takemura
529 1.30 uch /*
530 1.30 uch * Handle interrupts.
531 1.30 uch */
532 1.31 uch void
533 1.31 uch VR_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
534 1.30 uch {
535 1.51 tsutsui struct cpu_info *ci;
536 1.51 tsutsui
537 1.51 tsutsui ci = curcpu();
538 1.51 tsutsui ci->ci_idepth++;
539 1.31 uch uvmexp.intrs++;
540 1.31 uch
541 1.45 hamajima /* Deal with unneded compare interrupts occasionally so that we can
542 1.45 hamajima * keep spllowersoftclock. */
543 1.31 uch if (ipending & MIPS_INT_MASK_5) {
544 1.45 hamajima mips3_cp0_compare_write(0);
545 1.31 uch }
546 1.31 uch
547 1.31 uch if (ipending & MIPS_INT_MASK_1) {
548 1.45 hamajima _splset(MIPS_SR_INT_IE); /* for spllowersoftclock */
549 1.45 hamajima /* Remove the lower priority pending bits from status so that
550 1.45 hamajima * spllowersoftclock will not happen if other interrupts are
551 1.45 hamajima * pending. */
552 1.45 hamajima (*vr_intr_handler[1])(vr_intr_arg[1], pc, status & ~(ipending
553 1.45 hamajima & (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)));
554 1.31 uch }
555 1.31 uch
556 1.31 uch if (ipending & MIPS_INT_MASK_0) {
557 1.45 hamajima _splset(MIPS_INT_MASK_1|MIPS_SR_INT_IE);
558 1.31 uch (*vr_intr_handler[0])(vr_intr_arg[0], pc, status);
559 1.45 hamajima }
560 1.51 tsutsui ci->ci_idepth--;
561 1.31 uch
562 1.49 ad #ifdef __HAVE_FAST_SOFTINTS
563 1.45 hamajima if (ipending & MIPS_SOFT_INT_MASK_1) {
564 1.45 hamajima _splset(MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SR_INT_IE);
565 1.45 hamajima softintr(MIPS_SOFT_INT_MASK_1);
566 1.31 uch }
567 1.31 uch
568 1.45 hamajima if (ipending & MIPS_SOFT_INT_MASK_0) {
569 1.45 hamajima _splset(MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_1|MIPS_INT_MASK_0|
570 1.45 hamajima MIPS_SR_INT_IE);
571 1.45 hamajima softintr(MIPS_SOFT_INT_MASK_0);
572 1.45 hamajima }
573 1.49 ad #endif
574 1.30 uch }
575 1.30 uch
576 1.1 takemura void *
577 1.30 uch vr_intr_establish(int line, int (*ih_fun)(void *, u_int32_t, u_int32_t),
578 1.28 uch void *ih_arg)
579 1.1 takemura {
580 1.28 uch
581 1.31 uch KDASSERT(vr_intr_handler[line] == vr_null_handler);
582 1.31 uch
583 1.31 uch vr_intr_handler[line] = ih_fun;
584 1.31 uch vr_intr_arg[line] = ih_arg;
585 1.1 takemura
586 1.31 uch return ((void *)line);
587 1.1 takemura }
588 1.1 takemura
589 1.1 takemura void
590 1.28 uch vr_intr_disestablish(void *ih)
591 1.1 takemura {
592 1.1 takemura int line = (int)ih;
593 1.28 uch
594 1.31 uch vr_intr_handler[line] = vr_null_handler;
595 1.31 uch vr_intr_arg[line] = NULL;
596 1.1 takemura }
597 1.1 takemura
598 1.1 takemura int
599 1.31 uch vr_null_handler(void *arg, u_int32_t pc, u_int32_t status)
600 1.1 takemura {
601 1.31 uch
602 1.31 uch printf("vr_null_handler\n");
603 1.28 uch
604 1.28 uch return (0);
605 1.1 takemura }
606 1.22 sato
607 1.22 sato /*
608 1.22 sato int x4181 = VR4181;
609 1.22 sato int x4101 = VR4101;
610 1.22 sato int x4102 = VR4102;
611 1.22 sato int x4111 = VR4111;
612 1.22 sato int x4121 = VR4121;
613 1.22 sato int x4122 = VR4122;
614 1.22 sato int xo4181 = ONLY_VR4181;
615 1.22 sato int xo4101 = ONLY_VR4101;
616 1.22 sato int xo4102 = ONLY_VR4102;
617 1.22 sato int xo4111_4121 = ONLY_VR4111_4121;
618 1.22 sato int g4101=VRGROUP_4101;
619 1.22 sato int g4102=VRGROUP_4102;
620 1.22 sato int g4181=VRGROUP_4181;
621 1.22 sato int g4102_4121=VRGROUP_4102_4121;
622 1.22 sato int g4111_4121=VRGROUP_4111_4121;
623 1.22 sato int g4102_4122=VRGROUP_4102_4122;
624 1.22 sato int g4111_4122=VRGROUP_4111_4122;
625 1.22 sato int single_vrip_base=SINGLE_VRIP_BASE;
626 1.22 sato int vrip_base_addr=VRIP_BASE_ADDR;
627 1.22 sato */
628