vr.c revision 1.25 1 /* $NetBSD: vr.c,v 1.25 2001/06/11 05:52:21 enami Exp $ */
2
3 /*-
4 * Copyright (c) 1999
5 * Shin Takemura and PocketBSD Project. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by the PocketBSD project
18 * and its contributors.
19 * 4. Neither the name of the project nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 */
36 #include "opt_kgdb.h"
37
38 #include <sys/param.h>
39 #include <sys/types.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42 #include <sys/reboot.h>
43 #include <sys/kcore.h>
44
45 #include <machine/cpu.h>
46 #include <machine/intr.h>
47 #include <machine/reg.h>
48 #include <machine/psl.h>
49 #include <machine/locore.h>
50 #include <machine/sysconf.h>
51 #include <machine/bus.h>
52 #include <machine/autoconf.h>
53
54 #include <mips/mips_param.h> /* hokey spl()s */
55 #include <mips/mips/mips_mcclock.h> /* mcclock CPUspeed estimation */
56
57 #include "opt_vr41xx.h"
58 #include <hpcmips/vr/vr.h>
59 #include <hpcmips/vr/vr_asm.h>
60 #include <hpcmips/vr/vrcpudef.h>
61 #include <hpcmips/vr/vripreg.h>
62 #include <hpcmips/vr/rtcreg.h>
63 #include <hpcmips/hpcmips/machdep.h> /* cpu_name */
64 #include <machine/bootinfo.h>
65
66 #include "vrip.h"
67 #if NVRIP > 0
68 #include <hpcmips/vr/vripvar.h>
69 #endif
70
71 #include "vrbcu.h"
72 #if NVRBCU > 0
73 #include <hpcmips/vr/bcuvar.h>
74 #endif
75
76 #include "vrdsu.h"
77 #if NVRDSU > 0
78 #include <hpcmips/vr/vrdsuvar.h>
79 #endif
80
81 #include "com.h"
82 #if NCOM > 0
83 #include <sys/termios.h>
84 #include <sys/ttydefaults.h>
85 #include <dev/ic/comreg.h>
86 #include <dev/ic/comvar.h>
87 #include <hpcmips/vr/siureg.h>
88 #include <hpcmips/vr/com_vripvar.h>
89 #ifndef CONSPEED
90 #define CONSPEED TTYDEF_SPEED
91 #endif
92 #endif
93
94 #include "hpcfb.h"
95 #include "vrkiu.h"
96 #if (NVRKIU > 0) || (NHPCFB > 0)
97 #include <dev/wscons/wsdisplayvar.h>
98 #include <dev/rasops/rasops.h>
99 #endif
100
101 #if NHPCFB > 0
102 #include <dev/hpc/hpcfbvar.h>
103 #endif
104
105 #if NVRKIU > 0
106 #include <arch/hpcmips/vr/vrkiuvar.h>
107 #endif
108
109 void vr_init __P((void));
110 void vr_os_init __P((void));
111 void vr_bus_reset __P((void));
112 int vr_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t));
113 void vr_cons_init __P((void));
114 void vr_device_register __P((struct device *, void *));
115 void vr_fb_init __P((caddr_t*));
116 void vr_mem_init __P((paddr_t));
117 void vr_find_dram __P((paddr_t, paddr_t));
118 void vr_reboot __P((int howto, char *bootstr));
119
120 extern unsigned nullclkread __P((void));
121 extern unsigned (*clkread) __P((void));
122
123 /*
124 * CPU interrupt dispatch table (HwInt[0:3])
125 */
126 int null_handler __P((void*, u_int32_t, u_int32_t));
127 static int (*intr_handler[4]) __P((void*, u_int32_t, u_int32_t)) =
128 {
129 null_handler,
130 null_handler,
131 null_handler,
132 null_handler
133 };
134 static void *intr_arg[4];
135
136 extern phys_ram_seg_t mem_clusters[];
137 extern int mem_cluster_cnt;
138
139 void
140 vr_init()
141 {
142 /*
143 * Platform Information.
144 */
145
146 /*
147 * Platform Specific Function Hooks
148 */
149 platform.os_init = vr_os_init;
150 platform.iointr = vr_intr;
151 platform.bus_reset = vr_bus_reset;
152 platform.cons_init = vr_cons_init;
153 platform.device_register = vr_device_register;
154 platform.fb_init = vr_fb_init;
155 platform.mem_init = vr_mem_init;
156 platform.reboot = vr_reboot;
157
158 #if NVRBCU > 0
159 sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
160 vrbcu_vrip_getcpuname(),
161 vrbcu_vrip_getcpumajor(),
162 vrbcu_vrip_getcpuminor(),
163 vrbcu_vrip_getcpuclock() / 1000000,
164 (vrbcu_vrip_getcpuclock() % 1000000) / 1000);
165 #else
166 sprintf(cpu_name, "NEC VR41xx");
167 #endif
168 }
169
170 void
171 vr_mem_init(kernend)
172 paddr_t kernend;
173 {
174
175 mem_clusters[0].start = 0;
176 mem_clusters[0].size = kernend;
177 mem_cluster_cnt = 1;
178
179 vr_find_dram(kernend, 0x02000000);
180 vr_find_dram(0x02000000, 0x04000000);
181 vr_find_dram(0x04000000, 0x06000000);
182 vr_find_dram(0x06000000, 0x08000000);
183
184 /* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/
185 memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF - (KERNBASE + 0x800));
186 }
187
188 void
189 vr_find_dram(addr, end)
190 paddr_t addr, end;
191 {
192 int n;
193 caddr_t page;
194 #ifdef NARLY_MEMORY_PROBE
195 int x, i;
196 #endif
197
198 #ifdef VR_FIND_DRAMLIM
199 if (VR_FIND_DRAMLIM < end)
200 end = VR_FIND_DRAMLIM;
201 #endif
202 n = mem_cluster_cnt;
203 for (; addr < end; addr += NBPG) {
204
205 page = (void *)MIPS_PHYS_TO_KSEG1(addr);
206 if (badaddr(page, 4))
207 goto bad;
208
209 /* stop memory probing at first memory image */
210 if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
211 return;
212
213 *(volatile int *)(page+0) = 0xa5a5a5a5;
214 *(volatile int *)(page+4) = 0x5a5a5a5a;
215 wbflush();
216 if (*(volatile int *)(page+0) != 0xa5a5a5a5)
217 goto bad;
218
219 *(volatile int *)(page+0) = 0x5a5a5a5a;
220 *(volatile int *)(page+4) = 0xa5a5a5a5;
221 wbflush();
222 if (*(volatile int *)(page+0) != 0x5a5a5a5a)
223 goto bad;
224
225 #ifdef NARLY_MEMORY_PROBE
226 x = random();
227 for (i = 0; i < NBPG; i += 4)
228 *(volatile int *)(page+i) = (x ^ i);
229 wbflush();
230 for (i = 0; i < NBPG; i += 4)
231 if (*(volatile int *)(page+i) != (x ^ i))
232 goto bad;
233
234 x = random();
235 for (i = 0; i < NBPG; i += 4)
236 *(volatile int *)(page+i) = (x ^ i);
237 wbflush();
238 for (i = 0; i < NBPG; i += 4)
239 if (*(volatile int *)(page+i) != (x ^ i))
240 goto bad;
241 #endif
242
243 if (!mem_clusters[n].size)
244 mem_clusters[n].start = addr;
245 mem_clusters[n].size += NBPG;
246 continue;
247
248 bad:
249 if (mem_clusters[n].size)
250 ++n;
251 continue;
252 }
253 if (mem_clusters[n].size)
254 ++n;
255 mem_cluster_cnt = n;
256 }
257
258 void
259 vr_fb_init(kernend)
260 caddr_t *kernend;
261 {
262 /* Nothing to do */
263 }
264
265 void
266 vr_os_init()
267 {
268 /*
269 * Set up interrupt handling and I/O addresses.
270 */
271
272 splvec.splbio = MIPS_SPL0;
273 splvec.splnet = MIPS_SPL0;
274 splvec.spltty = MIPS_SPL0;
275 splvec.splvm = MIPS_SPL0;
276 splvec.splclock = MIPS_SPL_0_1;
277 splvec.splstatclock = MIPS_SPL_0_1;
278
279 /* no high resolution timer circuit; possibly never called */
280 clkread = nullclkread;
281
282 #ifdef NOT_YET
283 mcclock_addr = (volatile struct chiptime *)
284 MIPS_PHYS_TO_KSEG1(Vr_SYS_CLOCK);
285 mc_cpuspeed(mcclock_addr, MIPS_INT_MASK_1);
286 #else
287 printf("%s(%d): cpuspeed estimation is notimplemented\n",
288 __FILE__, __LINE__);
289 #endif
290 #ifdef HPCMIPS_L1CACHE_DISABLE
291 cpuspeed = 1; /* XXX, CPU is very very slow because L1 cache is */
292 /* disabled. */
293 #endif /* HPCMIPS_L1CAHCE_DISABLE */
294 }
295
296
297 /*
298 * Initalize the memory system and I/O buses.
299 */
300 void
301 vr_bus_reset()
302 {
303 printf("%s(%d): vr_bus_reset() not implemented.\n",
304 __FILE__, __LINE__);
305 }
306
307 void
308 vr_cons_init()
309 {
310 #if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0
311 extern bus_space_tag_t system_bus_iot;
312 extern bus_space_tag_t mb_bus_space_init __P((void));
313
314 /*
315 * At this time, system_bus_iot is not initialized yet.
316 * Just initialize it here.
317 */
318 mb_bus_space_init();
319 #endif
320
321 #if NCOM > 0
322 #ifdef KGDB
323 /* if KGDB is defined, always use the serial port for KGDB */
324 if (com_vrip_cndb_attach(system_bus_iot, VRIP_SIU_ADDR, 9600,
325 VRCOM_FREQ, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
326 printf("%s(%d): can't init kgdb's serial port",
327 __FILE__, __LINE__);
328 }
329 #else
330 if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
331 /* Serial console */
332 if (com_vrip_cndb_attach(system_bus_iot,
333 VRIP_SIU_ADDR, CONSPEED, VRCOM_FREQ,
334 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) {
335 printf("%s(%d): can't init serial console",
336 __FILE__, __LINE__);
337 } else {
338 return;
339 }
340 }
341 #endif
342 #endif
343
344 #if NHPCFB > 0
345 if (hpcfb_cnattach(NULL)) {
346 printf("%s(%d): can't init fb console", __FILE__, __LINE__);
347 } else {
348 goto find_keyboard;
349 }
350 find_keyboard:
351 #endif
352
353 #if NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR
354 if (vrkiu_cnattach(system_bus_iot, VRIP_KIU_ADDR)) {
355 printf("%s(%d): can't init vrkiu as console",
356 __FILE__, __LINE__);
357 } else {
358 return;
359 }
360 #endif
361 }
362
363 void
364 vr_device_register(dev, aux)
365 struct device *dev;
366 void *aux;
367 {
368 printf("%s(%d): vr_device_register() not implemented.\n",
369 __FILE__, __LINE__);
370 panic("abort");
371 }
372
373 void
374 vr_reboot(howto, bootstr)
375 int howto;
376 char *bootstr;
377 {
378 /*
379 * power down
380 */
381 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
382 printf("fake powerdown\n");
383 __asm(__CONCAT(".word ",___STRING(VR_OPCODE_HIBERNATE)));
384 __asm("nop");
385 __asm("nop");
386 __asm("nop");
387 __asm("nop");
388 __asm("nop");
389 __asm(".set reorder");
390 /* not reach */
391 vr_reboot(howto&~RB_HALT, bootstr);
392 }
393 /*
394 * halt
395 */
396 if (howto & RB_HALT) {
397 #if NVRIP > 0
398 _spllower(~MIPS_INT_MASK_0);
399 vrip_intr_suspend();
400 #else
401 splhigh();
402 #endif
403 __asm(".set noreorder");
404 __asm(__CONCAT(".word ",___STRING(VR_OPCODE_SUSPEND)));
405 __asm("nop");
406 __asm("nop");
407 __asm("nop");
408 __asm("nop");
409 __asm("nop");
410 __asm(".set reorder");
411 #if NVRIP > 0
412 vrip_intr_resume();
413 #endif
414 }
415 /*
416 * reset
417 */
418 #if NVRDSU
419 vrdsu_reset();
420 #else
421 printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
422 #endif
423 }
424
425 void *
426 vr_intr_establish(line, ih_fun, ih_arg)
427 int line;
428 int (*ih_fun) __P((void*, u_int32_t, u_int32_t));
429 void *ih_arg;
430 {
431 if (intr_handler[line] != null_handler) {
432 panic("vr_intr_establish: can't establish duplicated intr handler.");
433 }
434 intr_handler[line] = ih_fun;
435 intr_arg[line] = ih_arg;
436
437 return (void*)line;
438 }
439
440
441 void
442 vr_intr_disestablish(ih)
443 void *ih;
444 {
445 int line = (int)ih;
446 intr_handler[line] = null_handler;
447 intr_arg[line] = NULL;
448 }
449
450 int
451 null_handler(arg, pc, statusReg)
452 void *arg;
453 u_int32_t pc;
454 u_int32_t statusReg;
455 {
456 printf("null_handler\n");
457 return 0;
458 }
459
460 /*
461 * Handle interrupts.
462 */
463 int
464 vr_intr(status, cause, pc, ipending)
465 u_int32_t status, cause, pc, ipending;
466 {
467 int hwintr;
468
469 hwintr = (ffs(ipending >> 10) -1) & 0x3;
470 (*intr_handler[hwintr])(intr_arg[hwintr], pc, status);
471
472 return (MIPS_SR_INT_IE | (status & ~cause & MIPS_HARD_INT_MASK));
473 }
474
475
476 /*
477 int x4181 = VR4181;
478 int x4101 = VR4101;
479 int x4102 = VR4102;
480 int x4111 = VR4111;
481 int x4121 = VR4121;
482 int x4122 = VR4122;
483 int xo4181 = ONLY_VR4181;
484 int xo4101 = ONLY_VR4101;
485 int xo4102 = ONLY_VR4102;
486 int xo4111_4121 = ONLY_VR4111_4121;
487 int g4101=VRGROUP_4101;
488 int g4102=VRGROUP_4102;
489 int g4181=VRGROUP_4181;
490 int g4102_4121=VRGROUP_4102_4121;
491 int g4111_4121=VRGROUP_4111_4121;
492 int g4102_4122=VRGROUP_4102_4122;
493 int g4111_4122=VRGROUP_4111_4122;
494 int single_vrip_base=SINGLE_VRIP_BASE;
495 int vrip_base_addr=VRIP_BASE_ADDR;
496 */
497