vr.c revision 1.31
1 /* $NetBSD: vr.c,v 1.31 2001/09/23 14:32:53 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2001 5 * Shin Takemura and PocketBSD Project. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the PocketBSD project 18 * and its contributors. 19 * 4. Neither the name of the project nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 */ 36 37 #include "opt_vr41xx.h" 38 #include "opt_tx39xx.h" 39 #include "opt_kgdb.h" 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/reboot.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <machine/sysconf.h> 48 #include <machine/bus.h> 49 #include <machine/bootinfo.h> 50 51 #include <dev/hpc/hpckbdvar.h> 52 53 #include <hpcmips/hpcmips/machdep.h> /* cpu_name, mem_cluster */ 54 55 #include <hpcmips/vr/vr.h> 56 #include <hpcmips/vr/vr_asm.h> 57 #include <hpcmips/vr/vrcpudef.h> 58 #include <hpcmips/vr/vripreg.h> 59 #include <hpcmips/vr/rtcreg.h> 60 61 #include "vrip.h" 62 #if NVRIP > 0 63 #include <hpcmips/vr/vripvar.h> 64 #endif 65 66 #include "vrbcu.h" 67 #if NVRBCU > 0 68 #include <hpcmips/vr/bcuvar.h> 69 #endif 70 71 #include "vrdsu.h" 72 #if NVRDSU > 0 73 #include <hpcmips/vr/vrdsuvar.h> 74 #endif 75 76 #include "com.h" 77 #if NCOM > 0 78 #include <sys/termios.h> 79 #include <sys/ttydefaults.h> 80 #include <dev/ic/comreg.h> 81 #include <dev/ic/comvar.h> 82 #include <hpcmips/vr/siureg.h> 83 #include <hpcmips/vr/com_vripvar.h> 84 #ifndef CONSPEED 85 #define CONSPEED TTYDEF_SPEED 86 #endif 87 #endif 88 89 #include "hpcfb.h" 90 #include "vrkiu.h" 91 #if (NVRKIU > 0) || (NHPCFB > 0) 92 #include <dev/wscons/wsdisplayvar.h> 93 #include <dev/rasops/rasops.h> 94 #endif 95 96 #if NHPCFB > 0 97 #include <dev/hpc/hpcfbvar.h> 98 #endif 99 100 #if NVRKIU > 0 101 #include <arch/hpcmips/vr/vrkiureg.h> 102 #include <arch/hpcmips/vr/vrkiuvar.h> 103 #endif 104 105 #ifdef DEBUG 106 #define STATIC 107 #else 108 #define STATIC static 109 #endif 110 111 /* 112 * This is a mask of bits to clear in the SR when we go to a 113 * given interrupt priority level. 114 */ 115 const u_int32_t __ipl_sr_bits_vr[_IPL_N] = { 116 0, /* IPL_NONE */ 117 118 MIPS_SOFT_INT_MASK_0, /* IPL_SOFT */ 119 120 MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */ 121 122 MIPS_SOFT_INT_MASK_0| 123 MIPS_SOFT_INT_MASK_1, /* IPL_SOFTNET */ 124 125 MIPS_SOFT_INT_MASK_0| 126 MIPS_SOFT_INT_MASK_1, /* IPL_SOFTSERIAL */ 127 128 MIPS_SOFT_INT_MASK_0| 129 MIPS_SOFT_INT_MASK_1| 130 MIPS_INT_MASK_0, /* IPL_BIO */ 131 132 MIPS_SOFT_INT_MASK_0| 133 MIPS_SOFT_INT_MASK_1| 134 MIPS_INT_MASK_0, /* IPL_NET */ 135 136 MIPS_SOFT_INT_MASK_0| 137 MIPS_SOFT_INT_MASK_1| 138 MIPS_INT_MASK_0, /* IPL_{TTY,SERIAL} */ 139 140 MIPS_SOFT_INT_MASK_0| 141 MIPS_SOFT_INT_MASK_1| 142 MIPS_INT_MASK_0| 143 MIPS_INT_MASK_1, /* IPL_{CLOCK,HIGH} */ 144 }; 145 146 #if defined(VR41XX) && defined(TX39XX) 147 #define VR_INTR vr_intr 148 #else 149 #define VR_INTR cpu_intr /* locore_mips3 directly call this */ 150 #endif 151 152 void vr_init(void); 153 void VR_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t); 154 extern void vr_idle(void); 155 STATIC void vr_cons_init(void); 156 STATIC void vr_fb_init(caddr_t *); 157 STATIC void vr_mem_init(paddr_t); 158 STATIC void vr_find_dram(paddr_t, paddr_t); 159 STATIC void vr_reboot(int, char *); 160 161 /* 162 * CPU interrupt dispatch table (HwInt[0:3]) 163 */ 164 STATIC int vr_null_handler(void *, u_int32_t, u_int32_t); 165 STATIC int (*vr_intr_handler[4])(void *, u_int32_t, u_int32_t) = 166 { 167 vr_null_handler, 168 vr_null_handler, 169 vr_null_handler, 170 vr_null_handler 171 }; 172 STATIC void *vr_intr_arg[4]; 173 174 void 175 vr_init() 176 { 177 /* 178 * Platform Specific Function Hooks 179 */ 180 platform.cpu_idle = vr_idle; 181 platform.cpu_intr = VR_INTR; 182 platform.cons_init = vr_cons_init; 183 platform.fb_init = vr_fb_init; 184 platform.mem_init = vr_mem_init; 185 platform.reboot = vr_reboot; 186 187 #if NVRBCU > 0 188 sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz", 189 vrbcu_vrip_getcpuname(), 190 vrbcu_vrip_getcpumajor(), 191 vrbcu_vrip_getcpuminor(), 192 vrbcu_vrip_getcpuclock() / 1000000, 193 (vrbcu_vrip_getcpuclock() % 1000000) / 1000); 194 #else 195 sprintf(cpu_name, "NEC VR41xx"); 196 #endif 197 } 198 199 void 200 vr_mem_init(paddr_t kernend) 201 { 202 203 mem_clusters[0].start = 0; 204 mem_clusters[0].size = kernend; 205 mem_cluster_cnt = 1; 206 207 vr_find_dram(kernend, 0x02000000); 208 vr_find_dram(0x02000000, 0x04000000); 209 vr_find_dram(0x04000000, 0x06000000); 210 vr_find_dram(0x06000000, 0x08000000); 211 212 /* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/ 213 memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF - (KERNBASE + 0x800)); 214 } 215 216 void 217 vr_find_dram(paddr_t addr, paddr_t end) 218 { 219 int n; 220 caddr_t page; 221 #ifdef NARLY_MEMORY_PROBE 222 int x, i; 223 #endif 224 225 #ifdef VR_FIND_DRAMLIM 226 if (VR_FIND_DRAMLIM < end) 227 end = VR_FIND_DRAMLIM; 228 #endif /* VR_FIND_DRAMLIM */ 229 n = mem_cluster_cnt; 230 for (; addr < end; addr += NBPG) { 231 232 page = (void *)MIPS_PHYS_TO_KSEG1(addr); 233 if (badaddr(page, 4)) 234 goto bad; 235 236 /* stop memory probing at first memory image */ 237 if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0) 238 return; 239 240 *(volatile int *)(page+0) = 0xa5a5a5a5; 241 *(volatile int *)(page+4) = 0x5a5a5a5a; 242 wbflush(); 243 if (*(volatile int *)(page+0) != 0xa5a5a5a5) 244 goto bad; 245 246 *(volatile int *)(page+0) = 0x5a5a5a5a; 247 *(volatile int *)(page+4) = 0xa5a5a5a5; 248 wbflush(); 249 if (*(volatile int *)(page+0) != 0x5a5a5a5a) 250 goto bad; 251 252 #ifdef NARLY_MEMORY_PROBE 253 x = random(); 254 for (i = 0; i < NBPG; i += 4) 255 *(volatile int *)(page+i) = (x ^ i); 256 wbflush(); 257 for (i = 0; i < NBPG; i += 4) 258 if (*(volatile int *)(page+i) != (x ^ i)) 259 goto bad; 260 261 x = random(); 262 for (i = 0; i < NBPG; i += 4) 263 *(volatile int *)(page+i) = (x ^ i); 264 wbflush(); 265 for (i = 0; i < NBPG; i += 4) 266 if (*(volatile int *)(page+i) != (x ^ i)) 267 goto bad; 268 #endif /* NARLY_MEMORY_PROBE */ 269 270 if (!mem_clusters[n].size) 271 mem_clusters[n].start = addr; 272 mem_clusters[n].size += NBPG; 273 continue; 274 275 bad: 276 if (mem_clusters[n].size) 277 ++n; 278 continue; 279 } 280 if (mem_clusters[n].size) 281 ++n; 282 mem_cluster_cnt = n; 283 } 284 285 void 286 vr_fb_init(caddr_t *kernend) 287 { 288 /* Nothing to do */ 289 } 290 291 void 292 vr_cons_init() 293 { 294 #if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0 295 bus_space_tag_t iot = hpcmips_system_bus_space(); 296 #endif 297 298 #if NCOM > 0 299 #ifdef KGDB 300 /* if KGDB is defined, always use the serial port for KGDB */ 301 if (com_vrip_cndb_attach(iot, VRIP_SIU_ADDR, 9600, VRCOM_FREQ, 302 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) { 303 printf("%s(%d): can't init kgdb's serial port", 304 __FILE__, __LINE__); 305 } 306 #else /* KGDB */ 307 if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) { 308 /* Serial console */ 309 if (com_vrip_cndb_attach(iot, VRIP_SIU_ADDR, CONSPEED, 310 VRCOM_FREQ, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) { 311 printf("%s(%d): can't init serial console", 312 __FILE__, __LINE__); 313 } else { 314 return; 315 } 316 } 317 #endif /* KGDB */ 318 #endif /* NCOM > 0 */ 319 320 #if NHPCFB > 0 321 if (hpcfb_cnattach(NULL)) { 322 printf("%s(%d): can't init fb console", __FILE__, __LINE__); 323 } else { 324 goto find_keyboard; 325 } 326 find_keyboard: 327 #endif /* NHPCFB > 0 */ 328 329 #if NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR 330 if (vrkiu_cnattach(iot, VRIP_KIU_ADDR)) { 331 printf("%s(%d): can't init vrkiu as console", 332 __FILE__, __LINE__); 333 } else { 334 return; 335 } 336 #endif /* NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR */ 337 } 338 339 void 340 vr_reboot(int howto, char *bootstr) 341 { 342 /* 343 * power down 344 */ 345 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) { 346 printf("fake powerdown\n"); 347 __asm(__CONCAT(".word ",___STRING(VR_OPCODE_HIBERNATE))); 348 __asm("nop"); 349 __asm("nop"); 350 __asm("nop"); 351 __asm("nop"); 352 __asm("nop"); 353 __asm(".set reorder"); 354 /* not reach */ 355 vr_reboot(howto&~RB_HALT, bootstr); 356 } 357 /* 358 * halt 359 */ 360 if (howto & RB_HALT) { 361 #if NVRIP > 0 362 _spllower(~MIPS_INT_MASK_0); 363 vrip_intr_suspend(); 364 #else 365 splhigh(); 366 #endif 367 __asm(".set noreorder"); 368 __asm(__CONCAT(".word ",___STRING(VR_OPCODE_SUSPEND))); 369 __asm("nop"); 370 __asm("nop"); 371 __asm("nop"); 372 __asm("nop"); 373 __asm("nop"); 374 __asm(".set reorder"); 375 #if NVRIP > 0 376 vrip_intr_resume(); 377 #endif 378 } 379 /* 380 * reset 381 */ 382 #if NVRDSU 383 vrdsu_reset(); 384 #else 385 printf("%s(%d): There is no DSU.", __FILE__, __LINE__); 386 #endif 387 } 388 389 /* 390 * Handle interrupts. 391 */ 392 void 393 VR_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending) 394 { 395 uvmexp.intrs++; 396 397 if (ipending & MIPS_INT_MASK_5) { 398 /* 399 * spl* uses MIPS_INT_MASK not MIPS3_INT_MASK. it causes 400 * INT5 interrupt. 401 */ 402 mips3_cp0_compare_write(mips3_cp0_count_read()); 403 } 404 405 /* for spllowersoftclock */ 406 _splset(((status & ~cause) & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE); 407 408 if (ipending & MIPS_INT_MASK_1) { 409 (*vr_intr_handler[1])(vr_intr_arg[1], pc, status); 410 411 cause &= ~MIPS_INT_MASK_1; 412 _splset(((status & ~cause) & MIPS_HARD_INT_MASK) 413 | MIPS_SR_INT_IE); 414 } 415 416 if (ipending & MIPS_INT_MASK_0) { 417 (*vr_intr_handler[0])(vr_intr_arg[0], pc, status); 418 419 cause &= ~MIPS_INT_MASK_0; 420 } 421 _splset(((status & ~cause) & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE); 422 423 softintr(ipending); 424 } 425 426 void * 427 vr_intr_establish(int line, int (*ih_fun)(void *, u_int32_t, u_int32_t), 428 void *ih_arg) 429 { 430 431 KDASSERT(vr_intr_handler[line] == vr_null_handler); 432 433 vr_intr_handler[line] = ih_fun; 434 vr_intr_arg[line] = ih_arg; 435 436 return ((void *)line); 437 } 438 439 void 440 vr_intr_disestablish(void *ih) 441 { 442 int line = (int)ih; 443 444 vr_intr_handler[line] = vr_null_handler; 445 vr_intr_arg[line] = NULL; 446 } 447 448 int 449 vr_null_handler(void *arg, u_int32_t pc, u_int32_t status) 450 { 451 452 printf("vr_null_handler\n"); 453 454 return (0); 455 } 456 457 /* 458 int x4181 = VR4181; 459 int x4101 = VR4101; 460 int x4102 = VR4102; 461 int x4111 = VR4111; 462 int x4121 = VR4121; 463 int x4122 = VR4122; 464 int xo4181 = ONLY_VR4181; 465 int xo4101 = ONLY_VR4101; 466 int xo4102 = ONLY_VR4102; 467 int xo4111_4121 = ONLY_VR4111_4121; 468 int g4101=VRGROUP_4101; 469 int g4102=VRGROUP_4102; 470 int g4181=VRGROUP_4181; 471 int g4102_4121=VRGROUP_4102_4121; 472 int g4111_4121=VRGROUP_4111_4121; 473 int g4102_4122=VRGROUP_4102_4122; 474 int g4111_4122=VRGROUP_4111_4122; 475 int single_vrip_base=SINGLE_VRIP_BASE; 476 int vrip_base_addr=VRIP_BASE_ADDR; 477 */ 478
Indexes created Mon Sep 29 21:09:56 GMT 2025