vr.c revision 1.32 1 /* $NetBSD: vr.c,v 1.32 2001/11/18 08:19:41 takemura Exp $ */
2
3 /*-
4 * Copyright (c) 1999-2001
5 * Shin Takemura and PocketBSD Project. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by the PocketBSD project
18 * and its contributors.
19 * 4. Neither the name of the project nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 */
36
37 #include "opt_vr41xx.h"
38 #include "opt_tx39xx.h"
39 #include "opt_kgdb.h"
40
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/reboot.h>
44
45 #include <uvm/uvm_extern.h>
46
47 #include <machine/sysconf.h>
48 #include <machine/bootinfo.h>
49 #include <machine/bus.h>
50 #include <machine/bus_space_hpcmips.h>
51
52 #include <dev/hpc/hpckbdvar.h>
53
54 #include <hpcmips/hpcmips/machdep.h> /* cpu_name, mem_cluster */
55
56 #include <hpcmips/vr/vr.h>
57 #include <hpcmips/vr/vr_asm.h>
58 #include <hpcmips/vr/vrcpudef.h>
59 #include <hpcmips/vr/vripreg.h>
60 #include <hpcmips/vr/rtcreg.h>
61
62 #include "vrip.h"
63 #if NVRIP > 0
64 #include <hpcmips/vr/vripvar.h>
65 #endif
66
67 #include "vrbcu.h"
68 #if NVRBCU > 0
69 #include <hpcmips/vr/bcuvar.h>
70 #endif
71
72 #include "vrdsu.h"
73 #if NVRDSU > 0
74 #include <hpcmips/vr/vrdsuvar.h>
75 #endif
76
77 #include "com.h"
78 #if NCOM > 0
79 #include <sys/termios.h>
80 #include <sys/ttydefaults.h>
81 #include <dev/ic/comreg.h>
82 #include <dev/ic/comvar.h>
83 #include <hpcmips/vr/siureg.h>
84 #include <hpcmips/vr/com_vripvar.h>
85 #ifndef CONSPEED
86 #define CONSPEED TTYDEF_SPEED
87 #endif
88 #endif
89
90 #include "hpcfb.h"
91 #include "vrkiu.h"
92 #if (NVRKIU > 0) || (NHPCFB > 0)
93 #include <dev/wscons/wsdisplayvar.h>
94 #include <dev/rasops/rasops.h>
95 #endif
96
97 #if NHPCFB > 0
98 #include <dev/hpc/hpcfbvar.h>
99 #endif
100
101 #if NVRKIU > 0
102 #include <arch/hpcmips/vr/vrkiureg.h>
103 #include <arch/hpcmips/vr/vrkiuvar.h>
104 #endif
105
106 #ifdef DEBUG
107 #define STATIC
108 #else
109 #define STATIC static
110 #endif
111
112 /*
113 * This is a mask of bits to clear in the SR when we go to a
114 * given interrupt priority level.
115 */
116 const u_int32_t __ipl_sr_bits_vr[_IPL_N] = {
117 0, /* IPL_NONE */
118
119 MIPS_SOFT_INT_MASK_0, /* IPL_SOFT */
120
121 MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */
122
123 MIPS_SOFT_INT_MASK_0|
124 MIPS_SOFT_INT_MASK_1, /* IPL_SOFTNET */
125
126 MIPS_SOFT_INT_MASK_0|
127 MIPS_SOFT_INT_MASK_1, /* IPL_SOFTSERIAL */
128
129 MIPS_SOFT_INT_MASK_0|
130 MIPS_SOFT_INT_MASK_1|
131 MIPS_INT_MASK_0, /* IPL_BIO */
132
133 MIPS_SOFT_INT_MASK_0|
134 MIPS_SOFT_INT_MASK_1|
135 MIPS_INT_MASK_0, /* IPL_NET */
136
137 MIPS_SOFT_INT_MASK_0|
138 MIPS_SOFT_INT_MASK_1|
139 MIPS_INT_MASK_0, /* IPL_{TTY,SERIAL} */
140
141 MIPS_SOFT_INT_MASK_0|
142 MIPS_SOFT_INT_MASK_1|
143 MIPS_INT_MASK_0|
144 MIPS_INT_MASK_1, /* IPL_{CLOCK,HIGH} */
145 };
146
147 #if defined(VR41XX) && defined(TX39XX)
148 #define VR_INTR vr_intr
149 #else
150 #define VR_INTR cpu_intr /* locore_mips3 directly call this */
151 #endif
152
153 void vr_init(void);
154 void VR_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
155 extern void vr_idle(void);
156 STATIC void vr_cons_init(void);
157 STATIC void vr_fb_init(caddr_t *);
158 STATIC void vr_mem_init(paddr_t);
159 STATIC void vr_find_dram(paddr_t, paddr_t);
160 STATIC void vr_reboot(int, char *);
161
162 /*
163 * CPU interrupt dispatch table (HwInt[0:3])
164 */
165 STATIC int vr_null_handler(void *, u_int32_t, u_int32_t);
166 STATIC int (*vr_intr_handler[4])(void *, u_int32_t, u_int32_t) =
167 {
168 vr_null_handler,
169 vr_null_handler,
170 vr_null_handler,
171 vr_null_handler
172 };
173 STATIC void *vr_intr_arg[4];
174
175 void
176 vr_init()
177 {
178 /*
179 * Platform Specific Function Hooks
180 */
181 platform.cpu_idle = vr_idle;
182 platform.cpu_intr = VR_INTR;
183 platform.cons_init = vr_cons_init;
184 platform.fb_init = vr_fb_init;
185 platform.mem_init = vr_mem_init;
186 platform.reboot = vr_reboot;
187
188 #if NVRBCU > 0
189 sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
190 vrbcu_vrip_getcpuname(),
191 vrbcu_vrip_getcpumajor(),
192 vrbcu_vrip_getcpuminor(),
193 vrbcu_vrip_getcpuclock() / 1000000,
194 (vrbcu_vrip_getcpuclock() % 1000000) / 1000);
195 #else
196 sprintf(cpu_name, "NEC VR41xx");
197 #endif
198 }
199
200 void
201 vr_mem_init(paddr_t kernend)
202 {
203
204 mem_clusters[0].start = 0;
205 mem_clusters[0].size = kernend;
206 mem_cluster_cnt = 1;
207
208 vr_find_dram(kernend, 0x02000000);
209 vr_find_dram(0x02000000, 0x04000000);
210 vr_find_dram(0x04000000, 0x06000000);
211 vr_find_dram(0x06000000, 0x08000000);
212
213 /* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/
214 memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF - (KERNBASE + 0x800));
215 }
216
217 void
218 vr_find_dram(paddr_t addr, paddr_t end)
219 {
220 int n;
221 caddr_t page;
222 #ifdef NARLY_MEMORY_PROBE
223 int x, i;
224 #endif
225
226 #ifdef VR_FIND_DRAMLIM
227 if (VR_FIND_DRAMLIM < end)
228 end = VR_FIND_DRAMLIM;
229 #endif /* VR_FIND_DRAMLIM */
230 n = mem_cluster_cnt;
231 for (; addr < end; addr += NBPG) {
232
233 page = (void *)MIPS_PHYS_TO_KSEG1(addr);
234 if (badaddr(page, 4))
235 goto bad;
236
237 /* stop memory probing at first memory image */
238 if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
239 return;
240
241 *(volatile int *)(page+0) = 0xa5a5a5a5;
242 *(volatile int *)(page+4) = 0x5a5a5a5a;
243 wbflush();
244 if (*(volatile int *)(page+0) != 0xa5a5a5a5)
245 goto bad;
246
247 *(volatile int *)(page+0) = 0x5a5a5a5a;
248 *(volatile int *)(page+4) = 0xa5a5a5a5;
249 wbflush();
250 if (*(volatile int *)(page+0) != 0x5a5a5a5a)
251 goto bad;
252
253 #ifdef NARLY_MEMORY_PROBE
254 x = random();
255 for (i = 0; i < NBPG; i += 4)
256 *(volatile int *)(page+i) = (x ^ i);
257 wbflush();
258 for (i = 0; i < NBPG; i += 4)
259 if (*(volatile int *)(page+i) != (x ^ i))
260 goto bad;
261
262 x = random();
263 for (i = 0; i < NBPG; i += 4)
264 *(volatile int *)(page+i) = (x ^ i);
265 wbflush();
266 for (i = 0; i < NBPG; i += 4)
267 if (*(volatile int *)(page+i) != (x ^ i))
268 goto bad;
269 #endif /* NARLY_MEMORY_PROBE */
270
271 if (!mem_clusters[n].size)
272 mem_clusters[n].start = addr;
273 mem_clusters[n].size += NBPG;
274 continue;
275
276 bad:
277 if (mem_clusters[n].size)
278 ++n;
279 continue;
280 }
281 if (mem_clusters[n].size)
282 ++n;
283 mem_cluster_cnt = n;
284 }
285
286 void
287 vr_fb_init(caddr_t *kernend)
288 {
289 /* Nothing to do */
290 }
291
292 void
293 vr_cons_init()
294 {
295 #if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0
296 bus_space_tag_t iot = hpcmips_system_bus_space();
297 #endif
298
299 #if NCOM > 0
300 #ifdef KGDB
301 /* if KGDB is defined, always use the serial port for KGDB */
302 if (com_vrip_cndb_attach(iot, VRIP_SIU_ADDR, 9600, VRCOM_FREQ,
303 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
304 printf("%s(%d): can't init kgdb's serial port",
305 __FILE__, __LINE__);
306 }
307 #else /* KGDB */
308 if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
309 /* Serial console */
310 if (com_vrip_cndb_attach(iot, VRIP_SIU_ADDR, CONSPEED,
311 VRCOM_FREQ, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) {
312 printf("%s(%d): can't init serial console",
313 __FILE__, __LINE__);
314 } else {
315 return;
316 }
317 }
318 #endif /* KGDB */
319 #endif /* NCOM > 0 */
320
321 #if NHPCFB > 0
322 if (hpcfb_cnattach(NULL)) {
323 printf("%s(%d): can't init fb console", __FILE__, __LINE__);
324 } else {
325 goto find_keyboard;
326 }
327 find_keyboard:
328 #endif /* NHPCFB > 0 */
329
330 #if NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR
331 if (vrkiu_cnattach(iot, VRIP_KIU_ADDR)) {
332 printf("%s(%d): can't init vrkiu as console",
333 __FILE__, __LINE__);
334 } else {
335 return;
336 }
337 #endif /* NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR */
338 }
339
340 void
341 vr_reboot(int howto, char *bootstr)
342 {
343 /*
344 * power down
345 */
346 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
347 printf("fake powerdown\n");
348 __asm(__CONCAT(".word ",___STRING(VR_OPCODE_HIBERNATE)));
349 __asm("nop");
350 __asm("nop");
351 __asm("nop");
352 __asm("nop");
353 __asm("nop");
354 __asm(".set reorder");
355 /* not reach */
356 vr_reboot(howto&~RB_HALT, bootstr);
357 }
358 /*
359 * halt
360 */
361 if (howto & RB_HALT) {
362 #if NVRIP > 0
363 _spllower(~MIPS_INT_MASK_0);
364 vrip_intr_suspend();
365 #else
366 splhigh();
367 #endif
368 __asm(".set noreorder");
369 __asm(__CONCAT(".word ",___STRING(VR_OPCODE_SUSPEND)));
370 __asm("nop");
371 __asm("nop");
372 __asm("nop");
373 __asm("nop");
374 __asm("nop");
375 __asm(".set reorder");
376 #if NVRIP > 0
377 vrip_intr_resume();
378 #endif
379 }
380 /*
381 * reset
382 */
383 #if NVRDSU
384 vrdsu_reset();
385 #else
386 printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
387 #endif
388 }
389
390 /*
391 * Handle interrupts.
392 */
393 void
394 VR_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
395 {
396 uvmexp.intrs++;
397
398 if (ipending & MIPS_INT_MASK_5) {
399 /*
400 * spl* uses MIPS_INT_MASK not MIPS3_INT_MASK. it causes
401 * INT5 interrupt.
402 */
403 mips3_cp0_compare_write(mips3_cp0_count_read());
404 }
405
406 /* for spllowersoftclock */
407 _splset(((status & ~cause) & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
408
409 if (ipending & MIPS_INT_MASK_1) {
410 (*vr_intr_handler[1])(vr_intr_arg[1], pc, status);
411
412 cause &= ~MIPS_INT_MASK_1;
413 _splset(((status & ~cause) & MIPS_HARD_INT_MASK)
414 | MIPS_SR_INT_IE);
415 }
416
417 if (ipending & MIPS_INT_MASK_0) {
418 (*vr_intr_handler[0])(vr_intr_arg[0], pc, status);
419
420 cause &= ~MIPS_INT_MASK_0;
421 }
422 _splset(((status & ~cause) & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
423
424 softintr(ipending);
425 }
426
427 void *
428 vr_intr_establish(int line, int (*ih_fun)(void *, u_int32_t, u_int32_t),
429 void *ih_arg)
430 {
431
432 KDASSERT(vr_intr_handler[line] == vr_null_handler);
433
434 vr_intr_handler[line] = ih_fun;
435 vr_intr_arg[line] = ih_arg;
436
437 return ((void *)line);
438 }
439
440 void
441 vr_intr_disestablish(void *ih)
442 {
443 int line = (int)ih;
444
445 vr_intr_handler[line] = vr_null_handler;
446 vr_intr_arg[line] = NULL;
447 }
448
449 int
450 vr_null_handler(void *arg, u_int32_t pc, u_int32_t status)
451 {
452
453 printf("vr_null_handler\n");
454
455 return (0);
456 }
457
458 /*
459 int x4181 = VR4181;
460 int x4101 = VR4101;
461 int x4102 = VR4102;
462 int x4111 = VR4111;
463 int x4121 = VR4121;
464 int x4122 = VR4122;
465 int xo4181 = ONLY_VR4181;
466 int xo4101 = ONLY_VR4101;
467 int xo4102 = ONLY_VR4102;
468 int xo4111_4121 = ONLY_VR4111_4121;
469 int g4101=VRGROUP_4101;
470 int g4102=VRGROUP_4102;
471 int g4181=VRGROUP_4181;
472 int g4102_4121=VRGROUP_4102_4121;
473 int g4111_4121=VRGROUP_4111_4121;
474 int g4102_4122=VRGROUP_4102_4122;
475 int g4111_4122=VRGROUP_4111_4122;
476 int single_vrip_base=SINGLE_VRIP_BASE;
477 int vrip_base_addr=VRIP_BASE_ADDR;
478 */
479