vr.c revision 1.49
1 /* $NetBSD: vr.c,v 1.49 2007/12/03 15:33:44 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2002 5 * Shin Takemura and PocketBSD Project. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the PocketBSD project 18 * and its contributors. 19 * 4. Neither the name of the project nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: vr.c,v 1.49 2007/12/03 15:33:44 ad Exp $"); 39 40 #include "opt_vr41xx.h" 41 #include "opt_tx39xx.h" 42 #include "opt_kgdb.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/reboot.h> 47 48 #include <uvm/uvm_extern.h> 49 50 #include <machine/sysconf.h> 51 #include <machine/bootinfo.h> 52 #include <machine/bus.h> 53 #include <machine/bus_space_hpcmips.h> 54 #include <machine/platid.h> 55 #include <machine/platid_mask.h> 56 57 #include <dev/hpc/hpckbdvar.h> 58 59 #include <hpcmips/vr/vr.h> 60 #include <hpcmips/vr/vr_asm.h> 61 #include <hpcmips/vr/vrcpudef.h> 62 #include <hpcmips/vr/vripreg.h> 63 #include <hpcmips/vr/rtcreg.h> 64 65 #include <mips/cache.h> 66 67 #include "vrip_common.h" 68 #if NVRIP_COMMON > 0 69 #include <hpcmips/vr/vripvar.h> 70 #endif 71 72 #include "vrbcu.h" 73 #if NVRBCU > 0 74 #include <hpcmips/vr/bcuvar.h> 75 #endif 76 77 #include "vrdsu.h" 78 #if NVRDSU > 0 79 #include <hpcmips/vr/vrdsuvar.h> 80 #endif 81 82 #include "com.h" 83 #include "com_vrip.h" 84 #include "com_hpcio.h" 85 #if NCOM > 0 86 #include <sys/termios.h> 87 #include <sys/ttydefaults.h> 88 #include <dev/ic/comreg.h> 89 #include <dev/ic/comvar.h> 90 #if NCOM_VRIP > 0 91 #include <hpcmips/vr/siureg.h> 92 #include <hpcmips/vr/com_vripvar.h> 93 #endif 94 #if NCOM_HPCIO > 0 95 #include <hpcmips/dev/com_hpciovar.h> 96 #endif 97 #ifndef CONSPEED 98 #define CONSPEED TTYDEF_SPEED 99 #endif 100 #endif 101 102 #include "hpcfb.h" 103 #include "vrkiu.h" 104 #if (NVRKIU > 0) || (NHPCFB > 0) 105 #include <dev/wscons/wsdisplayvar.h> 106 #include <dev/rasops/rasops.h> 107 #endif 108 109 #if NHPCFB > 0 110 #include <dev/hpc/hpcfbvar.h> 111 #endif 112 113 #if NVRKIU > 0 114 #include <arch/hpcmips/vr/vrkiureg.h> 115 #include <arch/hpcmips/vr/vrkiuvar.h> 116 #endif 117 118 #ifdef DEBUG 119 #define STATIC 120 #else 121 #define STATIC static 122 #endif 123 124 /* 125 * This is a mask of bits to clear in the SR when we go to a 126 * given interrupt priority level. 127 */ 128 const u_int32_t __ipl_sr_bits_vr[_IPL_N] = { 129 0, /* IPL_NONE */ 130 131 MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */ 132 133 MIPS_SOFT_INT_MASK_0| 134 MIPS_SOFT_INT_MASK_1, /* IPL_SOFTNET */ 135 136 MIPS_SOFT_INT_MASK_0| 137 MIPS_SOFT_INT_MASK_1| 138 MIPS_INT_MASK_0, /* IPL_VM */ 139 140 MIPS_SOFT_INT_MASK_0| 141 MIPS_SOFT_INT_MASK_1| 142 MIPS_INT_MASK_0| 143 MIPS_INT_MASK_1, /* IPL_SCHED */ 144 }; 145 146 #if defined(VR41XX) && defined(TX39XX) 147 #define VR_INTR vr_intr 148 #else 149 #define VR_INTR cpu_intr /* locore_mips3 directly call this */ 150 #endif 151 152 void vr_init(void); 153 void VR_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t); 154 extern void vr_idle(void); 155 STATIC void vr_cons_init(void); 156 STATIC void vr_fb_init(void **); 157 STATIC void vr_mem_init(paddr_t); 158 STATIC void vr_find_dram(paddr_t, paddr_t); 159 STATIC void vr_reboot(int, char *); 160 161 /* 162 * CPU interrupt dispatch table (HwInt[0:3]) 163 */ 164 STATIC int vr_null_handler(void *, u_int32_t, u_int32_t); 165 STATIC int (*vr_intr_handler[4])(void *, u_int32_t, u_int32_t) = 166 { 167 vr_null_handler, 168 vr_null_handler, 169 vr_null_handler, 170 vr_null_handler 171 }; 172 STATIC void *vr_intr_arg[4]; 173 174 #if NCOM > 0 175 /* 176 * machine dependent serial console info 177 */ 178 static struct vr_com_platdep { 179 platid_mask_t *platidmask; 180 int (*attach)(bus_space_tag_t, int, int, int, tcflag_t, int); 181 int addr; 182 int freq; 183 } platdep_com_table[] = { 184 #if NCOM_HPCIO > 0 185 { 186 &platid_mask_MACH_NEC_MCR_SIGMARION2, 187 com_hpcio_cndb_attach, /* attach proc */ 188 0x0b600000, /* base address */ 189 COM_FREQ, /* frequency */ 190 }, 191 #endif 192 #if NCOM_VRIP > 0 193 #ifdef VR4102 194 { 195 &platid_mask_CPU_MIPS_VR_4102, 196 com_vrip_cndb_attach, /* attach proc */ 197 VR4102_SIU_ADDR, /* base address */ 198 VRCOM_FREQ, /* frequency */ 199 }, 200 #endif /* VR4102 */ 201 #ifdef VR4111 202 { 203 &platid_mask_CPU_MIPS_VR_4111, 204 com_vrip_cndb_attach, /* attach proc */ 205 VR4102_SIU_ADDR, /* base address */ 206 VRCOM_FREQ, /* frequency */ 207 }, 208 #endif /* VR4111 */ 209 #ifdef VR4121 210 { 211 &platid_mask_CPU_MIPS_VR_4121, 212 com_vrip_cndb_attach, /* attach proc */ 213 VR4102_SIU_ADDR, /* base address */ 214 VRCOM_FREQ, /* frequency */ 215 }, 216 #endif /* VR4121 */ 217 #ifdef VR4122 218 { 219 &platid_mask_CPU_MIPS_VR_4122, 220 com_vrip_cndb_attach, /* attach proc */ 221 VR4122_SIU_ADDR, /* base address */ 222 VRCOM_FREQ, /* frequency */ 223 }, 224 #endif /* VR4122 */ 225 #ifdef VR4131 226 { 227 &platid_mask_CPU_MIPS_VR_4122, 228 com_vrip_cndb_attach, /* attach proc */ 229 VR4122_SIU_ADDR, /* base address */ 230 VRCOM_FREQ, /* frequency */ 231 }, 232 #endif /* VR4131 */ 233 #ifdef SINGLE_VRIP_BASE 234 { 235 &platid_wild, 236 com_vrip_cndb_attach, /* attach proc */ 237 VRIP_SIU_ADDR, /* base address */ 238 VRCOM_FREQ, /* frequency */ 239 }, 240 #endif /* SINGLE_VRIP_BASE */ 241 #else /* NCOM_VRIP > 0 */ 242 /* dummy */ 243 { 244 &platid_wild, 245 NULL, /* attach proc */ 246 0, /* base address */ 247 0, /* frequency */ 248 }, 249 #endif /* NCOM_VRIP > 0 */ 250 }; 251 #endif /* NCOM > 0 */ 252 253 #if NVRKIU > 0 254 /* 255 * machine dependent keyboard info 256 */ 257 static struct vr_kiu_platdep { 258 platid_mask_t *platidmask; 259 int addr; 260 } platdep_kiu_table[] = { 261 #ifdef VR4102 262 { 263 &platid_mask_CPU_MIPS_VR_4102, 264 VR4102_KIU_ADDR, /* base address */ 265 }, 266 #endif /* VR4102 */ 267 #ifdef VR4111 268 { 269 &platid_mask_CPU_MIPS_VR_4111, 270 VR4102_KIU_ADDR, /* base address */ 271 }, 272 #endif /* VR4111 */ 273 #ifdef VR4121 274 { 275 &platid_mask_CPU_MIPS_VR_4121, 276 VR4102_KIU_ADDR, /* base address */ 277 }, 278 #endif /* VR4121 */ 279 { 280 &platid_wild, 281 #ifdef SINGLE_VRIP_BASE 282 VRIP_KIU_ADDR, /* base address */ 283 #else 284 VRIP_NO_ADDR, /* base address */ 285 #endif /* SINGLE_VRIP_BASE */ 286 }, 287 }; 288 #endif /* NVRKIU > 0 */ 289 290 void 291 vr_init() 292 { 293 /* 294 * Platform Specific Function Hooks 295 */ 296 platform.cpu_idle = vr_idle; 297 platform.cpu_intr = VR_INTR; 298 platform.cons_init = vr_cons_init; 299 platform.fb_init = vr_fb_init; 300 platform.mem_init = vr_mem_init; 301 platform.reboot = vr_reboot; 302 303 #if NVRBCU > 0 304 sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz", 305 vrbcu_vrip_getcpuname(), 306 vrbcu_vrip_getcpumajor(), 307 vrbcu_vrip_getcpuminor(), 308 vrbcu_vrip_getcpuclock() / 1000000, 309 (vrbcu_vrip_getcpuclock() % 1000000) / 1000); 310 #else 311 sprintf(cpu_name, "NEC VR41xx"); 312 #endif 313 } 314 315 void 316 vr_mem_init(paddr_t kernend) 317 { 318 319 mem_clusters[0].start = 0; 320 mem_clusters[0].size = kernend; 321 mem_cluster_cnt = 1; 322 323 vr_find_dram(kernend, 0x02000000); 324 vr_find_dram(0x02000000, 0x04000000); 325 vr_find_dram(0x04000000, 0x06000000); 326 vr_find_dram(0x06000000, 0x08000000); 327 } 328 329 void 330 vr_find_dram(paddr_t addr, paddr_t end) 331 { 332 int n; 333 char *page; 334 #ifdef NARLY_MEMORY_PROBE 335 int x, i; 336 #endif 337 338 #ifdef VR_FIND_DRAMLIM 339 if (VR_FIND_DRAMLIM < end) 340 end = VR_FIND_DRAMLIM; 341 #endif /* VR_FIND_DRAMLIM */ 342 n = mem_cluster_cnt; 343 for (; addr < end; addr += PAGE_SIZE) { 344 345 page = (char *)MIPS_PHYS_TO_KSEG1(addr); 346 if (badaddr(page, 4)) 347 goto bad; 348 349 /* stop memory probing at first memory image */ 350 if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0) 351 return; 352 353 *(volatile int *)(page+0) = 0xa5a5a5a5; 354 *(volatile int *)(page+4) = 0x5a5a5a5a; 355 wbflush(); 356 if (*(volatile int *)(page+0) != 0xa5a5a5a5) 357 goto bad; 358 359 *(volatile int *)(page+0) = 0x5a5a5a5a; 360 *(volatile int *)(page+4) = 0xa5a5a5a5; 361 wbflush(); 362 if (*(volatile int *)(page+0) != 0x5a5a5a5a) 363 goto bad; 364 365 #ifdef NARLY_MEMORY_PROBE 366 x = random(); 367 for (i = 0; i < PAGE_SIZE; i += 4) 368 *(volatile int *)(page+i) = (x ^ i); 369 wbflush(); 370 for (i = 0; i < PAGE_SIZE; i += 4) 371 if (*(volatile int *)(page+i) != (x ^ i)) 372 goto bad; 373 374 x = random(); 375 for (i = 0; i < PAGE_SIZE; i += 4) 376 *(volatile int *)(page+i) = (x ^ i); 377 wbflush(); 378 for (i = 0; i < PAGE_SIZE; i += 4) 379 if (*(volatile int *)(page+i) != (x ^ i)) 380 goto bad; 381 #endif /* NARLY_MEMORY_PROBE */ 382 383 if (!mem_clusters[n].size) 384 mem_clusters[n].start = addr; 385 mem_clusters[n].size += PAGE_SIZE; 386 continue; 387 388 bad: 389 if (mem_clusters[n].size) 390 ++n; 391 continue; 392 } 393 if (mem_clusters[n].size) 394 ++n; 395 mem_cluster_cnt = n; 396 } 397 398 void 399 vr_fb_init(void **kernend) 400 { 401 /* Nothing to do */ 402 } 403 404 void 405 vr_cons_init() 406 { 407 #if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0 408 bus_space_tag_t iot = hpcmips_system_bus_space(); 409 #endif 410 #if NCOM > 0 411 static struct vr_com_platdep *com_info; 412 #endif 413 #if NVRKIU > 0 414 static struct vr_kiu_platdep *kiu_info; 415 #endif 416 417 #if NCOM > 0 418 com_info = platid_search(&platid, platdep_com_table, 419 sizeof(platdep_com_table)/sizeof(*platdep_com_table), 420 sizeof(*platdep_com_table)); 421 #ifdef KGDB 422 if (com_info->attach != NULL) { 423 /* if KGDB is defined, always use the serial port for KGDB */ 424 if ((*com_info->attach)(iot, com_info->addr, 9600, 425 com_info->freq, 426 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) { 427 printf("%s(%d): can't init kgdb's serial port", 428 __FILE__, __LINE__); 429 } 430 #else /* KGDB */ 431 if (com_info->attach != NULL && (bootinfo->bi_cnuse&BI_CNUSE_SERIAL)) { 432 /* Serial console */ 433 if ((*com_info->attach)(iot, com_info->addr, CONSPEED, 434 com_info->freq, 435 (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) { 436 printf("%s(%d): can't init serial console", 437 __FILE__, __LINE__); 438 } else { 439 return; 440 } 441 } 442 #endif /* KGDB */ 443 #endif /* NCOM > 0 */ 444 445 #if NHPCFB > 0 446 if (hpcfb_cnattach(NULL)) { 447 printf("%s(%d): can't init fb console", __FILE__, __LINE__); 448 } else { 449 goto find_keyboard; 450 } 451 find_keyboard: 452 #endif /* NHPCFB > 0 */ 453 454 #if NVRKIU > 0 455 kiu_info = platid_search(&platid, platdep_kiu_table, 456 sizeof(platdep_kiu_table)/sizeof(*platdep_kiu_table), 457 sizeof(*platdep_kiu_table)); 458 if (kiu_info->addr != VRIP_NO_ADDR) { 459 if (vrkiu_cnattach(iot, kiu_info->addr)) { 460 printf("%s(%d): can't init vrkiu as console", 461 __FILE__, __LINE__); 462 } else { 463 return; 464 } 465 } 466 #endif /* NVRKIU > 0 */ 467 } 468 469 extern char vr_hibernate[]; 470 extern char evr_hibernate[]; 471 472 void 473 vr_reboot(int howto, char *bootstr) 474 { 475 /* 476 * power down 477 */ 478 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) { 479 printf("fake powerdown\n"); 480 /* 481 * copy vr_hibernate() to top of physical memory. 482 */ 483 memcpy((void *)MIPS_KSEG0_START, vr_hibernate, 484 evr_hibernate - (char *)vr_hibernate); 485 /* sync I&D cache */ 486 mips_dcache_wbinv_all(); 487 mips_icache_sync_all(); 488 /* 489 * call vr_hibernate() at MIPS_KSEG0_START. 490 */ 491 ((void (*)(void *,int))MIPS_KSEG0_START)( 492 (void *)MIPS_KSEG0_START, ptoa(physmem)); 493 /* not reach */ 494 vr_reboot(howto&~RB_HALT, bootstr); 495 } 496 /* 497 * halt 498 */ 499 if (howto & RB_HALT) { 500 #if NVRIP_COMMON > 0 501 _spllower(~MIPS_INT_MASK_0); 502 vrip_intr_suspend(); 503 #else 504 splhigh(); 505 #endif 506 __asm(".set noreorder"); 507 __asm(".word " ___STRING(VR_OPCODE_SUSPEND)); 508 __asm("nop"); 509 __asm("nop"); 510 __asm("nop"); 511 __asm("nop"); 512 __asm("nop"); 513 __asm(".set reorder"); 514 #if NVRIP_COMMON > 0 515 vrip_intr_resume(); 516 #endif 517 } 518 /* 519 * reset 520 */ 521 #if NVRDSU 522 vrdsu_reset(); 523 #else 524 printf("%s(%d): There is no DSU.", __FILE__, __LINE__); 525 #endif 526 } 527 528 /* 529 * Handle interrupts. 530 */ 531 void 532 VR_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending) 533 { 534 uvmexp.intrs++; 535 536 /* Deal with unneded compare interrupts occasionally so that we can 537 * keep spllowersoftclock. */ 538 if (ipending & MIPS_INT_MASK_5) { 539 mips3_cp0_compare_write(0); 540 } 541 542 if (ipending & MIPS_INT_MASK_1) { 543 _splset(MIPS_SR_INT_IE); /* for spllowersoftclock */ 544 /* Remove the lower priority pending bits from status so that 545 * spllowersoftclock will not happen if other interrupts are 546 * pending. */ 547 (*vr_intr_handler[1])(vr_intr_arg[1], pc, status & ~(ipending 548 & (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1))); 549 } 550 551 if (ipending & MIPS_INT_MASK_0) { 552 _splset(MIPS_INT_MASK_1|MIPS_SR_INT_IE); 553 (*vr_intr_handler[0])(vr_intr_arg[0], pc, status); 554 } 555 556 #ifdef __HAVE_FAST_SOFTINTS 557 if (ipending & MIPS_SOFT_INT_MASK_1) { 558 _splset(MIPS_INT_MASK_1|MIPS_INT_MASK_0|MIPS_SR_INT_IE); 559 softintr(MIPS_SOFT_INT_MASK_1); 560 } 561 562 if (ipending & MIPS_SOFT_INT_MASK_0) { 563 _splset(MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_1|MIPS_INT_MASK_0| 564 MIPS_SR_INT_IE); 565 softintr(MIPS_SOFT_INT_MASK_0); 566 } 567 #endif 568 } 569 570 void * 571 vr_intr_establish(int line, int (*ih_fun)(void *, u_int32_t, u_int32_t), 572 void *ih_arg) 573 { 574 575 KDASSERT(vr_intr_handler[line] == vr_null_handler); 576 577 vr_intr_handler[line] = ih_fun; 578 vr_intr_arg[line] = ih_arg; 579 580 return ((void *)line); 581 } 582 583 void 584 vr_intr_disestablish(void *ih) 585 { 586 int line = (int)ih; 587 588 vr_intr_handler[line] = vr_null_handler; 589 vr_intr_arg[line] = NULL; 590 } 591 592 int 593 vr_null_handler(void *arg, u_int32_t pc, u_int32_t status) 594 { 595 596 printf("vr_null_handler\n"); 597 598 return (0); 599 } 600 601 /* 602 int x4181 = VR4181; 603 int x4101 = VR4101; 604 int x4102 = VR4102; 605 int x4111 = VR4111; 606 int x4121 = VR4121; 607 int x4122 = VR4122; 608 int xo4181 = ONLY_VR4181; 609 int xo4101 = ONLY_VR4101; 610 int xo4102 = ONLY_VR4102; 611 int xo4111_4121 = ONLY_VR4111_4121; 612 int g4101=VRGROUP_4101; 613 int g4102=VRGROUP_4102; 614 int g4181=VRGROUP_4181; 615 int g4102_4121=VRGROUP_4102_4121; 616 int g4111_4121=VRGROUP_4111_4121; 617 int g4102_4122=VRGROUP_4102_4122; 618 int g4111_4122=VRGROUP_4111_4122; 619 int single_vrip_base=SINGLE_VRIP_BASE; 620 int vrip_base_addr=VRIP_BASE_ADDR; 621 */ 622
Indexes created Sun Sep 28 07:09:56 GMT 2025