vr4181giureg.h revision 1.1
1 /* $NetBSD: vr4181giureg.h,v 1.1 2002/02/09 18:08:44 sato Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 SATO Kazumi. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the project nor the names of its contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 */ 31 32 /* 33 * VR4181 GIU (General Purpose I/O Unit) Registers. 34 */ 35 #define VR4181GIU_NO_REG_W 0xffffffff /* no register */ 36 37 #define VR4181GIU_MODE0_REG 0x00 38 #define VR4181GIU_MODE0_REG_W 0x00 39 #define VR4181GIU_MODE1_REG_W 0x02 40 #define VR4181GIU_MODE2_REG_W 0x04 41 #define VR4181GIU_MODE3_REG_W 0x06 42 43 #define VR4181GIU_MODE_GPIO 0x0 44 #define VR4181GIU_MODE_ALT 0x1 45 /* VR4181GIU_MODE_GPIO */ 46 #define VR4181GIU_MODE_IN 0x0 47 #define VR4181GIU_MODE_OUT 0x2 48 /* VR4181GIU_MODE_ALT */ 49 #define VR4181GIU_MODE_ALT1 0x0 50 #define VR4181GIU_MODE_ALT2 0x2 51 52 #define VR4181GIU_PIOD_REG 0x08 53 #define VR4181GIU_PIOD_L_REG_W 0x08 54 #define VR4181GIU_PIOD_H_REG_W 0x0a 55 56 #define VR4181GIU_INTEN_REG_W 0x0c 57 58 #define VR4181GIU_INTMASK_REG_W 0x0e 59 60 #define VR4181GIU_INTTYP_REG 0x10 61 #define VR4181GIU_INTTYP_L_REG_W 0x10 62 #define VR4181GIU_INTTYP_H_REG_W 0x12 63 64 #define VR4181GIU_INTSTAT_REG_W 0x14 65 66 #define VR4181GIU_HIBST_REG 0x16 67 #define VR4181GIU_HIBST_L_REG_W 0x16 68 #define VR4181GIU_HIBST_H_REG_W 0x18 69 70 #define VR4181GIU_SICTL_REG_W 0x1a 71 72 #define VR4181GIU_KEYEN_REG_W 0x1c 73 74 #define VR4181GIU_INTTYP_EDGE 0 75 #define VR4181GIU_INTTYP_LEVEL 0x2 76 #define VR4181GIU_INTTYP_HIGH 1 77 #define VR4181GIU_INTTYP_LOW 0 78 79 /* END vr4181giu.h */ 80
Indexes created Wed Oct 01 19:09:53 GMT 2025