vrc4172pci.c revision 1.11 
1/*	$NetBSD: vrc4172pci.c,v 1.11 2003/12/27 07:34:21 shin Exp $	*/
2
3/*-
4 * Copyright (c) 2002 TAKEMURA Shin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of the project nor the names of its contributors
16 *    may be used to endorse or promote products derived from this software
17 *    without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: vrc4172pci.c,v 1.11 2003/12/27 07:34:21 shin Exp $");
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/device.h>
38
39#include <machine/bus.h>
40#include <machine/bus_space_hpcmips.h>
41#include <machine/bus_dma_hpcmips.h>
42#include <machine/config_hook.h>
43#include <machine/platid.h>
44#include <machine/platid_mask.h>
45
46#include <dev/pci/pcivar.h>
47#include <dev/pci/pcidevs.h>
48#include <dev/pci/pciidereg.h>
49
50#include <hpcmips/vr/icureg.h>
51#include <hpcmips/vr/vripif.h>
52#include <hpcmips/vr/vrc4172pcireg.h>
53
54#include "pci.h"
55#include "opt_vrc4172pci.h"
56
57#ifdef DEBUG
58#define	DPRINTF(args)	printf args
59#else
60#define	DPRINTF(args)	while (0) {}
61#endif
62
63struct vrc4172pci_softc {
64	struct device sc_dev;
65
66	bus_space_tag_t sc_iot;
67	bus_space_handle_t sc_ioh;
68
69	struct hpcmips_pci_chipset sc_pc;
70#ifdef VRC4172PCI_MCR700_SUPPORT
71	pcireg_t sc_fake_baseaddr;
72	hpcio_chip_t sc_iochip;
73#if 0
74	hpcio_intr_handle_t sc_ih;
75#endif
76#endif /* VRC4172PCI_MCR700_SUPPORT */
77};
78
79static int	vrc4172pci_match(struct device *, struct cfdata *, void *);
80static void	vrc4172pci_attach(struct device *, struct device *, void *);
81#if NPCI > 0
82static int	vrc4172pci_print(void *, const char *);
83#endif
84static void	vrc4172pci_attach_hook(struct device *, struct device *,
85		    struct pcibus_attach_args *);
86static int	vrc4172pci_bus_maxdevs(pci_chipset_tag_t, int);
87static int	vrc4172pci_bus_devorder(pci_chipset_tag_t, int, char *);
88static pcitag_t	vrc4172pci_make_tag(pci_chipset_tag_t, int, int, int);
89static void	vrc4172pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *,
90		    int *, int *);
91static pcireg_t	vrc4172pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
92static void	vrc4172pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
93		    pcireg_t);
94static int	vrc4172pci_intr_map(struct pci_attach_args *,
95		    pci_intr_handle_t *);
96static const char *vrc4172pci_intr_string(pci_chipset_tag_t,pci_intr_handle_t);
97static const struct evcnt *vrc4172pci_intr_evcnt(pci_chipset_tag_t,
98		    pci_intr_handle_t);
99static void	*vrc4172pci_intr_establish(pci_chipset_tag_t,
100		    pci_intr_handle_t, int, int (*)(void *), void *);
101static void	vrc4172pci_intr_disestablish(pci_chipset_tag_t, void *);
102#ifdef VRC4172PCI_MCR700_SUPPORT
103#if 0
104static int	vrc4172pci_mcr700_intr(void *arg);
105#endif
106#endif
107
108CFATTACH_DECL(vrc4172pci, sizeof(struct vrc4172pci_softc),
109    vrc4172pci_match, vrc4172pci_attach, NULL, NULL);
110
111static inline void
112vrc4172pci_write(struct vrc4172pci_softc *sc, int offset, u_int32_t val)
113{
114
115	bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);
116}
117
118static inline u_int32_t
119vrc4172pci_read(struct vrc4172pci_softc *sc, int offset)
120{
121	u_int32_t res;
122
123	if (bus_space_peek(sc->sc_iot, sc->sc_ioh, offset, 4, &res) < 0) {
124		res = 0xffffffff;
125	}
126
127	return (res);
128}
129
130static int
131vrc4172pci_match(struct device *parent, struct cfdata *match, void *aux)
132{
133
134	return (1);
135}
136
137static void
138vrc4172pci_attach(struct device *parent, struct device *self, void *aux)
139{
140	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)self;
141	pci_chipset_tag_t pc = &sc->sc_pc;
142	struct vrip_attach_args *va = aux;
143#if NPCI > 0
144	struct pcibus_attach_args pba;
145#endif
146
147	sc->sc_iot = va->va_iot;
148	if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0,
149	    &sc->sc_ioh)) {
150		printf(": couldn't map io space\n");
151		return;
152	}
153	printf("\n");
154
155#ifdef VRC4172PCI_MCR700_SUPPORT
156	if (platid_match(&platid, &platid_mask_MACH_NEC_MCR_700) ||
157	    platid_match(&platid, &platid_mask_MACH_NEC_MCR_700A) ||
158	    platid_match(&platid, &platid_mask_MACH_NEC_MCR_730) ||
159	    platid_match(&platid, &platid_mask_MACH_NEC_MCR_730A)) {
160		/* power USB controller on MC-R700 */
161		sc->sc_iochip = va->va_gpio_chips[VRIP_IOCHIP_VRGIU];
162		hpcio_portwrite(sc->sc_iochip, 45, 1);
163		sc->sc_fake_baseaddr = 0x0afe0000;
164#if 0
165		sc->sc_ih = hpcio_intr_establish(sc->sc_iochip, 1,
166		    HPCIO_INTR_EDGE|HPCIO_INTR_HOLD,
167		    vrc4172pci_mcr700_intr, sc);
168#endif
169	}
170#endif /* VRC4172PCI_MCR700_SUPPORT */
171
172	pc->pc_dev = &sc->sc_dev;
173	pc->pc_attach_hook = vrc4172pci_attach_hook;
174	pc->pc_bus_maxdevs = vrc4172pci_bus_maxdevs;
175	pc->pc_bus_devorder = vrc4172pci_bus_devorder;
176	pc->pc_make_tag = vrc4172pci_make_tag;
177	pc->pc_decompose_tag = vrc4172pci_decompose_tag;
178	pc->pc_conf_read = vrc4172pci_conf_read;
179	pc->pc_conf_write = vrc4172pci_conf_write;
180	pc->pc_intr_map = vrc4172pci_intr_map;
181	pc->pc_intr_string = vrc4172pci_intr_string;
182	pc->pc_intr_evcnt = vrc4172pci_intr_evcnt;
183	pc->pc_intr_establish = vrc4172pci_intr_establish;
184	pc->pc_intr_disestablish = vrc4172pci_intr_disestablish;
185
186#if 0
187	{
188		int i;
189
190		for (i = 0; i < 2; i++)
191			printf("%s: ID_REG(0, 0, %d) = 0x%08x\n",
192			    sc->sc_dev.dv_xname, i,
193			    pci_conf_read(pc, pci_make_tag(pc, 0, 0, i),
194				PCI_ID_REG));
195	}
196#endif
197
198#if NPCI > 0
199	memset(&pba, 0, sizeof(pba));
200	pba.pba_busname = "pci";
201	pba.pba_iot = sc->sc_iot;
202	pba.pba_memt = sc->sc_iot;
203	pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt;
204	pba.pba_dmat64 = NULL;
205	pba.pba_bus = 0;
206	pba.pba_bridgetag = NULL;
207	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
208	    PCI_FLAGS_MRL_OKAY;
209	pba.pba_pc = pc;
210
211	config_found(self, &pba, vrc4172pci_print);
212#endif
213}
214
215#if NPCI > 0
216static int
217vrc4172pci_print(void *aux, const char *pnp)
218{
219	struct pcibus_attach_args *pba = aux;
220
221	if (pnp != NULL)
222		aprint_normal("%s at %s", pba->pba_busname, pnp);
223	else
224		aprint_normal(" bus %d", pba->pba_bus);
225
226	return (UNCONF);
227}
228#endif
229
230void
231vrc4172pci_attach_hook(struct device *parent, struct device *self,
232    struct pcibus_attach_args *pba)
233{
234
235	return;
236}
237
238int
239vrc4172pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
240{
241
242	return (1);	/* Vrc4172 has only one device */
243}
244
245int
246vrc4172pci_bus_devorder(pci_chipset_tag_t pc, int busno, char *devs)
247{
248	int i;
249
250	*devs++ = 0;
251	for (i = 1; i < 32; i++)
252		*devs++ = -1;
253
254	return (1);
255}
256
257pcitag_t
258vrc4172pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
259{
260
261	return ((bus << 16) | (device << 11) | (function << 8));
262}
263
264void
265vrc4172pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
266    int *fp)
267{
268
269	if (bp != NULL)
270		*bp = (tag >> 16) & 0xff;
271	if (dp != NULL)
272		*dp = (tag >> 11) & 0x1f;
273	if (fp != NULL)
274		*fp = (tag >> 8) & 0x07;
275}
276
277pcireg_t
278vrc4172pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
279{
280	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)pc->pc_dev;
281	u_int32_t val;
282
283#ifdef VRC4172PCI_MCR700_SUPPORT
284	if (sc->sc_fake_baseaddr != 0 &&
285	    tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
286	    reg == PCI_MAPREG_START) {
287		val = sc->sc_fake_baseaddr;
288		goto out;
289	}
290#endif /*  VRC4172PCI_MCR700_SUPPORT */
291
292	tag |= VRC4172PCI_CONFADDR_CONFIGEN;
293
294	vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
295	val = vrc4172pci_read(sc, VRC4172PCI_CONFDREG);
296
297#ifdef VRC4172PCI_MCR700_SUPPORT
298 out:
299#endif
300	DPRINTF(("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
301	    sc->sc_dev.dv_xname, (u_int32_t)tag, reg, val));
302
303	return (val);
304}
305
306void
307vrc4172pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
308    pcireg_t data)
309{
310	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)pc->pc_dev;
311
312	DPRINTF(("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
313	    sc->sc_dev.dv_xname, (u_int32_t)tag, reg, (u_int32_t)data));
314
315#ifdef VRC4172PCI_MCR700_SUPPORT
316	if (sc->sc_fake_baseaddr != 0 &&
317	    tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
318	    reg == PCI_MAPREG_START) {
319		sc->sc_fake_baseaddr = (data & 0xfffff000);
320		return;
321	}
322#endif /*  VRC4172PCI_MCR700_SUPPORT */
323
324	tag |= VRC4172PCI_CONFADDR_CONFIGEN;
325
326	vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
327	vrc4172pci_write(sc, VRC4172PCI_CONFDREG, data);
328}
329
330int
331vrc4172pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
332{
333	pci_chipset_tag_t pc = pa->pa_pc;
334	pcitag_t intrtag = pa->pa_intrtag;
335	int bus, dev, func;
336
337	pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
338	DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", pc->pc_dev->dv_xname,
339	    bus, dev, func, pa->pa_intrline, pa->pa_intrpin));
340
341	*ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func);
342
343	return (0);
344}
345
346const char *
347vrc4172pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
348{
349	static char irqstr[sizeof("pciintr") + 16];
350
351	snprintf(irqstr, sizeof(irqstr), "pciintr %d:%d:%d",
352	    CONFIG_HOOK_PCIINTR_BUS((int)ih),
353	    CONFIG_HOOK_PCIINTR_DEVICE((int)ih),
354	    CONFIG_HOOK_PCIINTR_FUNCTION((int)ih));
355
356	return (irqstr);
357}
358
359const struct evcnt *
360vrc4172pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
361{
362
363	return (NULL);
364}
365
366void *
367vrc4172pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
368    int level, int (*func)(void *), void *arg)
369{
370
371	if (ih == -1)
372		return (NULL);
373	DPRINTF(("vrc4172pci_intr_establish: %lx\n", ih));
374
375	return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE,
376	    (int (*)(void *, int, long, void *))func, arg));
377}
378
379void
380vrc4172pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
381{
382
383	DPRINTF(("vrc4172pci_intr_disestablish: %p\n", cookie));
384	config_unhook(cookie);
385}
386
387#ifdef VRC4172PCI_MCR700_SUPPORT
388#if 0
389int
390vrc4172pci_mcr700_intr(void *arg)
391{
392	struct vrc4172pci_softc *sc = arg;
393
394	hpcio_intr_clear(sc->sc_iochip, sc->sc_ih);
395	printf("USB port %s\n", hpcio_portread(sc->sc_iochip, 1) ? "ON" : "OFF");
396	hpcio_portwrite(sc->sc_iochip, 45, hpcio_portread(sc->sc_iochip, 1));
397
398	return (0);
399}
400#endif
401#endif /* VRC4172PCI_MCR700_SUPPORT */
402