vrc4172pci.c revision 1.15 
1/*	$NetBSD: vrc4172pci.c,v 1.15 2011/08/24 20:27:36 dyoung Exp $	*/
2
3/*-
4 * Copyright (c) 2002 TAKEMURA Shin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of the project nor the names of its contributors
16 *    may be used to endorse or promote products derived from this software
17 *    without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: vrc4172pci.c,v 1.15 2011/08/24 20:27:36 dyoung Exp $");
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/device.h>
38
39#include <machine/bus.h>
40#include <machine/bus_space_hpcmips.h>
41#include <machine/bus_dma_hpcmips.h>
42#include <machine/config_hook.h>
43#include <machine/platid.h>
44#include <machine/platid_mask.h>
45
46#include <dev/pci/pcivar.h>
47#include <dev/pci/pcidevs.h>
48#include <dev/pci/pciidereg.h>
49
50#include <hpcmips/vr/icureg.h>
51#include <hpcmips/vr/vripif.h>
52#include <hpcmips/vr/vrc4172pcireg.h>
53
54#include "pci.h"
55#include "opt_vrc4172pci.h"
56
57#ifdef DEBUG
58#define	DPRINTF(args)	printf args
59#else
60#define	DPRINTF(args)	while (0) {}
61#endif
62
63struct vrc4172pci_softc {
64	struct device sc_dev;
65
66	bus_space_tag_t sc_iot;
67	bus_space_handle_t sc_ioh;
68
69	struct hpcmips_pci_chipset sc_pc;
70#ifdef VRC4172PCI_MCR700_SUPPORT
71	pcireg_t sc_fake_baseaddr;
72	hpcio_chip_t sc_iochip;
73#if 0
74	hpcio_intr_handle_t sc_ih;
75#endif
76#endif /* VRC4172PCI_MCR700_SUPPORT */
77};
78
79static int	vrc4172pci_match(struct device *, struct cfdata *, void *);
80static void	vrc4172pci_attach(struct device *, struct device *, void *);
81static void	vrc4172pci_attach_hook(struct device *, struct device *,
82		    struct pcibus_attach_args *);
83static int	vrc4172pci_bus_maxdevs(pci_chipset_tag_t, int);
84static int	vrc4172pci_bus_devorder(pci_chipset_tag_t, int, uint8_t *, int);
85static pcitag_t	vrc4172pci_make_tag(pci_chipset_tag_t, int, int, int);
86static void	vrc4172pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *,
87		    int *, int *);
88static pcireg_t	vrc4172pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
89static void	vrc4172pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
90		    pcireg_t);
91static int	vrc4172pci_intr_map(struct pci_attach_args *,
92		    pci_intr_handle_t *);
93static const char *vrc4172pci_intr_string(pci_chipset_tag_t,pci_intr_handle_t);
94static const struct evcnt *vrc4172pci_intr_evcnt(pci_chipset_tag_t,
95		    pci_intr_handle_t);
96static void	*vrc4172pci_intr_establish(pci_chipset_tag_t,
97		    pci_intr_handle_t, int, int (*)(void *), void *);
98static void	vrc4172pci_intr_disestablish(pci_chipset_tag_t, void *);
99#ifdef VRC4172PCI_MCR700_SUPPORT
100#if 0
101static int	vrc4172pci_mcr700_intr(void *arg);
102#endif
103#endif
104
105CFATTACH_DECL(vrc4172pci, sizeof(struct vrc4172pci_softc),
106    vrc4172pci_match, vrc4172pci_attach, NULL, NULL);
107
108static inline void
109vrc4172pci_write(struct vrc4172pci_softc *sc, int offset, u_int32_t val)
110{
111
112	bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);
113}
114
115static inline u_int32_t
116vrc4172pci_read(struct vrc4172pci_softc *sc, int offset)
117{
118	u_int32_t res;
119
120	if (bus_space_peek(sc->sc_iot, sc->sc_ioh, offset, 4, &res) < 0) {
121		res = 0xffffffff;
122	}
123
124	return (res);
125}
126
127static int
128vrc4172pci_match(struct device *parent, struct cfdata *match, void *aux)
129{
130
131	return (1);
132}
133
134static void
135vrc4172pci_attach(struct device *parent, struct device *self, void *aux)
136{
137	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)self;
138	pci_chipset_tag_t pc = &sc->sc_pc;
139	struct vrip_attach_args *va = aux;
140#if NPCI > 0
141	struct pcibus_attach_args pba;
142#endif
143
144	sc->sc_iot = va->va_iot;
145	if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0,
146	    &sc->sc_ioh)) {
147		printf(": couldn't map io space\n");
148		return;
149	}
150	printf("\n");
151
152#ifdef VRC4172PCI_MCR700_SUPPORT
153	if (platid_match(&platid, &platid_mask_MACH_NEC_MCR_700) ||
154	    platid_match(&platid, &platid_mask_MACH_NEC_MCR_700A) ||
155	    platid_match(&platid, &platid_mask_MACH_NEC_MCR_730) ||
156	    platid_match(&platid, &platid_mask_MACH_NEC_MCR_730A)) {
157		/* power USB controller on MC-R700 */
158		sc->sc_iochip = va->va_gpio_chips[VRIP_IOCHIP_VRGIU];
159		hpcio_portwrite(sc->sc_iochip, 45, 1);
160		sc->sc_fake_baseaddr = 0x0afe0000;
161#if 0
162		sc->sc_ih = hpcio_intr_establish(sc->sc_iochip, 1,
163		    HPCIO_INTR_EDGE|HPCIO_INTR_HOLD,
164		    vrc4172pci_mcr700_intr, sc);
165#endif
166	}
167#endif /* VRC4172PCI_MCR700_SUPPORT */
168
169	pc->pc_dev = &sc->sc_dev;
170	pc->pc_attach_hook = vrc4172pci_attach_hook;
171	pc->pc_bus_maxdevs = vrc4172pci_bus_maxdevs;
172	pc->pc_bus_devorder = vrc4172pci_bus_devorder;
173	pc->pc_make_tag = vrc4172pci_make_tag;
174	pc->pc_decompose_tag = vrc4172pci_decompose_tag;
175	pc->pc_conf_read = vrc4172pci_conf_read;
176	pc->pc_conf_write = vrc4172pci_conf_write;
177	pc->pc_intr_map = vrc4172pci_intr_map;
178	pc->pc_intr_string = vrc4172pci_intr_string;
179	pc->pc_intr_evcnt = vrc4172pci_intr_evcnt;
180	pc->pc_intr_establish = vrc4172pci_intr_establish;
181	pc->pc_intr_disestablish = vrc4172pci_intr_disestablish;
182
183#if 0
184	{
185		int i;
186
187		for (i = 0; i < 2; i++)
188			printf("%s: ID_REG(0, 0, %d) = 0x%08x\n",
189			    sc->sc_dev.dv_xname, i,
190			    pci_conf_read(pc, pci_make_tag(pc, 0, 0, i),
191				PCI_ID_REG));
192	}
193#endif
194
195#if NPCI > 0
196	memset(&pba, 0, sizeof(pba));
197	pba.pba_iot = sc->sc_iot;
198	pba.pba_memt = sc->sc_iot;
199	pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt;
200	pba.pba_dmat64 = NULL;
201	pba.pba_bus = 0;
202	pba.pba_bridgetag = NULL;
203	pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY |
204	    PCI_FLAGS_MRL_OKAY;
205	pba.pba_pc = pc;
206
207	config_found_ia(self, "pcibus", &pba, pcibusprint);
208#endif
209}
210
211void
212vrc4172pci_attach_hook(struct device *parent, struct device *self,
213    struct pcibus_attach_args *pba)
214{
215
216	return;
217}
218
219int
220vrc4172pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
221{
222
223	return (1);	/* Vrc4172 has only one device */
224}
225
226int
227vrc4172pci_bus_devorder(pci_chipset_tag_t pc, int busno, uint8_t *devs,
228    int maxdevs)
229{
230	if (maxdevs <= 0)
231		return 0;
232	devs[0] = 0;
233	return 1;
234}
235
236pcitag_t
237vrc4172pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
238{
239
240	return ((bus << 16) | (device << 11) | (function << 8));
241}
242
243void
244vrc4172pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
245    int *fp)
246{
247
248	if (bp != NULL)
249		*bp = (tag >> 16) & 0xff;
250	if (dp != NULL)
251		*dp = (tag >> 11) & 0x1f;
252	if (fp != NULL)
253		*fp = (tag >> 8) & 0x07;
254}
255
256pcireg_t
257vrc4172pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
258{
259	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)pc->pc_dev;
260	u_int32_t val;
261
262#ifdef VRC4172PCI_MCR700_SUPPORT
263	if (sc->sc_fake_baseaddr != 0 &&
264	    tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
265	    reg == PCI_MAPREG_START) {
266		val = sc->sc_fake_baseaddr;
267		goto out;
268	}
269#endif /*  VRC4172PCI_MCR700_SUPPORT */
270
271	tag |= VRC4172PCI_CONFADDR_CONFIGEN;
272
273	vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
274	val = vrc4172pci_read(sc, VRC4172PCI_CONFDREG);
275
276#ifdef VRC4172PCI_MCR700_SUPPORT
277 out:
278#endif
279	DPRINTF(("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
280	    sc->sc_dev.dv_xname, (u_int32_t)tag, reg, val));
281
282	return (val);
283}
284
285void
286vrc4172pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
287    pcireg_t data)
288{
289	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)pc->pc_dev;
290
291	DPRINTF(("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
292	    sc->sc_dev.dv_xname, (u_int32_t)tag, reg, (u_int32_t)data));
293
294#ifdef VRC4172PCI_MCR700_SUPPORT
295	if (sc->sc_fake_baseaddr != 0 &&
296	    tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
297	    reg == PCI_MAPREG_START) {
298		sc->sc_fake_baseaddr = (data & 0xfffff000);
299		return;
300	}
301#endif /*  VRC4172PCI_MCR700_SUPPORT */
302
303	tag |= VRC4172PCI_CONFADDR_CONFIGEN;
304
305	vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
306	vrc4172pci_write(sc, VRC4172PCI_CONFDREG, data);
307}
308
309int
310vrc4172pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
311{
312	pci_chipset_tag_t pc = pa->pa_pc;
313	pcitag_t intrtag = pa->pa_intrtag;
314	int bus, dev, func;
315
316	pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
317	DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", pc->pc_dev->dv_xname,
318	    bus, dev, func, pa->pa_intrline, pa->pa_intrpin));
319
320	*ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func);
321
322	return (0);
323}
324
325const char *
326vrc4172pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
327{
328	static char irqstr[sizeof("pciintr") + 16];
329
330	snprintf(irqstr, sizeof(irqstr), "pciintr %d:%d:%d",
331	    CONFIG_HOOK_PCIINTR_BUS((int)ih),
332	    CONFIG_HOOK_PCIINTR_DEVICE((int)ih),
333	    CONFIG_HOOK_PCIINTR_FUNCTION((int)ih));
334
335	return (irqstr);
336}
337
338const struct evcnt *
339vrc4172pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
340{
341
342	return (NULL);
343}
344
345void *
346vrc4172pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
347    int level, int (*func)(void *), void *arg)
348{
349
350	if (ih == -1)
351		return (NULL);
352	DPRINTF(("vrc4172pci_intr_establish: %lx\n", ih));
353
354	return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE,
355	    (int (*)(void *, int, long, void *))func, arg));
356}
357
358void
359vrc4172pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
360{
361
362	DPRINTF(("vrc4172pci_intr_disestablish: %p\n", cookie));
363	config_unhook(cookie);
364}
365
366#ifdef VRC4172PCI_MCR700_SUPPORT
367#if 0
368int
369vrc4172pci_mcr700_intr(void *arg)
370{
371	struct vrc4172pci_softc *sc = arg;
372
373	hpcio_intr_clear(sc->sc_iochip, sc->sc_ih);
374	printf("USB port %s\n", hpcio_portread(sc->sc_iochip, 1) ? "ON" : "OFF");
375	hpcio_portwrite(sc->sc_iochip, 45, hpcio_portread(sc->sc_iochip, 1));
376
377	return (0);
378}
379#endif
380#endif /* VRC4172PCI_MCR700_SUPPORT */
381