vrc4172pci.c revision 1.3 
1/*	$NetBSD: vrc4172pci.c,v 1.3 2002/05/03 11:37:49 takemura Exp $	*/
2
3/*-
4 * Copyright (c) 2002 TAKEMURA Shin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of the project nor the names of its contributors
16 *    may be used to endorse or promote products derived from this software
17 *    without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/device.h>
35
36#include <machine/bus.h>
37#include <machine/bus_space_hpcmips.h>
38#include <machine/bus_dma_hpcmips.h>
39#include <machine/config_hook.h>
40#include <machine/platid.h>
41#include <machine/platid_mask.h>
42
43#include <dev/pci/pcivar.h>
44#include <dev/pci/pcidevs.h>
45#include <dev/pci/pciidereg.h>
46
47#include <hpcmips/vr/icureg.h>
48#include <hpcmips/vr/vripif.h>
49#include <hpcmips/vr/vrc4172pcireg.h>
50
51#include "pci.h"
52#include "opt_vrc4172pci.h"
53
54#ifdef DEBUG
55#define	DPRINTF(args)	printf args
56#else
57#define	DPRINTF(args)	while (0) {}
58#endif
59
60struct vrc4172pci_softc {
61	struct device sc_dev;
62
63	bus_space_tag_t sc_iot;
64	bus_space_handle_t sc_ioh;
65
66	struct hpcmips_pci_chipset sc_pc;
67#ifdef VRC4172PCI_MCR700_SUPPORT
68	pcireg_t sc_fake_baseaddr;
69	hpcio_chip_t sc_iochip;
70#if 0
71	hpcio_intr_handle_t sc_ih;
72#endif
73#endif /* VRC4172PCI_MCR700_SUPPORT */
74};
75
76static int	vrc4172pci_match(struct device *, struct cfdata *, void *);
77static void	vrc4172pci_attach(struct device *, struct device *, void *);
78#if NPCI > 0
79static int	vrc4172pci_print(void *, const char *);
80#endif
81static void	vrc4172pci_attach_hook(struct device *, struct device *,
82		    struct pcibus_attach_args *);
83static int	vrc4172pci_bus_maxdevs(pci_chipset_tag_t, int);
84static int	vrc4172pci_bus_devorder(pci_chipset_tag_t, int, char *);
85static pcitag_t	vrc4172pci_make_tag(pci_chipset_tag_t, int, int, int);
86static void	vrc4172pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *,
87		    int *, int *);
88static pcireg_t	vrc4172pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
89static void	vrc4172pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
90		    pcireg_t);
91static int	vrc4172pci_intr_map(struct pci_attach_args *,
92		    pci_intr_handle_t *);
93static const char *vrc4172pci_intr_string(pci_chipset_tag_t,pci_intr_handle_t);
94static const struct evcnt *vrc4172pci_intr_evcnt(pci_chipset_tag_t,
95		    pci_intr_handle_t);
96static void	*vrc4172pci_intr_establish(pci_chipset_tag_t,
97		    pci_intr_handle_t, int, int (*)(void *), void *);
98static void	vrc4172pci_intr_disestablish(pci_chipset_tag_t, void *);
99#ifdef VRC4172PCI_MCR700_SUPPORT
100#if 0
101static int	vrc4172pci_mcr700_intr(void *arg);
102#endif
103#endif
104
105struct cfattach vrc4172pci_ca = {
106	sizeof(struct vrc4172pci_softc), vrc4172pci_match, vrc4172pci_attach
107};
108
109static inline void
110vrc4172pci_write(struct vrc4172pci_softc *sc, int offset, u_int32_t val)
111{
112
113	bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);
114}
115
116static inline u_int32_t
117vrc4172pci_read(struct vrc4172pci_softc *sc, int offset)
118{
119	u_int32_t res;
120
121	if (bus_space_peek(sc->sc_iot, sc->sc_ioh, offset, 4, &res) < 0) {
122		res = 0xffffffff;
123	}
124
125	return (res);
126}
127
128static int
129vrc4172pci_match(struct device *parent, struct cfdata *match, void *aux)
130{
131
132	return (1);
133}
134
135static void
136vrc4172pci_attach(struct device *parent, struct device *self, void *aux)
137{
138	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)self;
139	pci_chipset_tag_t pc = &sc->sc_pc;
140	struct vrip_attach_args *va = aux;
141#if NPCI > 0
142	struct pcibus_attach_args pba;
143#endif
144
145	sc->sc_iot = va->va_iot;
146	if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0,
147	    &sc->sc_ioh)) {
148		printf(": couldn't map io space\n");
149		return;
150	}
151	printf("\n");
152
153#ifdef VRC4172PCI_MCR700_SUPPORT
154	if (platid_match(&platid, &platid_mask_MACH_NEC_MCR_700)) {
155		/* power USB controller on MC-R700 */
156		sc->sc_iochip = va->va_gpio_chips[VRIP_IOCHIP_VRGIU];
157		hpcio_portwrite(sc->sc_iochip, 45, 1);
158		sc->sc_fake_baseaddr = 0x0afe0000;
159#if 0
160		sc->sc_ih = hpcio_intr_establish(sc->sc_iochip, 1,
161		    HPCIO_INTR_EDGE|HPCIO_INTR_HOLD,
162		    vrc4172pci_mcr700_intr, sc);
163#endif
164	}
165#endif /* VRC4172PCI_MCR700_SUPPORT */
166
167	pc->pc_dev = &sc->sc_dev;
168	pc->pc_attach_hook = vrc4172pci_attach_hook;
169	pc->pc_bus_maxdevs = vrc4172pci_bus_maxdevs;
170	pc->pc_bus_devorder = vrc4172pci_bus_devorder;
171	pc->pc_make_tag = vrc4172pci_make_tag;
172	pc->pc_decompose_tag = vrc4172pci_decompose_tag;
173	pc->pc_conf_read = vrc4172pci_conf_read;
174	pc->pc_conf_write = vrc4172pci_conf_write;
175	pc->pc_intr_map = vrc4172pci_intr_map;
176	pc->pc_intr_string = vrc4172pci_intr_string;
177	pc->pc_intr_evcnt = vrc4172pci_intr_evcnt;
178	pc->pc_intr_establish = vrc4172pci_intr_establish;
179	pc->pc_intr_disestablish = vrc4172pci_intr_disestablish;
180
181#if 0
182	{
183		int i;
184
185		for (i = 0; i < 2; i++)
186			printf("%s: ID_REG(0, 0, %d) = 0x%08x\n",
187			    sc->sc_dev.dv_xname, i,
188			    pci_conf_read(pc, pci_make_tag(pc, 0, 0, i),
189				PCI_ID_REG));
190	}
191#endif
192
193#if NPCI > 0
194	memset(&pba, 0, sizeof(pba));
195	pba.pba_busname = "pci";
196	pba.pba_iot = sc->sc_iot;
197	pba.pba_memt = sc->sc_iot;
198	pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt;
199	pba.pba_bus = 0;
200	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
201	    PCI_FLAGS_MRL_OKAY;
202	pba.pba_pc = pc;
203
204	config_found(self, &pba, vrc4172pci_print);
205#endif
206}
207
208#if NPCI > 0
209static int
210vrc4172pci_print(void *aux, const char *pnp)
211{
212	struct pcibus_attach_args *pba = aux;
213
214	if (pnp != NULL)
215		printf("%s at %s", pba->pba_busname, pnp);
216	else
217		printf(" bus %d", pba->pba_bus);
218
219	return (UNCONF);
220}
221#endif
222
223void
224vrc4172pci_attach_hook(struct device *parent, struct device *self,
225    struct pcibus_attach_args *pba)
226{
227
228	return;
229}
230
231int
232vrc4172pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
233{
234
235	return (1);	/* Vrc4172 has only one device */
236}
237
238int
239vrc4172pci_bus_devorder(pci_chipset_tag_t pc, int busno, char *devs)
240{
241	int i;
242
243	*devs++ = 0;
244	for (i = 1; i < 32; i++)
245		*devs++ = -1;
246
247	return (1);
248}
249
250pcitag_t
251vrc4172pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
252{
253
254	return ((bus << 16) | (device << 11) | (function << 8));
255}
256
257void
258vrc4172pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
259    int *fp)
260{
261
262	if (bp != NULL)
263		*bp = (tag >> 16) & 0xff;
264	if (dp != NULL)
265		*dp = (tag >> 11) & 0x1f;
266	if (fp != NULL)
267		*fp = (tag >> 8) & 0x07;
268}
269
270pcireg_t
271vrc4172pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
272{
273	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)pc->pc_dev;
274	u_int32_t val;
275
276#ifdef VRC4172PCI_MCR700_SUPPORT
277	if (sc->sc_fake_baseaddr != 0 &&
278	    tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
279	    reg == PCI_MAPREG_START) {
280		val = sc->sc_fake_baseaddr;
281		goto out;
282	}
283#endif /*  VRC4172PCI_MCR700_SUPPORT */
284
285	tag |= VRC4172PCI_CONFADDR_CONFIGEN;
286
287	vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
288	val = vrc4172pci_read(sc, VRC4172PCI_CONFDREG);
289
290#ifdef VRC4172PCI_MCR700_SUPPORT
291 out:
292#endif
293	DPRINTF(("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
294	    sc->sc_dev.dv_xname, (u_int32_t)tag, reg, val));
295
296	return (val);
297}
298
299void
300vrc4172pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
301    pcireg_t data)
302{
303	struct vrc4172pci_softc *sc = (struct vrc4172pci_softc *)pc->pc_dev;
304
305	DPRINTF(("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
306	    sc->sc_dev.dv_xname, (u_int32_t)tag, reg, (u_int32_t)data));
307
308#ifdef VRC4172PCI_MCR700_SUPPORT
309	if (sc->sc_fake_baseaddr != 0 &&
310	    tag == vrc4172pci_make_tag(pc, 0, 0, 1) &&
311	    reg == PCI_MAPREG_START) {
312		sc->sc_fake_baseaddr = (data & 0xfffff000);
313		return;
314	}
315#endif /*  VRC4172PCI_MCR700_SUPPORT */
316
317	tag |= VRC4172PCI_CONFADDR_CONFIGEN;
318
319	vrc4172pci_write(sc, VRC4172PCI_CONFAREG, tag | reg);
320	vrc4172pci_write(sc, VRC4172PCI_CONFDREG, data);
321}
322
323int
324vrc4172pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
325{
326	pci_chipset_tag_t pc = pa->pa_pc;
327	pcitag_t intrtag = pa->pa_intrtag;
328	int bus, dev, func;
329
330	pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
331	DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", pc->pc_dev->dv_xname,
332	    bus, dev, func, pa->pa_intrline, pa->pa_intrpin));
333
334	*ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func);
335
336	return (0);
337}
338
339const char *
340vrc4172pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
341{
342	static char irqstr[sizeof("pciintr") + 16];
343
344	snprintf(irqstr, sizeof(irqstr), "pciintr %d:%d:%d",
345	    CONFIG_HOOK_PCIINTR_BUS((int)ih),
346	    CONFIG_HOOK_PCIINTR_DEVICE((int)ih),
347	    CONFIG_HOOK_PCIINTR_FUNCTION((int)ih));
348
349	return (irqstr);
350}
351
352const struct evcnt *
353vrc4172pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
354{
355
356	return (NULL);
357}
358
359void *
360vrc4172pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
361    int level, int (*func)(void *), void *arg)
362{
363
364	if (ih == -1)
365		return (NULL);
366	DPRINTF(("vrc4172pci_intr_establish: %lx\n", ih));
367
368	return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE,
369	    (int (*)(void *, int, long, void *))func, arg));
370}
371
372void
373vrc4172pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
374{
375
376	DPRINTF(("vrc4172pci_intr_disestablish: %p\n", cookie));
377	config_unhook(cookie);
378}
379
380#ifdef VRC4172PCI_MCR700_SUPPORT
381#if 0
382int
383vrc4172pci_mcr700_intr(void *arg)
384{
385	struct vrc4172pci_softc *sc = arg;
386
387	hpcio_intr_clear(sc->sc_iochip, sc->sc_ih);
388	printf("USB port %s\n", hpcio_portread(sc->sc_iochip, 1) ? "ON" : "OFF");
389	hpcio_portwrite(sc->sc_iochip, 45, hpcio_portread(sc->sc_iochip, 1));
390
391	return (0);
392}
393#endif
394#endif /* VRC4172PCI_MCR700_SUPPORT */
395