11.6Sandvar/*	$NetBSD: vrc4172reg.h,v 1.6 2022/04/08 10:17:53 andvar Exp $	*/
21.3Sitojun
31.1Ssato/*
41.1Ssato * Copyright (c) 2000 SATO Kazumi.  All rights reserved.
51.1Ssato *
61.1Ssato * Redistribution and use in source and binary forms, with or without
71.1Ssato * modification, are permitted provided that the following conditions
81.1Ssato * are met:
91.1Ssato * 1. Redistributions of source code must retain the above copyright
101.1Ssato *    notice, this list of conditions, and the following disclaimer.
111.1Ssato * 2. Redistributions in binary form must reproduce the above copyright
121.1Ssato *    notice, this list of conditions and the following disclaimer in the
131.1Ssato *    documentation and/or other materials provided with the distribution.
141.1Ssato *
151.1Ssato * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
161.1Ssato * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
171.1Ssato * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
181.1Ssato * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
191.1Ssato * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
201.1Ssato * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
211.1Ssato * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
221.1Ssato * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
231.1Ssato * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
241.1Ssato * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
251.1Ssato * SUCH DAMAGE.
261.1Ssato */
271.1Ssato
281.1Ssato/*
291.1Ssato * Vrc4172 (Vr4121 companion chip) device units definitions
301.1Ssato */
311.1Ssato
321.1Ssato#define VRC2_GPIOL_ADDR	0x15001080	/* GPIO (0..15) */
331.6Sandvar#define VRC2_PCS_ADDR	0x15001090	/* PCS Programmable chip selects */
341.1Ssato#define VRC2_GPIOH_ADDR	0x150010c0	/* GPIO (16..23) */
351.1Ssato#define VRC2_PMU_ADDR	0x15003800	/* PMU */
361.2Ssato#define VRC2_ICU_ADDR	0x15003808	/* ICU */
371.1Ssato#define VRC2_COM_ADDR	0x15003810	/* NS16550A compat */
381.1Ssato#define VRC2_PIO_ADDR	0x15003820	/* IEEE1284 parallel */
391.4Swiz#define VRC2_PS2_ADDR	0x15003870	/* PS/2 controller */
401.1Ssato#define VRC2_PWM_ADDR	0x15003880	/* PWM (backlight pulus) controller */
411.1Ssato
421.1Ssato/* end */
43