vrc4172reg.h revision 1.1
1/* $NetBSD: vrc4172reg.h,v 1.1 2000/11/11 04:42:09 sato Exp $ */ 2/* 3 * Copyright (c) 2000 SATO Kazumi. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * Vrc4172 (Vr4121 companion chip) device units definitions 29 */ 30 31#define VRC2_GPIOL_ADDR 0x15001080 /* GPIO (0..15) */ 32#define VRC2_PCS_ADDR 0x15001090 /* PCS Programable chip selects */ 33#define VRC2_GPIOH_ADDR 0x150010c0 /* GPIO (16..23) */ 34#define VRC2_PMU_ADDR 0x15003800 /* PMU */ 35#define VRC2_ICU_ADDR 0x15003708 /* ICU */ 36#define VRC2_COM_ADDR 0x15003810 /* NS16550A compat */ 37#define VRC2_PIO_ADDR 0x15003820 /* IEEE1284 parallel */ 38#define VRC2_PS2_ADDR 0x15003870 /* PS/2 controler */ 39#define VRC2_PWM_ADDR 0x15003880 /* PWM (backlight pulus) controller */ 40 41/* end */ 42