vrc4173bcu.c revision 1.12 1 1.12 thorpej /* $NetBSD: vrc4173bcu.c,v 1.12 2003/01/01 01:40:27 thorpej Exp $ */
2 1.1 enami
3 1.1 enami /*-
4 1.4 takemura * Copyright (c) 2001,2002 Enami Tsugutomo.
5 1.1 enami * All rights reserved.
6 1.1 enami *
7 1.1 enami * Redistribution and use in source and binary forms, with or without
8 1.1 enami * modification, are permitted provided that the following conditions
9 1.1 enami * are met:
10 1.1 enami * 1. Redistributions of source code must retain the above copyright
11 1.1 enami * notice, this list of conditions and the following disclaimer.
12 1.1 enami * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 enami * notice, this list of conditions and the following disclaimer in the
14 1.1 enami * documentation and/or other materials provided with the distribution.
15 1.1 enami *
16 1.1 enami * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 1.1 enami * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.1 enami * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.1 enami * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 1.1 enami * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.1 enami * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.1 enami * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.1 enami * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.1 enami * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 enami * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 enami * SUCH DAMAGE.
27 1.1 enami */
28 1.1 enami
29 1.1 enami #include <sys/param.h>
30 1.1 enami #include <sys/systm.h>
31 1.1 enami #include <sys/device.h>
32 1.1 enami
33 1.1 enami #include <machine/bus.h>
34 1.1 enami
35 1.1 enami #include <dev/pci/pcivar.h>
36 1.1 enami #include <dev/pci/pcidevs.h>
37 1.1 enami
38 1.2 takemura #include <machine/platid.h>
39 1.2 takemura #include <machine/platid_mask.h>
40 1.6 takemura #include <machine/config_hook.h>
41 1.2 takemura
42 1.7 takemura #include <hpcmips/vr/vripunit.h>
43 1.7 takemura #include <hpcmips/vr/vripif.h>
44 1.1 enami #include <hpcmips/vr/vrc4173bcuvar.h>
45 1.1 enami #include <hpcmips/vr/vrc4173icureg.h>
46 1.2 takemura #include <hpcmips/vr/vrc4173cmureg.h>
47 1.1 enami
48 1.7 takemura #ifdef VRC4173BCU_DEBUG
49 1.7 takemura #define DPRINTF_ENABLE
50 1.7 takemura #define DPRINTF_DEBUG vrc4173bcu_debug
51 1.1 enami #endif
52 1.7 takemura #define USE_HPC_DPRINTF
53 1.7 takemura #include <machine/debug.h>
54 1.1 enami
55 1.7 takemura #define VRC4173BCU_BADR 0x10
56 1.2 takemura #define USE_WINCE_CLKMASK (~0)
57 1.2 takemura
58 1.1 enami static int vrc4173bcu_match(struct device *, struct cfdata *, void *);
59 1.1 enami static void vrc4173bcu_attach(struct device *, struct device *, void *);
60 1.7 takemura static int vrc4173bcu_intr(void *);
61 1.1 enami static int vrc4173bcu_print(void *, const char *);
62 1.7 takemura static int vrc4173bcu_search(struct device *, struct cfdata *cf, void *);
63 1.7 takemura static int vrc4173bcu_pci_intr(void *);
64 1.7 takemura #ifdef VRC4173BCU_DEBUG
65 1.7 takemura static void vrc4173bcu_dump_level2mask(vrip_chipset_tag_t,
66 1.7 takemura vrip_intr_handle_t);
67 1.7 takemura #endif
68 1.7 takemura
69 1.7 takemura int __vrc4173bcu_power(vrip_chipset_tag_t, int, int);
70 1.7 takemura vrip_intr_handle_t __vrc4173bcu_intr_establish(vrip_chipset_tag_t, int, int,
71 1.7 takemura int, int(*)(void*), void*);
72 1.7 takemura void __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t, vrip_intr_handle_t);
73 1.7 takemura void __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t, vrip_intr_handle_t, int);
74 1.7 takemura void __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t, vrip_intr_handle_t,
75 1.7 takemura u_int32_t, int);
76 1.7 takemura void __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t, vrip_intr_handle_t,
77 1.7 takemura u_int32_t*);
78 1.7 takemura void __vrc4173bcu_register_cmu(vrip_chipset_tag_t, vrcmu_chipset_tag_t);
79 1.7 takemura void __vrc4173bcu_register_gpio(vrip_chipset_tag_t, hpcio_chip_t);
80 1.7 takemura void __vrc4173bcu_register_dmaau(vrip_chipset_tag_t, vrdmaau_chipset_tag_t);
81 1.7 takemura void __vrc4173bcu_register_dcu(vrip_chipset_tag_t, vrdcu_chipset_tag_t);
82 1.7 takemura int __vrc4173bcu_clock(vrcmu_chipset_tag_t, u_int16_t, int);
83 1.1 enami
84 1.4 takemura /*
85 1.4 takemura * machine dependent info
86 1.4 takemura */
87 1.2 takemura static struct vrc4173bcu_platdep {
88 1.4 takemura platid_mask_t *platidmask;
89 1.2 takemura u_int32_t clkmask;
90 1.6 takemura int intrmask;
91 1.2 takemura } platdep_table[] = {
92 1.2 takemura {
93 1.4 takemura &platid_mask_MACH_VICTOR_INTERLINK_MPC303,
94 1.6 takemura USE_WINCE_CLKMASK, /* clock mask */
95 1.6 takemura (1 << VRC4173ICU_USBINTR)| /* intrrupts */
96 1.6 takemura (1 << VRC4173ICU_PCMCIA1INTR)|
97 1.6 takemura (1 << VRC4173ICU_PCMCIA2INTR),
98 1.4 takemura },
99 1.4 takemura {
100 1.4 takemura &platid_mask_MACH_VICTOR_INTERLINK_MPC304,
101 1.6 takemura USE_WINCE_CLKMASK, /* clock mask */
102 1.6 takemura (1 << VRC4173ICU_USBINTR)| /* intrrupts */
103 1.6 takemura (1 << VRC4173ICU_PCMCIA1INTR)|
104 1.6 takemura (1 << VRC4173ICU_PCMCIA2INTR),
105 1.4 takemura },
106 1.4 takemura {
107 1.4 takemura &platid_mask_MACH_NEC_MCR_SIGMARION2,
108 1.6 takemura USE_WINCE_CLKMASK, /* clock mask */
109 1.6 takemura (1 << VRC4173ICU_USBINTR), /* intrrupts */
110 1.4 takemura },
111 1.4 takemura {
112 1.2 takemura &platid_wild,
113 1.2 takemura USE_WINCE_CLKMASK, /* XXX */
114 1.4 takemura -1,
115 1.2 takemura },
116 1.2 takemura };
117 1.2 takemura
118 1.7 takemura struct vrc4173bcu_unit {
119 1.7 takemura char *vu_name;
120 1.7 takemura int vu_intr[2];
121 1.7 takemura int vu_clkmask;
122 1.7 takemura bus_addr_t vu_lreg;
123 1.7 takemura bus_addr_t vu_mlreg;
124 1.7 takemura bus_addr_t vu_hreg;
125 1.7 takemura bus_addr_t vu_mhreg;
126 1.7 takemura };
127 1.7 takemura
128 1.4 takemura struct vrc4173bcu_softc {
129 1.4 takemura struct device sc_dev;
130 1.7 takemura struct vrip_chipset_tag sc_chipset;
131 1.7 takemura struct vrcmu_chipset_tag sc_cmuchip;
132 1.4 takemura
133 1.4 takemura pci_chipset_tag_t sc_pc;
134 1.4 takemura bus_space_tag_t sc_iot;
135 1.4 takemura bus_space_handle_t sc_ioh;
136 1.4 takemura bus_size_t sc_size;
137 1.4 takemura
138 1.4 takemura bus_space_handle_t sc_icuh; /* I/O handle for ICU. */
139 1.4 takemura bus_space_handle_t sc_cmuh; /* I/O handle for CMU. */
140 1.4 takemura void *sc_ih;
141 1.6 takemura #define VRC4173BCU_NINTRS 16
142 1.5 takemura int sc_intrmask;
143 1.7 takemura struct vrc4173bcu_intrhand {
144 1.7 takemura int (*ih_fun)(void *);
145 1.7 takemura void *ih_arg;
146 1.7 takemura const struct vrc4173bcu_unit *ih_unit;
147 1.7 takemura } sc_intrhands[32];
148 1.7 takemura
149 1.7 takemura struct vrc4173bcu_unit *sc_units;
150 1.7 takemura int sc_nunits;
151 1.7 takemura int sc_pri;
152 1.4 takemura
153 1.4 takemura struct vrc4173bcu_platdep *sc_platdep;
154 1.4 takemura };
155 1.4 takemura
156 1.7 takemura #define VALID_UNIT(sc, unit) (0 <= (unit) && (unit) < (sc)->sc_nunits)
157 1.7 takemura
158 1.7 takemura static struct vrc4173bcu_unit vrc4173bcu_units[] = {
159 1.7 takemura [VRIP_UNIT_KIU] = {
160 1.7 takemura "kiu",
161 1.7 takemura { VRC4173ICU_KIUINTR, },
162 1.7 takemura VRC4173CMU_CLKMSK_KIU,
163 1.7 takemura VRC4173ICU_KIUINT, VRC4173ICU_MKIUINT,
164 1.7 takemura },
165 1.7 takemura [VRIP_UNIT_PIU] = {
166 1.7 takemura "piu",
167 1.7 takemura { VRC4173ICU_PIUINTR, VRC4173ICU_DOZEPIUINTR},
168 1.7 takemura VRC4173CMU_CLKMSK_PIU,
169 1.7 takemura VRC4173ICU_PIUINT, VRC4173ICU_MPIUINT,
170 1.7 takemura },
171 1.7 takemura [VRIP_UNIT_AIU] = {
172 1.7 takemura "aiu",
173 1.7 takemura { VRC4173ICU_AIUINTR, },
174 1.7 takemura VRC4173CMU_CLKMSK_AIU,
175 1.7 takemura VRC4173ICU_AIUINT, VRC4173ICU_MAIUINT,
176 1.7 takemura },
177 1.7 takemura [VRIP_UNIT_GIU] = {
178 1.7 takemura "giu",
179 1.7 takemura { VRC4173ICU_GIUINTR, },
180 1.7 takemura 0,
181 1.7 takemura VRC4173ICU_GIULINT, VRC4173ICU_MGIULINT,
182 1.7 takemura VRC4173ICU_GIUHINT, VRC4173ICU_MGIUHINT,
183 1.7 takemura },
184 1.7 takemura [VRIP_UNIT_PS2U0] = {
185 1.7 takemura "PS/2-Ch1",
186 1.7 takemura { VRC4173ICU_PS2CH1INTR, },
187 1.7 takemura VRC4173CMU_CLKMSK_PS2CH1,
188 1.7 takemura },
189 1.7 takemura [VRIP_UNIT_PS2U1] = {
190 1.7 takemura "PS/2-Ch2",
191 1.7 takemura { VRC4173ICU_PS2CH2INTR, },
192 1.7 takemura VRC4173CMU_CLKMSK_PS2CH2,
193 1.7 takemura },
194 1.7 takemura [VRIP_UNIT_USBU] = {
195 1.7 takemura "usbu",
196 1.7 takemura { VRC4173ICU_USBINTR, },
197 1.7 takemura VRC4173CMU_CLKMSK_USB,
198 1.7 takemura },
199 1.7 takemura [VRIP_UNIT_CARDU0] = {
200 1.7 takemura "cardu0",
201 1.7 takemura { VRC4173ICU_PCMCIA1INTR, },
202 1.7 takemura VRC4173CMU_CLKMSK_CARD1,
203 1.7 takemura },
204 1.7 takemura [VRIP_UNIT_CARDU1] = {
205 1.7 takemura "cardu1",
206 1.7 takemura { VRC4173ICU_PCMCIA2INTR, },
207 1.7 takemura VRC4173CMU_CLKMSK_CARD2,
208 1.7 takemura },
209 1.7 takemura };
210 1.7 takemura
211 1.11 thorpej CFATTACH_DECL(vrc4173bcu, sizeof(struct vrc4173bcu_softc),
212 1.11 thorpej vrc4173bcu_match, vrc4173bcu_attach, NULL, NULL);
213 1.4 takemura
214 1.7 takemura static const struct vrip_chipset_tag vrc4173bcu_chipset_methods = {
215 1.7 takemura .vc_power = __vrc4173bcu_power,
216 1.7 takemura .vc_intr_establish = __vrc4173bcu_intr_establish,
217 1.7 takemura .vc_intr_disestablish = __vrc4173bcu_intr_disestablish,
218 1.7 takemura .vc_intr_setmask1 = __vrc4173bcu_intr_setmask1,
219 1.7 takemura .vc_intr_setmask2 = __vrc4173bcu_intr_setmask2,
220 1.7 takemura .vc_intr_getstatus2 = __vrc4173bcu_intr_getstatus2,
221 1.7 takemura .vc_register_cmu = __vrc4173bcu_register_cmu,
222 1.7 takemura .vc_register_gpio = __vrc4173bcu_register_gpio,
223 1.7 takemura .vc_register_dmaau = __vrc4173bcu_register_dmaau,
224 1.7 takemura .vc_register_dcu = __vrc4173bcu_register_dcu,
225 1.7 takemura };
226 1.7 takemura
227 1.1 enami int
228 1.1 enami vrc4173bcu_match(struct device *parent, struct cfdata *match, void *aux)
229 1.1 enami {
230 1.1 enami struct pci_attach_args *pa = (struct pci_attach_args *)aux;
231 1.1 enami
232 1.1 enami if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NEC &&
233 1.1 enami PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NEC_VRC4173_BCU)
234 1.1 enami return (1);
235 1.1 enami
236 1.1 enami return (0);
237 1.1 enami }
238 1.1 enami
239 1.1 enami void
240 1.1 enami vrc4173bcu_attach(struct device *parent, struct device *self, void *aux)
241 1.1 enami {
242 1.1 enami struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)self;
243 1.1 enami struct pci_attach_args *pa = (struct pci_attach_args *)aux;
244 1.1 enami pci_chipset_tag_t pc = pa->pa_pc;
245 1.1 enami pcitag_t tag = pa->pa_tag;
246 1.1 enami pcireg_t csr;
247 1.1 enami char devinfo[256];
248 1.2 takemura u_int16_t reg;
249 1.6 takemura pci_intr_handle_t ih;
250 1.6 takemura const char *intrstr;
251 1.6 takemura int bus, device, function;
252 1.1 enami #ifdef DEBUG
253 1.1 enami char buf[80];
254 1.1 enami #endif
255 1.1 enami
256 1.1 enami pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
257 1.1 enami printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
258 1.1 enami
259 1.1 enami #if 0
260 1.1 enami printf("%s: ", sc->sc_dev.dv_xname);
261 1.1 enami pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
262 1.1 enami #endif
263 1.1 enami
264 1.7 takemura sc->sc_pc = pc;
265 1.7 takemura sc->sc_cmuchip.cc_sc = sc;
266 1.7 takemura sc->sc_cmuchip.cc_clock = __vrc4173bcu_clock;
267 1.7 takemura sc->sc_units = vrc4173bcu_units;
268 1.7 takemura sc->sc_nunits = sizeof(vrc4173bcu_units)/sizeof(struct vrc4173bcu_unit);
269 1.7 takemura sc->sc_chipset = vrc4173bcu_chipset_methods; /* structure assignment */
270 1.7 takemura sc->sc_chipset.vc_sc = sc;
271 1.1 enami
272 1.4 takemura sc->sc_platdep = platid_search(&platid, platdep_table,
273 1.2 takemura sizeof(platdep_table)/sizeof(*platdep_table),
274 1.2 takemura sizeof(*platdep_table));
275 1.2 takemura
276 1.1 enami /* Map I/O registers */
277 1.1 enami if (pci_mapreg_map(pa, VRC4173BCU_BADR, PCI_MAPREG_TYPE_IO, 0,
278 1.1 enami &sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) {
279 1.1 enami printf("%s: can't map mem space\n", sc->sc_dev.dv_xname);
280 1.1 enami return;
281 1.1 enami }
282 1.1 enami
283 1.1 enami /* Enable the device. */
284 1.1 enami csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
285 1.1 enami DPRINTF(("%s: csr = 0x%08x", sc->sc_dev.dv_xname, csr));
286 1.1 enami pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
287 1.1 enami csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
288 1.1 enami csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
289 1.1 enami DPRINTF((" -> 0x%08x\n", csr));
290 1.1 enami
291 1.1 enami csr = pci_conf_read(pc, tag, VRC4173BCU_BADR);
292 1.1 enami DPRINTF(("%s: base addr = %x@0x%08x\n", sc->sc_dev.dv_xname,
293 1.1 enami (int)sc->sc_size, csr));
294 1.1 enami DPRINTF(("%s: iot = 0x%08x, ioh = 0x%08x\n", sc->sc_dev.dv_xname,
295 1.4 takemura (int)sc->sc_iot, (int)sc->sc_ioh));
296 1.1 enami
297 1.1 enami /*
298 1.1 enami * Map I/O space for ICU.
299 1.1 enami */
300 1.1 enami if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
301 1.1 enami VRC4173ICU_IOBASE, VRC4173ICU_IOSIZE, &sc->sc_icuh)) {
302 1.1 enami printf(": can't map ICU i/o space\n");
303 1.1 enami return;
304 1.1 enami }
305 1.1 enami
306 1.2 takemura /*
307 1.2 takemura * Map I/O space for CMU.
308 1.2 takemura */
309 1.2 takemura if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
310 1.2 takemura VRC4173CMU_IOBASE, VRC4173CMU_IOSIZE, &sc->sc_cmuh)) {
311 1.2 takemura printf(": can't map CMU i/o space\n");
312 1.2 takemura return;
313 1.2 takemura }
314 1.2 takemura
315 1.4 takemura /* machine dependent setup */
316 1.4 takemura if (sc->sc_platdep->clkmask == USE_WINCE_CLKMASK) {
317 1.4 takemura /* XXX, You can nothing! */
318 1.2 takemura reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh,
319 1.4 takemura VRC4173CMU_CLKMSK);
320 1.2 takemura printf("%s: default clock mask is %04x\n",
321 1.2 takemura sc->sc_dev.dv_xname, reg);
322 1.2 takemura } else {
323 1.4 takemura /* assert all reset bits */
324 1.4 takemura bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST,
325 1.4 takemura VRC4173CMU_SRST_AC97 | VRC4173CMU_SRST_USB |
326 1.4 takemura VRC4173CMU_SRST_CARD2 | VRC4173CMU_SRST_CARD1);
327 1.4 takemura /* set clock mask */
328 1.2 takemura bus_space_write_2(sc->sc_iot, sc->sc_cmuh,
329 1.4 takemura VRC4173CMU_CLKMSK, sc->sc_platdep->clkmask);
330 1.4 takemura /* clear reset bit */
331 1.4 takemura bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 0);
332 1.2 takemura }
333 1.2 takemura
334 1.1 enami #ifdef DEBUG
335 1.1 enami reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1);
336 1.1 enami bitmask_snprintf(reg,
337 1.1 enami "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
338 1.1 enami "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15",
339 1.1 enami buf, sizeof(buf));
340 1.1 enami printf("%s: SYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf);
341 1.1 enami
342 1.1 enami reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MKIUINT);
343 1.1 enami bitmask_snprintf(reg,
344 1.1 enami "\20\1SCANINT\2KDATRDY\3KDATLOST\4B3\5B4\6B5\7B6\10B7"
345 1.1 enami "\11B8\12B9\13B10\14B11\15B12\16B13\17B14\20B15",
346 1.1 enami buf, sizeof(buf));
347 1.1 enami printf("%s: MKIUINT = 0x%s\n", sc->sc_dev.dv_xname, buf);
348 1.1 enami
349 1.1 enami reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1);
350 1.1 enami bitmask_snprintf(reg,
351 1.1 enami "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
352 1.1 enami "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15",
353 1.1 enami buf, sizeof(buf));
354 1.1 enami printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf);
355 1.1 enami
356 1.1 enami #if 1
357 1.1 enami reg = VRC4173ICU_USBINTR | VRC4173ICU_PIUINTR | VRC4173ICU_KIUINTR |
358 1.1 enami VRC4173ICU_DOZEPIUINTR;
359 1.1 enami bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, reg);
360 1.1 enami
361 1.1 enami reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1);
362 1.1 enami bitmask_snprintf(reg,
363 1.1 enami "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
364 1.1 enami "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15",
365 1.1 enami buf, sizeof(buf));
366 1.1 enami printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf);
367 1.1 enami #endif
368 1.1 enami #endif
369 1.1 enami
370 1.6 takemura /*
371 1.7 takemura * set interrupt mask
372 1.7 takemura */
373 1.7 takemura sc->sc_intrmask = sc->sc_platdep->intrmask;
374 1.7 takemura bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1,
375 1.7 takemura sc->sc_intrmask);
376 1.7 takemura
377 1.7 takemura /*
378 1.6 takemura * install interrupt handler
379 1.6 takemura */
380 1.6 takemura if (pci_intr_map(pa, &ih)) {
381 1.6 takemura printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
382 1.6 takemura return;
383 1.6 takemura }
384 1.6 takemura intrstr = pci_intr_string(pc, ih);
385 1.6 takemura sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, vrc4173bcu_intr, sc);
386 1.6 takemura if (sc->sc_ih == NULL) {
387 1.6 takemura printf("%s: couldn't establish interrupt",
388 1.6 takemura sc->sc_dev.dv_xname);
389 1.6 takemura if (intrstr != NULL)
390 1.6 takemura printf(" at %s", intrstr);
391 1.6 takemura printf("\n");
392 1.6 takemura return;
393 1.6 takemura }
394 1.6 takemura printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
395 1.6 takemura
396 1.6 takemura /*
397 1.6 takemura * install pci intr hooks
398 1.6 takemura */
399 1.6 takemura pci_decompose_tag(pc, pa->pa_intrtag, &bus, &device, &function);
400 1.6 takemura /* USB unit */
401 1.6 takemura if (sc->sc_intrmask & (1 << VRC4173ICU_USBINTR))
402 1.7 takemura vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_USBU, 0,
403 1.7 takemura IPL_NET, vrc4173bcu_pci_intr,
404 1.6 takemura config_connect(CONFIG_HOOK_PCIINTR,
405 1.7 takemura CONFIG_HOOK_PCIINTR_ID(bus, device, 2)));
406 1.6 takemura /* PC card unit 1 */
407 1.6 takemura if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA1INTR))
408 1.7 takemura vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU0, 0,
409 1.7 takemura IPL_NET, vrc4173bcu_pci_intr,
410 1.6 takemura config_connect(CONFIG_HOOK_PCIINTR,
411 1.7 takemura CONFIG_HOOK_PCIINTR_ID(bus, 1, 0)));
412 1.6 takemura /* PC card unit 2 */
413 1.6 takemura if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA2INTR))
414 1.7 takemura vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU1, 0,
415 1.7 takemura IPL_NET, vrc4173bcu_pci_intr,
416 1.6 takemura config_connect(CONFIG_HOOK_PCIINTR,
417 1.7 takemura CONFIG_HOOK_PCIINTR_ID(bus, 2, 0)));
418 1.6 takemura
419 1.6 takemura /*
420 1.7 takemura * Attach each devices
421 1.7 takemura * sc->sc_pri = 2~1
422 1.1 enami */
423 1.7 takemura for (sc->sc_pri = 2; 0 < sc->sc_pri; sc->sc_pri--)
424 1.7 takemura config_search(vrc4173bcu_search, self, vrc4173bcu_print);
425 1.1 enami }
426 1.1 enami
427 1.1 enami int
428 1.7 takemura vrc4173bcu_print(void *aux, const char *hoge)
429 1.1 enami {
430 1.7 takemura struct vrip_attach_args *va = (struct vrip_attach_args*)aux;
431 1.1 enami
432 1.8 takemura if (va->va_addr != VRIPIFCF_ADDR_DEFAULT)
433 1.12 thorpej aprint_normal(" addr 0x%04lx", va->va_addr);
434 1.8 takemura if (va->va_size != VRIPIFCF_SIZE_DEFAULT)
435 1.12 thorpej aprint_normal("-%04lx",
436 1.12 thorpej (va->va_addr + va->va_size - 1) & 0xffff);
437 1.8 takemura if (va->va_addr2 != VRIPIFCF_ADDR2_DEFAULT)
438 1.12 thorpej aprint_normal(", 0x%04lx", va->va_addr2);
439 1.8 takemura if (va->va_size2 != VRIPIFCF_SIZE2_DEFAULT)
440 1.12 thorpej aprint_normal("-%04lx",
441 1.12 thorpej (va->va_addr2 + va->va_size2 - 1) & 0xffff);
442 1.1 enami
443 1.1 enami return (UNCONF);
444 1.1 enami }
445 1.1 enami
446 1.1 enami int
447 1.7 takemura vrc4173bcu_search(struct device *parent, struct cfdata *cf, void *aux)
448 1.7 takemura {
449 1.7 takemura struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)parent;
450 1.7 takemura struct vrip_attach_args va;
451 1.7 takemura
452 1.7 takemura memset(&va, 0, sizeof(va));
453 1.7 takemura va.va_vc = &sc->sc_chipset;
454 1.7 takemura va.va_iot = sc->sc_iot;
455 1.7 takemura va.va_parent_ioh = sc->sc_ioh;
456 1.7 takemura va.va_unit = cf->cf_loc[VRIPIFCF_UNIT];
457 1.7 takemura va.va_addr = cf->cf_loc[VRIPIFCF_ADDR];
458 1.7 takemura va.va_size = cf->cf_loc[VRIPIFCF_SIZE];
459 1.7 takemura va.va_addr2 = cf->cf_loc[VRIPIFCF_ADDR2];
460 1.7 takemura va.va_size2 = cf->cf_loc[VRIPIFCF_SIZE2];
461 1.7 takemura va.va_gpio_chips = NULL; /* XXX */
462 1.7 takemura va.va_cc = sc->sc_chipset.vc_cc;
463 1.7 takemura va.va_ac = sc->sc_chipset.vc_ac;
464 1.7 takemura va.va_dc = sc->sc_chipset.vc_dc;
465 1.9 thorpej if ((config_match(parent, cf, &va) == sc->sc_pri))
466 1.7 takemura config_attach(parent, cf, &va, vrc4173bcu_print);
467 1.7 takemura
468 1.7 takemura return (0);
469 1.7 takemura }
470 1.7 takemura
471 1.7 takemura int
472 1.1 enami vrc4173bcu_intr(void *arg)
473 1.1 enami {
474 1.1 enami struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)arg;
475 1.1 enami u_int16_t reg;
476 1.7 takemura struct vrc4173bcu_intrhand *ih;
477 1.6 takemura int i;
478 1.1 enami
479 1.1 enami reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1);
480 1.6 takemura reg &= sc->sc_intrmask;
481 1.1 enami if (reg == 0)
482 1.1 enami return (0);
483 1.1 enami
484 1.1 enami #if 0
485 1.1 enami {
486 1.1 enami char buf[80];
487 1.1 enami bitmask_snprintf(reg,
488 1.1 enami "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
489 1.1 enami "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15",
490 1.1 enami buf, sizeof(buf));
491 1.1 enami printf("%s: %s\n", sc->sc_dev.dv_xname, buf);
492 1.1 enami }
493 1.1 enami #endif
494 1.7 takemura for (ih = sc->sc_intrhands, i = 0; i < VRC4173BCU_NINTRS; i++, ih++)
495 1.7 takemura if ((reg & (1 << i)) && ih->ih_fun != NULL)
496 1.7 takemura ih->ih_fun(ih->ih_arg);
497 1.1 enami
498 1.6 takemura return (1);
499 1.7 takemura }
500 1.7 takemura
501 1.7 takemura static int
502 1.7 takemura vrc4173bcu_pci_intr(void *arg)
503 1.7 takemura {
504 1.7 takemura config_call_tag ct = (config_call_tag)arg;
505 1.7 takemura config_connected_call(ct, NULL);
506 1.7 takemura
507 1.7 takemura return (0);
508 1.7 takemura }
509 1.7 takemura
510 1.7 takemura #ifdef VRC4173BCU_DEBUG
511 1.7 takemura static void
512 1.7 takemura vrc4173bcu_dump_level2mask(vrip_chipset_tag_t vc, vrip_intr_handle_t handle)
513 1.7 takemura {
514 1.7 takemura struct vrc4173bcu_softc *sc = vc->vc_sc;
515 1.7 takemura struct vrc4173bcu_intrhand *ih = handle;
516 1.7 takemura const struct vrc4173bcu_unit *vu = ih->ih_unit;
517 1.7 takemura u_int32_t reg;
518 1.7 takemura
519 1.7 takemura if (vu->vu_mlreg) {
520 1.7 takemura DPRINTF(("level1[%d] level2 mask:", vu->vu_intr[0]));
521 1.7 takemura reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg);
522 1.7 takemura if (vu->vu_mhreg) {
523 1.7 takemura reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh,
524 1.7 takemura vu->vu_mhreg) << 16);
525 1.7 takemura dbg_bit_print(reg);
526 1.7 takemura } else
527 1.7 takemura dbg_bit_print(reg);
528 1.7 takemura }
529 1.7 takemura }
530 1.7 takemura #endif
531 1.7 takemura
532 1.7 takemura int
533 1.7 takemura __vrc4173bcu_power(vrip_chipset_tag_t vc, int unit, int onoff)
534 1.7 takemura {
535 1.7 takemura struct vrc4173bcu_softc *sc = vc->vc_sc;
536 1.7 takemura const struct vrc4173bcu_unit *vu;
537 1.7 takemura
538 1.7 takemura if (sc->sc_chipset.vc_cc == NULL)
539 1.7 takemura return (0); /* You have no clock mask unit yet. */
540 1.7 takemura if (!VALID_UNIT(sc, unit))
541 1.7 takemura return (0);
542 1.7 takemura vu = &sc->sc_units[unit];
543 1.7 takemura
544 1.7 takemura return (*sc->sc_chipset.vc_cc->cc_clock)(sc->sc_chipset.vc_cc,
545 1.7 takemura vu->vu_clkmask, onoff);
546 1.7 takemura }
547 1.7 takemura
548 1.7 takemura vrip_intr_handle_t
549 1.7 takemura __vrc4173bcu_intr_establish(vrip_chipset_tag_t vc, int unit, int line,
550 1.7 takemura int level, int (*ih_fun)(void *), void *ih_arg)
551 1.7 takemura {
552 1.7 takemura struct vrc4173bcu_softc *sc = vc->vc_sc;
553 1.7 takemura const struct vrc4173bcu_unit *vu;
554 1.7 takemura struct vrc4173bcu_intrhand *ih;
555 1.7 takemura
556 1.7 takemura if (!VALID_UNIT(sc, unit))
557 1.7 takemura return (NULL);
558 1.7 takemura vu = &sc->sc_units[unit];
559 1.7 takemura ih = &sc->sc_intrhands[vu->vu_intr[line]];
560 1.7 takemura if (ih->ih_fun) /* Can't share level 1 interrupt */
561 1.7 takemura return (NULL);
562 1.7 takemura ih->ih_fun = ih_fun;
563 1.7 takemura ih->ih_arg = ih_arg;
564 1.7 takemura ih->ih_unit = vu;
565 1.7 takemura
566 1.7 takemura /* Mask level 2 interrupt mask register. (disable interrupt) */
567 1.7 takemura vrip_intr_setmask2(vc, ih, ~0, 0);
568 1.7 takemura /* Unmask Level 1 interrupt mask register (enable interrupt) */
569 1.7 takemura vrip_intr_setmask1(vc, ih, 1);
570 1.7 takemura
571 1.7 takemura return ((void *)ih);
572 1.7 takemura }
573 1.7 takemura
574 1.7 takemura void
575 1.7 takemura __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t vc, vrip_intr_handle_t handle)
576 1.7 takemura {
577 1.7 takemura struct vrc4173bcu_intrhand *ih = handle;
578 1.7 takemura
579 1.7 takemura /* Mask Level 1 interrupt mask register (disable interrupt) */
580 1.7 takemura vrip_intr_setmask1(vc, ih, 0);
581 1.7 takemura /* Mask level 2 interrupt mask register(if any). (disable interrupt) */
582 1.7 takemura vrip_intr_setmask2(vc, ih, ~0, 0);
583 1.7 takemura ih->ih_fun = NULL;
584 1.7 takemura ih->ih_arg = NULL;
585 1.7 takemura }
586 1.7 takemura
587 1.7 takemura /* Set level 1 interrupt mask. */
588 1.7 takemura void
589 1.7 takemura __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t vc, vrip_intr_handle_t handle,
590 1.7 takemura int enable)
591 1.7 takemura {
592 1.7 takemura struct vrc4173bcu_softc *sc = vc->vc_sc;
593 1.7 takemura struct vrc4173bcu_intrhand *ih = handle;
594 1.7 takemura int level1 = ih - sc->sc_intrhands;
595 1.7 takemura
596 1.7 takemura DPRINTF(("__vrc4173bcu_intr_setmask1: SYSINT: %s %d\n",
597 1.7 takemura enable ? "enable" : "disable", level1));
598 1.7 takemura if (enable)
599 1.7 takemura sc->sc_intrmask |= (1 << level1);
600 1.7 takemura else
601 1.7 takemura sc->sc_intrmask &= ~(1 << level1);
602 1.7 takemura bus_space_write_2 (sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1,
603 1.7 takemura sc->sc_intrmask);
604 1.7 takemura #ifdef VRC4173BCU_DEBUG
605 1.7 takemura if (vrc4173bcu_debug)
606 1.7 takemura dbg_bit_print(sc->sc_intrmask);
607 1.7 takemura #endif
608 1.7 takemura
609 1.7 takemura return;
610 1.7 takemura }
611 1.7 takemura
612 1.7 takemura /* Get level 2 interrupt status */
613 1.7 takemura void
614 1.7 takemura __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle,
615 1.7 takemura u_int32_t *status /* Level 2 status */)
616 1.7 takemura {
617 1.7 takemura struct vrc4173bcu_softc *sc = vc->vc_sc;
618 1.7 takemura struct vrc4173bcu_intrhand *ih = handle;
619 1.7 takemura const struct vrc4173bcu_unit *vu = ih->ih_unit;
620 1.7 takemura u_int32_t reg;
621 1.7 takemura
622 1.7 takemura reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_lreg);
623 1.7 takemura reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_hreg) << 16);
624 1.7 takemura *status = reg;
625 1.7 takemura }
626 1.7 takemura
627 1.7 takemura /* Set level 2 interrupt mask. */
628 1.7 takemura void
629 1.7 takemura __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle,
630 1.7 takemura u_int32_t mask /* Level 2 mask */, int onoff)
631 1.7 takemura {
632 1.7 takemura struct vrc4173bcu_softc *sc = vc->vc_sc;
633 1.7 takemura struct vrc4173bcu_intrhand *ih = handle;
634 1.7 takemura const struct vrc4173bcu_unit *vu = ih->ih_unit;
635 1.7 takemura u_int16_t reg;
636 1.7 takemura
637 1.7 takemura DPRINTF(("vrc4173bcu_intr_setmask2:\n"));
638 1.7 takemura #ifdef VRC4173BCU_DEBUG
639 1.7 takemura if (vrc4173bcu_debug)
640 1.7 takemura vrc4173bcu_dump_level2mask(vc, handle);
641 1.7 takemura #endif
642 1.7 takemura if (vu->vu_mlreg) {
643 1.7 takemura reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg);
644 1.7 takemura if (onoff)
645 1.7 takemura reg |= (mask & 0xffff);
646 1.7 takemura else
647 1.7 takemura reg &= ~(mask & 0xffff);
648 1.7 takemura bus_space_write_2(sc->sc_iot, sc->sc_ioh, vu->vu_mlreg, reg);
649 1.7 takemura }
650 1.7 takemura if (vu->vu_mhreg) {
651 1.7 takemura reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg);
652 1.7 takemura if (onoff)
653 1.7 takemura reg |= ((mask >> 16) & 0xffff);
654 1.7 takemura else
655 1.7 takemura reg &= ~((mask >> 16) & 0xffff);
656 1.7 takemura bus_space_write_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg, reg);
657 1.7 takemura }
658 1.7 takemura #ifdef VRC4173BCU_DEBUG
659 1.7 takemura if (vrc4173bcu_debug)
660 1.7 takemura vrc4173bcu_dump_level2mask(vc, handle);
661 1.7 takemura #endif
662 1.7 takemura
663 1.7 takemura return;
664 1.7 takemura }
665 1.7 takemura
666 1.7 takemura int
667 1.7 takemura __vrc4173bcu_clock(vrcmu_chipset_tag_t cc, u_int16_t mask, int onoff)
668 1.7 takemura {
669 1.7 takemura struct vrc4173bcu_softc *sc = cc->cc_sc;
670 1.7 takemura u_int16_t reg;
671 1.7 takemura
672 1.7 takemura reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK);
673 1.7 takemura #if 0
674 1.7 takemura printf("cmu register(enter):");
675 1.7 takemura dbg_bit_print(reg);
676 1.7 takemura #endif
677 1.7 takemura if (onoff)
678 1.7 takemura reg |= mask;
679 1.7 takemura else
680 1.7 takemura reg &= ~mask;
681 1.7 takemura bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK, reg);
682 1.7 takemura #if 0
683 1.7 takemura printf("cmu register(exit) :");
684 1.7 takemura dbg_bit_print(reg);
685 1.7 takemura #endif
686 1.7 takemura return (0);
687 1.7 takemura }
688 1.7 takemura
689 1.7 takemura void
690 1.7 takemura __vrc4173bcu_register_cmu(vrip_chipset_tag_t vc, vrcmu_chipset_tag_t cmu)
691 1.7 takemura {
692 1.7 takemura vc->vc_cc = cmu;
693 1.7 takemura }
694 1.7 takemura
695 1.7 takemura void
696 1.7 takemura __vrc4173bcu_register_gpio(vrip_chipset_tag_t vc, hpcio_chip_t chip)
697 1.7 takemura {
698 1.7 takemura /* XXX, not implemented yet */
699 1.7 takemura }
700 1.7 takemura
701 1.7 takemura void
702 1.7 takemura __vrc4173bcu_register_dmaau(vrip_chipset_tag_t vc, vrdmaau_chipset_tag_t dmaau)
703 1.7 takemura {
704 1.7 takemura
705 1.7 takemura vc->vc_ac = dmaau;
706 1.7 takemura }
707 1.7 takemura
708 1.7 takemura void
709 1.7 takemura __vrc4173bcu_register_dcu(vrip_chipset_tag_t vc, vrdcu_chipset_tag_t dcu)
710 1.7 takemura {
711 1.7 takemura
712 1.7 takemura vc->vc_dc = dcu;
713 1.1 enami }
714