vrc4173bcu.c revision 1.13
1 /* $NetBSD: vrc4173bcu.c,v 1.13 2003/03/24 03:32:08 imp Exp $ */ 2 3 /*- 4 * Copyright (c) 2001,2002 Enami Tsugutomo. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/device.h> 32 33 #include <machine/bus.h> 34 35 #include <dev/pci/pcivar.h> 36 #include <dev/pci/pcidevs.h> 37 38 #include <machine/platid.h> 39 #include <machine/platid_mask.h> 40 #include <machine/config_hook.h> 41 42 #include <hpcmips/vr/vripunit.h> 43 #include <hpcmips/vr/vripif.h> 44 #include <hpcmips/vr/vrc4173bcuvar.h> 45 #include <hpcmips/vr/vrc4173icureg.h> 46 #include <hpcmips/vr/vrc4173cmureg.h> 47 48 #include "locators.h" 49 50 #ifdef VRC4173BCU_DEBUG 51 #define DPRINTF_ENABLE 52 #define DPRINTF_DEBUG vrc4173bcu_debug 53 #endif 54 #define USE_HPC_DPRINTF 55 #include <machine/debug.h> 56 57 #define VRC4173BCU_BADR 0x10 58 #define USE_WINCE_CLKMASK (~0) 59 60 static int vrc4173bcu_match(struct device *, struct cfdata *, void *); 61 static void vrc4173bcu_attach(struct device *, struct device *, void *); 62 static int vrc4173bcu_intr(void *); 63 static int vrc4173bcu_print(void *, const char *); 64 static int vrc4173bcu_search(struct device *, struct cfdata *cf, void *); 65 static int vrc4173bcu_pci_intr(void *); 66 #ifdef VRC4173BCU_DEBUG 67 static void vrc4173bcu_dump_level2mask(vrip_chipset_tag_t, 68 vrip_intr_handle_t); 69 #endif 70 71 int __vrc4173bcu_power(vrip_chipset_tag_t, int, int); 72 vrip_intr_handle_t __vrc4173bcu_intr_establish(vrip_chipset_tag_t, int, int, 73 int, int(*)(void*), void*); 74 void __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t, vrip_intr_handle_t); 75 void __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t, vrip_intr_handle_t, int); 76 void __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t, vrip_intr_handle_t, 77 u_int32_t, int); 78 void __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t, vrip_intr_handle_t, 79 u_int32_t*); 80 void __vrc4173bcu_register_cmu(vrip_chipset_tag_t, vrcmu_chipset_tag_t); 81 void __vrc4173bcu_register_gpio(vrip_chipset_tag_t, hpcio_chip_t); 82 void __vrc4173bcu_register_dmaau(vrip_chipset_tag_t, vrdmaau_chipset_tag_t); 83 void __vrc4173bcu_register_dcu(vrip_chipset_tag_t, vrdcu_chipset_tag_t); 84 int __vrc4173bcu_clock(vrcmu_chipset_tag_t, u_int16_t, int); 85 86 /* 87 * machine dependent info 88 */ 89 static struct vrc4173bcu_platdep { 90 platid_mask_t *platidmask; 91 u_int32_t clkmask; 92 int intrmask; 93 } platdep_table[] = { 94 { 95 &platid_mask_MACH_VICTOR_INTERLINK_MPC303, 96 USE_WINCE_CLKMASK, /* clock mask */ 97 (1 << VRC4173ICU_USBINTR)| /* intrrupts */ 98 (1 << VRC4173ICU_PCMCIA1INTR)| 99 (1 << VRC4173ICU_PCMCIA2INTR), 100 }, 101 { 102 &platid_mask_MACH_VICTOR_INTERLINK_MPC304, 103 USE_WINCE_CLKMASK, /* clock mask */ 104 (1 << VRC4173ICU_USBINTR)| /* intrrupts */ 105 (1 << VRC4173ICU_PCMCIA1INTR)| 106 (1 << VRC4173ICU_PCMCIA2INTR), 107 }, 108 { 109 &platid_mask_MACH_NEC_MCR_SIGMARION2, 110 USE_WINCE_CLKMASK, /* clock mask */ 111 (1 << VRC4173ICU_USBINTR), /* intrrupts */ 112 }, 113 { 114 &platid_wild, 115 USE_WINCE_CLKMASK, /* XXX */ 116 -1, 117 }, 118 }; 119 120 struct vrc4173bcu_unit { 121 char *vu_name; 122 int vu_intr[2]; 123 int vu_clkmask; 124 bus_addr_t vu_lreg; 125 bus_addr_t vu_mlreg; 126 bus_addr_t vu_hreg; 127 bus_addr_t vu_mhreg; 128 }; 129 130 struct vrc4173bcu_softc { 131 struct device sc_dev; 132 struct vrip_chipset_tag sc_chipset; 133 struct vrcmu_chipset_tag sc_cmuchip; 134 135 pci_chipset_tag_t sc_pc; 136 bus_space_tag_t sc_iot; 137 bus_space_handle_t sc_ioh; 138 bus_size_t sc_size; 139 140 bus_space_handle_t sc_icuh; /* I/O handle for ICU. */ 141 bus_space_handle_t sc_cmuh; /* I/O handle for CMU. */ 142 void *sc_ih; 143 #define VRC4173BCU_NINTRS 16 144 int sc_intrmask; 145 struct vrc4173bcu_intrhand { 146 int (*ih_fun)(void *); 147 void *ih_arg; 148 const struct vrc4173bcu_unit *ih_unit; 149 } sc_intrhands[32]; 150 151 struct vrc4173bcu_unit *sc_units; 152 int sc_nunits; 153 int sc_pri; 154 155 struct vrc4173bcu_platdep *sc_platdep; 156 }; 157 158 #define VALID_UNIT(sc, unit) (0 <= (unit) && (unit) < (sc)->sc_nunits) 159 160 static struct vrc4173bcu_unit vrc4173bcu_units[] = { 161 [VRIP_UNIT_KIU] = { 162 "kiu", 163 { VRC4173ICU_KIUINTR, }, 164 VRC4173CMU_CLKMSK_KIU, 165 VRC4173ICU_KIUINT, VRC4173ICU_MKIUINT, 166 }, 167 [VRIP_UNIT_PIU] = { 168 "piu", 169 { VRC4173ICU_PIUINTR, VRC4173ICU_DOZEPIUINTR}, 170 VRC4173CMU_CLKMSK_PIU, 171 VRC4173ICU_PIUINT, VRC4173ICU_MPIUINT, 172 }, 173 [VRIP_UNIT_AIU] = { 174 "aiu", 175 { VRC4173ICU_AIUINTR, }, 176 VRC4173CMU_CLKMSK_AIU, 177 VRC4173ICU_AIUINT, VRC4173ICU_MAIUINT, 178 }, 179 [VRIP_UNIT_GIU] = { 180 "giu", 181 { VRC4173ICU_GIUINTR, }, 182 0, 183 VRC4173ICU_GIULINT, VRC4173ICU_MGIULINT, 184 VRC4173ICU_GIUHINT, VRC4173ICU_MGIUHINT, 185 }, 186 [VRIP_UNIT_PS2U0] = { 187 "PS/2-Ch1", 188 { VRC4173ICU_PS2CH1INTR, }, 189 VRC4173CMU_CLKMSK_PS2CH1, 190 }, 191 [VRIP_UNIT_PS2U1] = { 192 "PS/2-Ch2", 193 { VRC4173ICU_PS2CH2INTR, }, 194 VRC4173CMU_CLKMSK_PS2CH2, 195 }, 196 [VRIP_UNIT_USBU] = { 197 "usbu", 198 { VRC4173ICU_USBINTR, }, 199 VRC4173CMU_CLKMSK_USB, 200 }, 201 [VRIP_UNIT_CARDU0] = { 202 "cardu0", 203 { VRC4173ICU_PCMCIA1INTR, }, 204 VRC4173CMU_CLKMSK_CARD1, 205 }, 206 [VRIP_UNIT_CARDU1] = { 207 "cardu1", 208 { VRC4173ICU_PCMCIA2INTR, }, 209 VRC4173CMU_CLKMSK_CARD2, 210 }, 211 }; 212 213 CFATTACH_DECL(vrc4173bcu, sizeof(struct vrc4173bcu_softc), 214 vrc4173bcu_match, vrc4173bcu_attach, NULL, NULL); 215 216 static const struct vrip_chipset_tag vrc4173bcu_chipset_methods = { 217 .vc_power = __vrc4173bcu_power, 218 .vc_intr_establish = __vrc4173bcu_intr_establish, 219 .vc_intr_disestablish = __vrc4173bcu_intr_disestablish, 220 .vc_intr_setmask1 = __vrc4173bcu_intr_setmask1, 221 .vc_intr_setmask2 = __vrc4173bcu_intr_setmask2, 222 .vc_intr_getstatus2 = __vrc4173bcu_intr_getstatus2, 223 .vc_register_cmu = __vrc4173bcu_register_cmu, 224 .vc_register_gpio = __vrc4173bcu_register_gpio, 225 .vc_register_dmaau = __vrc4173bcu_register_dmaau, 226 .vc_register_dcu = __vrc4173bcu_register_dcu, 227 }; 228 229 int 230 vrc4173bcu_match(struct device *parent, struct cfdata *match, void *aux) 231 { 232 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 233 234 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NEC && 235 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NEC_VRC4173_BCU) 236 return (1); 237 238 return (0); 239 } 240 241 void 242 vrc4173bcu_attach(struct device *parent, struct device *self, void *aux) 243 { 244 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)self; 245 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 246 pci_chipset_tag_t pc = pa->pa_pc; 247 pcitag_t tag = pa->pa_tag; 248 pcireg_t csr; 249 char devinfo[256]; 250 u_int16_t reg; 251 pci_intr_handle_t ih; 252 const char *intrstr; 253 int bus, device, function; 254 #ifdef DEBUG 255 char buf[80]; 256 #endif 257 258 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 259 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 260 261 #if 0 262 printf("%s: ", sc->sc_dev.dv_xname); 263 pci_conf_print(pa->pa_pc, pa->pa_tag, NULL); 264 #endif 265 266 sc->sc_pc = pc; 267 sc->sc_cmuchip.cc_sc = sc; 268 sc->sc_cmuchip.cc_clock = __vrc4173bcu_clock; 269 sc->sc_units = vrc4173bcu_units; 270 sc->sc_nunits = sizeof(vrc4173bcu_units)/sizeof(struct vrc4173bcu_unit); 271 sc->sc_chipset = vrc4173bcu_chipset_methods; /* structure assignment */ 272 sc->sc_chipset.vc_sc = sc; 273 274 sc->sc_platdep = platid_search(&platid, platdep_table, 275 sizeof(platdep_table)/sizeof(*platdep_table), 276 sizeof(*platdep_table)); 277 278 /* Map I/O registers */ 279 if (pci_mapreg_map(pa, VRC4173BCU_BADR, PCI_MAPREG_TYPE_IO, 0, 280 &sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) { 281 printf("%s: can't map mem space\n", sc->sc_dev.dv_xname); 282 return; 283 } 284 285 /* Enable the device. */ 286 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 287 DPRINTF(("%s: csr = 0x%08x", sc->sc_dev.dv_xname, csr)); 288 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 289 csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE); 290 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 291 DPRINTF((" -> 0x%08x\n", csr)); 292 293 csr = pci_conf_read(pc, tag, VRC4173BCU_BADR); 294 DPRINTF(("%s: base addr = %x@0x%08x\n", sc->sc_dev.dv_xname, 295 (int)sc->sc_size, csr)); 296 DPRINTF(("%s: iot = 0x%08x, ioh = 0x%08x\n", sc->sc_dev.dv_xname, 297 (int)sc->sc_iot, (int)sc->sc_ioh)); 298 299 /* 300 * Map I/O space for ICU. 301 */ 302 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 303 VRC4173ICU_IOBASE, VRC4173ICU_IOSIZE, &sc->sc_icuh)) { 304 printf(": can't map ICU i/o space\n"); 305 return; 306 } 307 308 /* 309 * Map I/O space for CMU. 310 */ 311 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 312 VRC4173CMU_IOBASE, VRC4173CMU_IOSIZE, &sc->sc_cmuh)) { 313 printf(": can't map CMU i/o space\n"); 314 return; 315 } 316 317 /* machine dependent setup */ 318 if (sc->sc_platdep->clkmask == USE_WINCE_CLKMASK) { 319 /* XXX, You can nothing! */ 320 reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh, 321 VRC4173CMU_CLKMSK); 322 printf("%s: default clock mask is %04x\n", 323 sc->sc_dev.dv_xname, reg); 324 } else { 325 /* assert all reset bits */ 326 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 327 VRC4173CMU_SRST_AC97 | VRC4173CMU_SRST_USB | 328 VRC4173CMU_SRST_CARD2 | VRC4173CMU_SRST_CARD1); 329 /* set clock mask */ 330 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, 331 VRC4173CMU_CLKMSK, sc->sc_platdep->clkmask); 332 /* clear reset bit */ 333 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 0); 334 } 335 336 #ifdef DEBUG 337 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1); 338 bitmask_snprintf(reg, 339 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 340 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 341 buf, sizeof(buf)); 342 printf("%s: SYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf); 343 344 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MKIUINT); 345 bitmask_snprintf(reg, 346 "\20\1SCANINT\2KDATRDY\3KDATLOST\4B3\5B4\6B5\7B6\10B7" 347 "\11B8\12B9\13B10\14B11\15B12\16B13\17B14\20B15", 348 buf, sizeof(buf)); 349 printf("%s: MKIUINT = 0x%s\n", sc->sc_dev.dv_xname, buf); 350 351 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1); 352 bitmask_snprintf(reg, 353 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 354 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 355 buf, sizeof(buf)); 356 printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf); 357 358 #if 1 359 reg = VRC4173ICU_USBINTR | VRC4173ICU_PIUINTR | VRC4173ICU_KIUINTR | 360 VRC4173ICU_DOZEPIUINTR; 361 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, reg); 362 363 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1); 364 bitmask_snprintf(reg, 365 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 366 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 367 buf, sizeof(buf)); 368 printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf); 369 #endif 370 #endif 371 372 /* 373 * set interrupt mask 374 */ 375 sc->sc_intrmask = sc->sc_platdep->intrmask; 376 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, 377 sc->sc_intrmask); 378 379 /* 380 * install interrupt handler 381 */ 382 if (pci_intr_map(pa, &ih)) { 383 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 384 return; 385 } 386 intrstr = pci_intr_string(pc, ih); 387 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, vrc4173bcu_intr, sc); 388 if (sc->sc_ih == NULL) { 389 printf("%s: couldn't establish interrupt", 390 sc->sc_dev.dv_xname); 391 if (intrstr != NULL) 392 printf(" at %s", intrstr); 393 printf("\n"); 394 return; 395 } 396 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 397 398 /* 399 * install pci intr hooks 400 */ 401 pci_decompose_tag(pc, pa->pa_intrtag, &bus, &device, &function); 402 /* USB unit */ 403 if (sc->sc_intrmask & (1 << VRC4173ICU_USBINTR)) 404 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_USBU, 0, 405 IPL_NET, vrc4173bcu_pci_intr, 406 config_connect(CONFIG_HOOK_PCIINTR, 407 CONFIG_HOOK_PCIINTR_ID(bus, device, 2))); 408 /* PC card unit 1 */ 409 if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA1INTR)) 410 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU0, 0, 411 IPL_NET, vrc4173bcu_pci_intr, 412 config_connect(CONFIG_HOOK_PCIINTR, 413 CONFIG_HOOK_PCIINTR_ID(bus, 1, 0))); 414 /* PC card unit 2 */ 415 if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA2INTR)) 416 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU1, 0, 417 IPL_NET, vrc4173bcu_pci_intr, 418 config_connect(CONFIG_HOOK_PCIINTR, 419 CONFIG_HOOK_PCIINTR_ID(bus, 2, 0))); 420 421 /* 422 * Attach each devices 423 * sc->sc_pri = 2~1 424 */ 425 for (sc->sc_pri = 2; 0 < sc->sc_pri; sc->sc_pri--) 426 config_search(vrc4173bcu_search, self, vrc4173bcu_print); 427 } 428 429 int 430 vrc4173bcu_print(void *aux, const char *hoge) 431 { 432 struct vrip_attach_args *va = (struct vrip_attach_args*)aux; 433 434 if (va->va_addr != VRIPIFCF_ADDR_DEFAULT) 435 aprint_normal(" addr 0x%04lx", va->va_addr); 436 if (va->va_size != VRIPIFCF_SIZE_DEFAULT) 437 aprint_normal("-%04lx", 438 (va->va_addr + va->va_size - 1) & 0xffff); 439 if (va->va_addr2 != VRIPIFCF_ADDR2_DEFAULT) 440 aprint_normal(", 0x%04lx", va->va_addr2); 441 if (va->va_size2 != VRIPIFCF_SIZE2_DEFAULT) 442 aprint_normal("-%04lx", 443 (va->va_addr2 + va->va_size2 - 1) & 0xffff); 444 445 return (UNCONF); 446 } 447 448 int 449 vrc4173bcu_search(struct device *parent, struct cfdata *cf, void *aux) 450 { 451 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)parent; 452 struct vrip_attach_args va; 453 454 memset(&va, 0, sizeof(va)); 455 va.va_vc = &sc->sc_chipset; 456 va.va_iot = sc->sc_iot; 457 va.va_parent_ioh = sc->sc_ioh; 458 va.va_unit = cf->cf_loc[VRIPIFCF_UNIT]; 459 va.va_addr = cf->cf_loc[VRIPIFCF_ADDR]; 460 va.va_size = cf->cf_loc[VRIPIFCF_SIZE]; 461 va.va_addr2 = cf->cf_loc[VRIPIFCF_ADDR2]; 462 va.va_size2 = cf->cf_loc[VRIPIFCF_SIZE2]; 463 va.va_gpio_chips = NULL; /* XXX */ 464 va.va_cc = sc->sc_chipset.vc_cc; 465 va.va_ac = sc->sc_chipset.vc_ac; 466 va.va_dc = sc->sc_chipset.vc_dc; 467 if ((config_match(parent, cf, &va) == sc->sc_pri)) 468 config_attach(parent, cf, &va, vrc4173bcu_print); 469 470 return (0); 471 } 472 473 int 474 vrc4173bcu_intr(void *arg) 475 { 476 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)arg; 477 u_int16_t reg; 478 struct vrc4173bcu_intrhand *ih; 479 int i; 480 481 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1); 482 reg &= sc->sc_intrmask; 483 if (reg == 0) 484 return (0); 485 486 #if 0 487 { 488 char buf[80]; 489 bitmask_snprintf(reg, 490 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 491 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 492 buf, sizeof(buf)); 493 printf("%s: %s\n", sc->sc_dev.dv_xname, buf); 494 } 495 #endif 496 for (ih = sc->sc_intrhands, i = 0; i < VRC4173BCU_NINTRS; i++, ih++) 497 if ((reg & (1 << i)) && ih->ih_fun != NULL) 498 ih->ih_fun(ih->ih_arg); 499 500 return (1); 501 } 502 503 static int 504 vrc4173bcu_pci_intr(void *arg) 505 { 506 config_call_tag ct = (config_call_tag)arg; 507 config_connected_call(ct, NULL); 508 509 return (0); 510 } 511 512 #ifdef VRC4173BCU_DEBUG 513 static void 514 vrc4173bcu_dump_level2mask(vrip_chipset_tag_t vc, vrip_intr_handle_t handle) 515 { 516 struct vrc4173bcu_softc *sc = vc->vc_sc; 517 struct vrc4173bcu_intrhand *ih = handle; 518 const struct vrc4173bcu_unit *vu = ih->ih_unit; 519 u_int32_t reg; 520 521 if (vu->vu_mlreg) { 522 DPRINTF(("level1[%d] level2 mask:", vu->vu_intr[0])); 523 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg); 524 if (vu->vu_mhreg) { 525 reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh, 526 vu->vu_mhreg) << 16); 527 dbg_bit_print(reg); 528 } else 529 dbg_bit_print(reg); 530 } 531 } 532 #endif 533 534 int 535 __vrc4173bcu_power(vrip_chipset_tag_t vc, int unit, int onoff) 536 { 537 struct vrc4173bcu_softc *sc = vc->vc_sc; 538 const struct vrc4173bcu_unit *vu; 539 540 if (sc->sc_chipset.vc_cc == NULL) 541 return (0); /* You have no clock mask unit yet. */ 542 if (!VALID_UNIT(sc, unit)) 543 return (0); 544 vu = &sc->sc_units[unit]; 545 546 return (*sc->sc_chipset.vc_cc->cc_clock)(sc->sc_chipset.vc_cc, 547 vu->vu_clkmask, onoff); 548 } 549 550 vrip_intr_handle_t 551 __vrc4173bcu_intr_establish(vrip_chipset_tag_t vc, int unit, int line, 552 int level, int (*ih_fun)(void *), void *ih_arg) 553 { 554 struct vrc4173bcu_softc *sc = vc->vc_sc; 555 const struct vrc4173bcu_unit *vu; 556 struct vrc4173bcu_intrhand *ih; 557 558 if (!VALID_UNIT(sc, unit)) 559 return (NULL); 560 vu = &sc->sc_units[unit]; 561 ih = &sc->sc_intrhands[vu->vu_intr[line]]; 562 if (ih->ih_fun) /* Can't share level 1 interrupt */ 563 return (NULL); 564 ih->ih_fun = ih_fun; 565 ih->ih_arg = ih_arg; 566 ih->ih_unit = vu; 567 568 /* Mask level 2 interrupt mask register. (disable interrupt) */ 569 vrip_intr_setmask2(vc, ih, ~0, 0); 570 /* Unmask Level 1 interrupt mask register (enable interrupt) */ 571 vrip_intr_setmask1(vc, ih, 1); 572 573 return ((void *)ih); 574 } 575 576 void 577 __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t vc, vrip_intr_handle_t handle) 578 { 579 struct vrc4173bcu_intrhand *ih = handle; 580 581 /* Mask Level 1 interrupt mask register (disable interrupt) */ 582 vrip_intr_setmask1(vc, ih, 0); 583 /* Mask level 2 interrupt mask register(if any). (disable interrupt) */ 584 vrip_intr_setmask2(vc, ih, ~0, 0); 585 ih->ih_fun = NULL; 586 ih->ih_arg = NULL; 587 } 588 589 /* Set level 1 interrupt mask. */ 590 void 591 __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t vc, vrip_intr_handle_t handle, 592 int enable) 593 { 594 struct vrc4173bcu_softc *sc = vc->vc_sc; 595 struct vrc4173bcu_intrhand *ih = handle; 596 int level1 = ih - sc->sc_intrhands; 597 598 DPRINTF(("__vrc4173bcu_intr_setmask1: SYSINT: %s %d\n", 599 enable ? "enable" : "disable", level1)); 600 if (enable) 601 sc->sc_intrmask |= (1 << level1); 602 else 603 sc->sc_intrmask &= ~(1 << level1); 604 bus_space_write_2 (sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, 605 sc->sc_intrmask); 606 #ifdef VRC4173BCU_DEBUG 607 if (vrc4173bcu_debug) 608 dbg_bit_print(sc->sc_intrmask); 609 #endif 610 611 return; 612 } 613 614 /* Get level 2 interrupt status */ 615 void 616 __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle, 617 u_int32_t *status /* Level 2 status */) 618 { 619 struct vrc4173bcu_softc *sc = vc->vc_sc; 620 struct vrc4173bcu_intrhand *ih = handle; 621 const struct vrc4173bcu_unit *vu = ih->ih_unit; 622 u_int32_t reg; 623 624 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_lreg); 625 reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_hreg) << 16); 626 *status = reg; 627 } 628 629 /* Set level 2 interrupt mask. */ 630 void 631 __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle, 632 u_int32_t mask /* Level 2 mask */, int onoff) 633 { 634 struct vrc4173bcu_softc *sc = vc->vc_sc; 635 struct vrc4173bcu_intrhand *ih = handle; 636 const struct vrc4173bcu_unit *vu = ih->ih_unit; 637 u_int16_t reg; 638 639 DPRINTF(("vrc4173bcu_intr_setmask2:\n")); 640 #ifdef VRC4173BCU_DEBUG 641 if (vrc4173bcu_debug) 642 vrc4173bcu_dump_level2mask(vc, handle); 643 #endif 644 if (vu->vu_mlreg) { 645 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg); 646 if (onoff) 647 reg |= (mask & 0xffff); 648 else 649 reg &= ~(mask & 0xffff); 650 bus_space_write_2(sc->sc_iot, sc->sc_ioh, vu->vu_mlreg, reg); 651 } 652 if (vu->vu_mhreg) { 653 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg); 654 if (onoff) 655 reg |= ((mask >> 16) & 0xffff); 656 else 657 reg &= ~((mask >> 16) & 0xffff); 658 bus_space_write_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg, reg); 659 } 660 #ifdef VRC4173BCU_DEBUG 661 if (vrc4173bcu_debug) 662 vrc4173bcu_dump_level2mask(vc, handle); 663 #endif 664 665 return; 666 } 667 668 int 669 __vrc4173bcu_clock(vrcmu_chipset_tag_t cc, u_int16_t mask, int onoff) 670 { 671 struct vrc4173bcu_softc *sc = cc->cc_sc; 672 u_int16_t reg; 673 674 reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK); 675 #if 0 676 printf("cmu register(enter):"); 677 dbg_bit_print(reg); 678 #endif 679 if (onoff) 680 reg |= mask; 681 else 682 reg &= ~mask; 683 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK, reg); 684 #if 0 685 printf("cmu register(exit) :"); 686 dbg_bit_print(reg); 687 #endif 688 return (0); 689 } 690 691 void 692 __vrc4173bcu_register_cmu(vrip_chipset_tag_t vc, vrcmu_chipset_tag_t cmu) 693 { 694 vc->vc_cc = cmu; 695 } 696 697 void 698 __vrc4173bcu_register_gpio(vrip_chipset_tag_t vc, hpcio_chip_t chip) 699 { 700 /* XXX, not implemented yet */ 701 } 702 703 void 704 __vrc4173bcu_register_dmaau(vrip_chipset_tag_t vc, vrdmaau_chipset_tag_t dmaau) 705 { 706 707 vc->vc_ac = dmaau; 708 } 709 710 void 711 __vrc4173bcu_register_dcu(vrip_chipset_tag_t vc, vrdcu_chipset_tag_t dcu) 712 { 713 714 vc->vc_dc = dcu; 715 } 716
Indexes created Wed Oct 01 18:09:54 GMT 2025