vrc4173bcu.c revision 1.22
1 /* $NetBSD: vrc4173bcu.c,v 1.22 2012/10/27 17:17:55 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 2001,2002 Enami Tsugutomo. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: vrc4173bcu.c,v 1.22 2012/10/27 17:17:55 chs Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 36 #include <machine/bus.h> 37 38 #include <dev/pci/pcivar.h> 39 #include <dev/pci/pcidevs.h> 40 41 #include <machine/platid.h> 42 #include <machine/platid_mask.h> 43 #include <machine/config_hook.h> 44 45 #include <hpcmips/vr/vripunit.h> 46 #include <hpcmips/vr/vripif.h> 47 #include <hpcmips/vr/vrc4173bcuvar.h> 48 #include <hpcmips/vr/vrc4173icureg.h> 49 #include <hpcmips/vr/vrc4173cmureg.h> 50 51 #include "locators.h" 52 53 #ifdef VRC4173BCU_DEBUG 54 #define DPRINTF_ENABLE 55 #define DPRINTF_DEBUG vrc4173bcu_debug 56 #endif 57 #define USE_HPC_DPRINTF 58 #include <machine/debug.h> 59 60 #define VRC4173BCU_BADR 0x10 61 #define USE_WINCE_CLKMASK (~0) 62 63 static int vrc4173bcu_match(device_t, cfdata_t, void *); 64 static void vrc4173bcu_attach(device_t, device_t, void *); 65 static int vrc4173bcu_intr(void *); 66 static int vrc4173bcu_print(void *, const char *); 67 static int vrc4173bcu_search(device_t, cfdata_t, const int *, void *); 68 static int vrc4173bcu_pci_intr(void *); 69 #ifdef VRC4173BCU_DEBUG 70 static void vrc4173bcu_dump_level2mask(vrip_chipset_tag_t, 71 vrip_intr_handle_t); 72 #endif 73 74 int __vrc4173bcu_power(vrip_chipset_tag_t, int, int); 75 vrip_intr_handle_t __vrc4173bcu_intr_establish(vrip_chipset_tag_t, int, int, 76 int, int(*)(void*), void*); 77 void __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t, vrip_intr_handle_t); 78 void __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t, vrip_intr_handle_t, int); 79 void __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t, vrip_intr_handle_t, 80 u_int32_t, int); 81 void __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t, vrip_intr_handle_t, 82 u_int32_t*); 83 void __vrc4173bcu_register_cmu(vrip_chipset_tag_t, vrcmu_chipset_tag_t); 84 void __vrc4173bcu_register_gpio(vrip_chipset_tag_t, hpcio_chip_t); 85 void __vrc4173bcu_register_dmaau(vrip_chipset_tag_t, vrdmaau_chipset_tag_t); 86 void __vrc4173bcu_register_dcu(vrip_chipset_tag_t, vrdcu_chipset_tag_t); 87 int __vrc4173bcu_clock(vrcmu_chipset_tag_t, u_int16_t, int); 88 89 /* 90 * machine dependent info 91 */ 92 static struct vrc4173bcu_platdep { 93 platid_mask_t *platidmask; 94 u_int32_t clkmask; 95 int intrmask; 96 } platdep_table[] = { 97 { 98 &platid_mask_MACH_VICTOR_INTERLINK_MPC303, 99 USE_WINCE_CLKMASK, /* clock mask */ 100 (1 << VRC4173ICU_USBINTR)| /* intrrupts */ 101 (1 << VRC4173ICU_PCMCIA1INTR)| 102 (1 << VRC4173ICU_PCMCIA2INTR), 103 }, 104 { 105 &platid_mask_MACH_VICTOR_INTERLINK_MPC304, 106 USE_WINCE_CLKMASK, /* clock mask */ 107 (1 << VRC4173ICU_USBINTR)| /* intrrupts */ 108 (1 << VRC4173ICU_PCMCIA1INTR)| 109 (1 << VRC4173ICU_PCMCIA2INTR), 110 }, 111 { 112 &platid_mask_MACH_NEC_MCR_SIGMARION2, 113 USE_WINCE_CLKMASK, /* clock mask */ 114 (1 << VRC4173ICU_USBINTR), /* intrrupts */ 115 }, 116 { 117 &platid_wild, 118 USE_WINCE_CLKMASK, /* XXX */ 119 -1, 120 }, 121 }; 122 123 struct vrc4173bcu_unit { 124 const char *vu_name; 125 int vu_intr[2]; 126 int vu_clkmask; 127 bus_addr_t vu_lreg; 128 bus_addr_t vu_mlreg; 129 bus_addr_t vu_hreg; 130 bus_addr_t vu_mhreg; 131 }; 132 133 struct vrc4173bcu_softc { 134 device_t sc_dev; 135 struct vrip_chipset_tag sc_chipset; 136 struct vrcmu_chipset_tag sc_cmuchip; 137 138 pci_chipset_tag_t sc_pc; 139 bus_space_tag_t sc_iot; 140 bus_space_handle_t sc_ioh; 141 bus_size_t sc_size; 142 143 bus_space_handle_t sc_icuh; /* I/O handle for ICU. */ 144 bus_space_handle_t sc_cmuh; /* I/O handle for CMU. */ 145 void *sc_ih; 146 #define VRC4173BCU_NINTRS 16 147 int sc_intrmask; 148 struct vrc4173bcu_intrhand { 149 int (*ih_fun)(void *); 150 void *ih_arg; 151 const struct vrc4173bcu_unit *ih_unit; 152 } sc_intrhands[32]; 153 154 struct vrc4173bcu_unit *sc_units; 155 int sc_nunits; 156 int sc_pri; 157 158 struct vrc4173bcu_platdep *sc_platdep; 159 }; 160 161 #define VALID_UNIT(sc, unit) (0 <= (unit) && (unit) < (sc)->sc_nunits) 162 163 static struct vrc4173bcu_unit vrc4173bcu_units[] = { 164 [VRIP_UNIT_KIU] = { 165 "kiu", 166 { VRC4173ICU_KIUINTR, }, 167 VRC4173CMU_CLKMSK_KIU, 168 VRC4173ICU_KIUINT, VRC4173ICU_MKIUINT, 169 }, 170 [VRIP_UNIT_PIU] = { 171 "piu", 172 { VRC4173ICU_PIUINTR, VRC4173ICU_DOZEPIUINTR}, 173 VRC4173CMU_CLKMSK_PIU, 174 VRC4173ICU_PIUINT, VRC4173ICU_MPIUINT, 175 }, 176 [VRIP_UNIT_AIU] = { 177 "aiu", 178 { VRC4173ICU_AIUINTR, }, 179 VRC4173CMU_CLKMSK_AIU, 180 VRC4173ICU_AIUINT, VRC4173ICU_MAIUINT, 181 }, 182 [VRIP_UNIT_GIU] = { 183 "giu", 184 { VRC4173ICU_GIUINTR, }, 185 0, 186 VRC4173ICU_GIULINT, VRC4173ICU_MGIULINT, 187 VRC4173ICU_GIUHINT, VRC4173ICU_MGIUHINT, 188 }, 189 [VRIP_UNIT_PS2U0] = { 190 "PS/2-Ch1", 191 { VRC4173ICU_PS2CH1INTR, }, 192 VRC4173CMU_CLKMSK_PS2CH1, 193 }, 194 [VRIP_UNIT_PS2U1] = { 195 "PS/2-Ch2", 196 { VRC4173ICU_PS2CH2INTR, }, 197 VRC4173CMU_CLKMSK_PS2CH2, 198 }, 199 [VRIP_UNIT_USBU] = { 200 "usbu", 201 { VRC4173ICU_USBINTR, }, 202 VRC4173CMU_CLKMSK_USB, 203 }, 204 [VRIP_UNIT_CARDU0] = { 205 "cardu0", 206 { VRC4173ICU_PCMCIA1INTR, }, 207 VRC4173CMU_CLKMSK_CARD1, 208 }, 209 [VRIP_UNIT_CARDU1] = { 210 "cardu1", 211 { VRC4173ICU_PCMCIA2INTR, }, 212 VRC4173CMU_CLKMSK_CARD2, 213 }, 214 }; 215 216 CFATTACH_DECL_NEW(vrc4173bcu, sizeof(struct vrc4173bcu_softc), 217 vrc4173bcu_match, vrc4173bcu_attach, NULL, NULL); 218 219 static const struct vrip_chipset_tag vrc4173bcu_chipset_methods = { 220 .vc_power = __vrc4173bcu_power, 221 .vc_intr_establish = __vrc4173bcu_intr_establish, 222 .vc_intr_disestablish = __vrc4173bcu_intr_disestablish, 223 .vc_intr_setmask1 = __vrc4173bcu_intr_setmask1, 224 .vc_intr_setmask2 = __vrc4173bcu_intr_setmask2, 225 .vc_intr_getstatus2 = __vrc4173bcu_intr_getstatus2, 226 .vc_register_cmu = __vrc4173bcu_register_cmu, 227 .vc_register_gpio = __vrc4173bcu_register_gpio, 228 .vc_register_dmaau = __vrc4173bcu_register_dmaau, 229 .vc_register_dcu = __vrc4173bcu_register_dcu, 230 }; 231 232 int 233 vrc4173bcu_match(device_t parent, cfdata_t match, void *aux) 234 { 235 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 236 237 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NEC && 238 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NEC_VRC4173_BCU) 239 return (1); 240 241 return (0); 242 } 243 244 void 245 vrc4173bcu_attach(device_t parent, device_t self, void *aux) 246 { 247 struct vrc4173bcu_softc *sc = device_private(self); 248 struct pci_attach_args *pa = aux; 249 pci_chipset_tag_t pc = pa->pa_pc; 250 pcitag_t tag = pa->pa_tag; 251 pcireg_t csr; 252 char devinfo[256]; 253 u_int16_t reg; 254 pci_intr_handle_t ih; 255 const char *intrstr; 256 int bus, device, function; 257 #ifdef DEBUG 258 char buf[80]; 259 #endif 260 261 sc->sc_dev = self; 262 263 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 264 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 265 266 #if 0 267 printf("%s: ", device_xname(self)); 268 pci_conf_print(pa->pa_pc, pa->pa_tag, NULL); 269 #endif 270 271 sc->sc_pc = pc; 272 sc->sc_cmuchip.cc_sc = sc; 273 sc->sc_cmuchip.cc_clock = __vrc4173bcu_clock; 274 sc->sc_units = vrc4173bcu_units; 275 sc->sc_nunits = sizeof(vrc4173bcu_units)/sizeof(struct vrc4173bcu_unit); 276 sc->sc_chipset = vrc4173bcu_chipset_methods; /* structure assignment */ 277 sc->sc_chipset.vc_sc = sc; 278 279 sc->sc_platdep = platid_search(&platid, platdep_table, 280 sizeof(platdep_table)/sizeof(*platdep_table), 281 sizeof(*platdep_table)); 282 283 /* Map I/O registers */ 284 if (pci_mapreg_map(pa, VRC4173BCU_BADR, PCI_MAPREG_TYPE_IO, 0, 285 &sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) { 286 printf("%s: can't map mem space\n", device_xname(self)); 287 return; 288 } 289 290 /* Enable the device. */ 291 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 292 DPRINTF(("%s: csr = 0x%08x", device_xname(self), csr)); 293 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 294 csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE); 295 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 296 DPRINTF((" -> 0x%08x\n", csr)); 297 298 csr = pci_conf_read(pc, tag, VRC4173BCU_BADR); 299 DPRINTF(("%s: base addr = %x@0x%08x\n", device_xname(self), 300 (int)sc->sc_size, csr)); 301 DPRINTF(("%s: iot = 0x%08x, ioh = 0x%08x\n", device_xname(self), 302 (int)sc->sc_iot, (int)sc->sc_ioh)); 303 304 /* 305 * Map I/O space for ICU. 306 */ 307 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 308 VRC4173ICU_IOBASE, VRC4173ICU_IOSIZE, &sc->sc_icuh)) { 309 printf(": can't map ICU i/o space\n"); 310 return; 311 } 312 313 /* 314 * Map I/O space for CMU. 315 */ 316 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 317 VRC4173CMU_IOBASE, VRC4173CMU_IOSIZE, &sc->sc_cmuh)) { 318 printf(": can't map CMU i/o space\n"); 319 return; 320 } 321 322 /* machine dependent setup */ 323 if (sc->sc_platdep->clkmask == USE_WINCE_CLKMASK) { 324 /* XXX, You can nothing! */ 325 reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh, 326 VRC4173CMU_CLKMSK); 327 printf("%s: default clock mask is %04x\n", 328 device_xname(self), reg); 329 } else { 330 /* assert all reset bits */ 331 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 332 VRC4173CMU_SRST_AC97 | VRC4173CMU_SRST_USB | 333 VRC4173CMU_SRST_CARD2 | VRC4173CMU_SRST_CARD1); 334 /* set clock mask */ 335 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, 336 VRC4173CMU_CLKMSK, sc->sc_platdep->clkmask); 337 /* clear reset bit */ 338 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 0); 339 } 340 341 #ifdef DEBUG 342 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1); 343 snprintb(buf, sizeof(buf), 344 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 345 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg); 346 printf("%s: SYSINT1 = 0x%s\n", device_xname(self), buf); 347 348 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MKIUINT); 349 snprintb(buf, sizeof(buf), 350 "\20\1SCANINT\2KDATRDY\3KDATLOST\4B3\5B4\6B5\7B6\10B7" 351 "\11B8\12B9\13B10\14B11\15B12\16B13\17B14\20B15", reg); 352 printf("%s: MKIUINT = 0x%s\n", device_xname(self), buf); 353 354 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1); 355 snprintb(buf, sizeof(buf), 356 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 357 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg); 358 printf("%s: MSYSINT1 = 0x%s\n", device_xname(self), buf); 359 360 #if 1 361 reg = VRC4173ICU_USBINTR | VRC4173ICU_PIUINTR | VRC4173ICU_KIUINTR | 362 VRC4173ICU_DOZEPIUINTR; 363 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, reg); 364 365 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1); 366 snprintb(buf, sizeof(buf), 367 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 368 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg); 369 printf("%s: MSYSINT1 = 0x%s\n", device_xname(self), buf); 370 #endif 371 #endif 372 373 /* 374 * set interrupt mask 375 */ 376 sc->sc_intrmask = sc->sc_platdep->intrmask; 377 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, 378 sc->sc_intrmask); 379 380 /* 381 * install interrupt handler 382 */ 383 if (pci_intr_map(pa, &ih)) { 384 printf("%s: couldn't map interrupt\n", device_xname(self)); 385 return; 386 } 387 intrstr = pci_intr_string(pc, ih); 388 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, vrc4173bcu_intr, sc); 389 if (sc->sc_ih == NULL) { 390 printf("%s: couldn't establish interrupt", 391 device_xname(self)); 392 if (intrstr != NULL) 393 printf(" at %s", intrstr); 394 printf("\n"); 395 return; 396 } 397 printf("%s: interrupting at %s\n", device_xname(self), intrstr); 398 399 /* 400 * install pci intr hooks 401 */ 402 pci_decompose_tag(pc, pa->pa_intrtag, &bus, &device, &function); 403 /* USB unit */ 404 if (sc->sc_intrmask & (1 << VRC4173ICU_USBINTR)) 405 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_USBU, 0, 406 IPL_NET, vrc4173bcu_pci_intr, 407 config_connect(CONFIG_HOOK_PCIINTR, 408 CONFIG_HOOK_PCIINTR_ID(bus, device, 2))); 409 /* PC card unit 1 */ 410 if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA1INTR)) 411 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU0, 0, 412 IPL_NET, vrc4173bcu_pci_intr, 413 config_connect(CONFIG_HOOK_PCIINTR, 414 CONFIG_HOOK_PCIINTR_ID(bus, 1, 0))); 415 /* PC card unit 2 */ 416 if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA2INTR)) 417 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU1, 0, 418 IPL_NET, vrc4173bcu_pci_intr, 419 config_connect(CONFIG_HOOK_PCIINTR, 420 CONFIG_HOOK_PCIINTR_ID(bus, 2, 0))); 421 422 /* 423 * Attach each devices 424 * sc->sc_pri = 2~1 425 */ 426 for (sc->sc_pri = 2; 0 < sc->sc_pri; sc->sc_pri--) 427 config_search_ia(vrc4173bcu_search, self, "vripif", 428 vrc4173bcu_print); 429 } 430 431 int 432 vrc4173bcu_print(void *aux, const char *hoge) 433 { 434 struct vrip_attach_args *va = (struct vrip_attach_args*)aux; 435 436 if (va->va_addr != VRIPIFCF_ADDR_DEFAULT) 437 aprint_normal(" addr 0x%04lx", va->va_addr); 438 if (va->va_size != VRIPIFCF_SIZE_DEFAULT) 439 aprint_normal("-%04lx", 440 (va->va_addr + va->va_size - 1) & 0xffff); 441 if (va->va_addr2 != VRIPIFCF_ADDR2_DEFAULT) 442 aprint_normal(", 0x%04lx", va->va_addr2); 443 if (va->va_size2 != VRIPIFCF_SIZE2_DEFAULT) 444 aprint_normal("-%04lx", 445 (va->va_addr2 + va->va_size2 - 1) & 0xffff); 446 447 return (UNCONF); 448 } 449 450 int 451 vrc4173bcu_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 452 { 453 struct vrc4173bcu_softc *sc = device_private(parent); 454 struct vrip_attach_args va; 455 456 memset(&va, 0, sizeof(va)); 457 va.va_vc = &sc->sc_chipset; 458 va.va_iot = sc->sc_iot; 459 va.va_parent_ioh = sc->sc_ioh; 460 va.va_unit = cf->cf_loc[VRIPIFCF_UNIT]; 461 va.va_addr = cf->cf_loc[VRIPIFCF_ADDR]; 462 va.va_size = cf->cf_loc[VRIPIFCF_SIZE]; 463 va.va_addr2 = cf->cf_loc[VRIPIFCF_ADDR2]; 464 va.va_size2 = cf->cf_loc[VRIPIFCF_SIZE2]; 465 va.va_gpio_chips = NULL; /* XXX */ 466 va.va_cc = sc->sc_chipset.vc_cc; 467 va.va_ac = sc->sc_chipset.vc_ac; 468 va.va_dc = sc->sc_chipset.vc_dc; 469 if ((config_match(parent, cf, &va) == sc->sc_pri)) 470 config_attach(parent, cf, &va, vrc4173bcu_print); 471 472 return (0); 473 } 474 475 int 476 vrc4173bcu_intr(void *arg) 477 { 478 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)arg; 479 u_int16_t reg; 480 struct vrc4173bcu_intrhand *ih; 481 int i; 482 483 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1); 484 reg &= sc->sc_intrmask; 485 if (reg == 0) 486 return (0); 487 488 #if 0 489 { 490 char buf[80]; 491 snprintb(buf, sizeof(buf), 492 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 493 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg); 494 printf("%s: %s\n", device_xname(sc->sc_dev), buf); 495 } 496 #endif 497 for (ih = sc->sc_intrhands, i = 0; i < VRC4173BCU_NINTRS; i++, ih++) 498 if ((reg & (1 << i)) && ih->ih_fun != NULL) 499 ih->ih_fun(ih->ih_arg); 500 501 return (1); 502 } 503 504 static int 505 vrc4173bcu_pci_intr(void *arg) 506 { 507 config_call_tag ct = (config_call_tag)arg; 508 config_connected_call(ct, NULL); 509 510 return (0); 511 } 512 513 #ifdef VRC4173BCU_DEBUG 514 static void 515 vrc4173bcu_dump_level2mask(vrip_chipset_tag_t vc, vrip_intr_handle_t handle) 516 { 517 struct vrc4173bcu_softc *sc = vc->vc_sc; 518 struct vrc4173bcu_intrhand *ih = handle; 519 const struct vrc4173bcu_unit *vu = ih->ih_unit; 520 u_int32_t reg; 521 522 if (vu->vu_mlreg) { 523 DPRINTF(("level1[%d] level2 mask:", vu->vu_intr[0])); 524 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg); 525 if (vu->vu_mhreg) { 526 reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh, 527 vu->vu_mhreg) << 16); 528 dbg_bit_print(reg); 529 } else 530 dbg_bit_print(reg); 531 } 532 } 533 #endif 534 535 int 536 __vrc4173bcu_power(vrip_chipset_tag_t vc, int unit, int onoff) 537 { 538 struct vrc4173bcu_softc *sc = vc->vc_sc; 539 const struct vrc4173bcu_unit *vu; 540 541 if (sc->sc_chipset.vc_cc == NULL) 542 return (0); /* You have no clock mask unit yet. */ 543 if (!VALID_UNIT(sc, unit)) 544 return (0); 545 vu = &sc->sc_units[unit]; 546 547 return (*sc->sc_chipset.vc_cc->cc_clock)(sc->sc_chipset.vc_cc, 548 vu->vu_clkmask, onoff); 549 } 550 551 vrip_intr_handle_t 552 __vrc4173bcu_intr_establish(vrip_chipset_tag_t vc, int unit, int line, 553 int level, int (*ih_fun)(void *), void *ih_arg) 554 { 555 struct vrc4173bcu_softc *sc = vc->vc_sc; 556 const struct vrc4173bcu_unit *vu; 557 struct vrc4173bcu_intrhand *ih; 558 559 if (!VALID_UNIT(sc, unit)) 560 return (NULL); 561 vu = &sc->sc_units[unit]; 562 ih = &sc->sc_intrhands[vu->vu_intr[line]]; 563 if (ih->ih_fun) /* Can't share level 1 interrupt */ 564 return (NULL); 565 ih->ih_fun = ih_fun; 566 ih->ih_arg = ih_arg; 567 ih->ih_unit = vu; 568 569 /* Mask level 2 interrupt mask register. (disable interrupt) */ 570 vrip_intr_setmask2(vc, ih, ~0, 0); 571 /* Unmask Level 1 interrupt mask register (enable interrupt) */ 572 vrip_intr_setmask1(vc, ih, 1); 573 574 return ((void *)ih); 575 } 576 577 void 578 __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t vc, vrip_intr_handle_t handle) 579 { 580 struct vrc4173bcu_intrhand *ih = handle; 581 582 /* Mask Level 1 interrupt mask register (disable interrupt) */ 583 vrip_intr_setmask1(vc, ih, 0); 584 /* Mask level 2 interrupt mask register(if any). (disable interrupt) */ 585 vrip_intr_setmask2(vc, ih, ~0, 0); 586 ih->ih_fun = NULL; 587 ih->ih_arg = NULL; 588 } 589 590 /* Set level 1 interrupt mask. */ 591 void 592 __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t vc, vrip_intr_handle_t handle, 593 int enable) 594 { 595 struct vrc4173bcu_softc *sc = vc->vc_sc; 596 struct vrc4173bcu_intrhand *ih = handle; 597 int level1 = ih - sc->sc_intrhands; 598 599 DPRINTF(("__vrc4173bcu_intr_setmask1: SYSINT: %s %d\n", 600 enable ? "enable" : "disable", level1)); 601 if (enable) 602 sc->sc_intrmask |= (1 << level1); 603 else 604 sc->sc_intrmask &= ~(1 << level1); 605 bus_space_write_2 (sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, 606 sc->sc_intrmask); 607 #ifdef VRC4173BCU_DEBUG 608 if (vrc4173bcu_debug) 609 dbg_bit_print(sc->sc_intrmask); 610 #endif 611 612 return; 613 } 614 615 /* Get level 2 interrupt status */ 616 void 617 __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle, 618 u_int32_t *status /* Level 2 status */) 619 { 620 struct vrc4173bcu_softc *sc = vc->vc_sc; 621 struct vrc4173bcu_intrhand *ih = handle; 622 const struct vrc4173bcu_unit *vu = ih->ih_unit; 623 u_int32_t reg; 624 625 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_lreg); 626 reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_hreg) << 16); 627 *status = reg; 628 } 629 630 /* Set level 2 interrupt mask. */ 631 void 632 __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle, 633 u_int32_t mask /* Level 2 mask */, int onoff) 634 { 635 struct vrc4173bcu_softc *sc = vc->vc_sc; 636 struct vrc4173bcu_intrhand *ih = handle; 637 const struct vrc4173bcu_unit *vu = ih->ih_unit; 638 u_int16_t reg; 639 640 DPRINTF(("vrc4173bcu_intr_setmask2:\n")); 641 #ifdef VRC4173BCU_DEBUG 642 if (vrc4173bcu_debug) 643 vrc4173bcu_dump_level2mask(vc, handle); 644 #endif 645 if (vu->vu_mlreg) { 646 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg); 647 if (onoff) 648 reg |= (mask & 0xffff); 649 else 650 reg &= ~(mask & 0xffff); 651 bus_space_write_2(sc->sc_iot, sc->sc_ioh, vu->vu_mlreg, reg); 652 } 653 if (vu->vu_mhreg) { 654 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg); 655 if (onoff) 656 reg |= ((mask >> 16) & 0xffff); 657 else 658 reg &= ~((mask >> 16) & 0xffff); 659 bus_space_write_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg, reg); 660 } 661 #ifdef VRC4173BCU_DEBUG 662 if (vrc4173bcu_debug) 663 vrc4173bcu_dump_level2mask(vc, handle); 664 #endif 665 666 return; 667 } 668 669 int 670 __vrc4173bcu_clock(vrcmu_chipset_tag_t cc, u_int16_t mask, int onoff) 671 { 672 struct vrc4173bcu_softc *sc = cc->cc_sc; 673 u_int16_t reg; 674 675 reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK); 676 #if 0 677 printf("cmu register(enter):"); 678 dbg_bit_print(reg); 679 #endif 680 if (onoff) 681 reg |= mask; 682 else 683 reg &= ~mask; 684 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK, reg); 685 #if 0 686 printf("cmu register(exit) :"); 687 dbg_bit_print(reg); 688 #endif 689 return (0); 690 } 691 692 void 693 __vrc4173bcu_register_cmu(vrip_chipset_tag_t vc, vrcmu_chipset_tag_t cmu) 694 { 695 vc->vc_cc = cmu; 696 } 697 698 void 699 __vrc4173bcu_register_gpio(vrip_chipset_tag_t vc, hpcio_chip_t chip) 700 { 701 /* XXX, not implemented yet */ 702 } 703 704 void 705 __vrc4173bcu_register_dmaau(vrip_chipset_tag_t vc, vrdmaau_chipset_tag_t dmaau) 706 { 707 708 vc->vc_ac = dmaau; 709 } 710 711 void 712 __vrc4173bcu_register_dcu(vrip_chipset_tag_t vc, vrdcu_chipset_tag_t dcu) 713 { 714 715 vc->vc_dc = dcu; 716 } 717
Indexes created Wed Oct 01 18:09:54 GMT 2025