vrc4173bcu.c revision 1.5
1 /* $NetBSD: vrc4173bcu.c,v 1.5 2002/01/06 07:01:20 takemura Exp $ */ 2 3 /*- 4 * Copyright (c) 2001,2002 Enami Tsugutomo. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/device.h> 32 33 #include <machine/bus.h> 34 35 #include <dev/pci/pcivar.h> 36 #include <dev/pci/pcidevs.h> 37 38 #include <machine/platid.h> 39 #include <machine/platid_mask.h> 40 41 #include <hpcmips/vr/vrc4173bcuvar.h> 42 #include <hpcmips/vr/vrc4173icureg.h> 43 #include <hpcmips/vr/vrc4173cmureg.h> 44 45 #define VRC4173BCU_BADR 0x10 46 #ifdef DEBUG 47 #define DPRINTF(args) printf args 48 #else 49 #define DPRINTF(args) 50 #endif 51 52 #define USE_WINCE_CLKMASK (~0) 53 54 static int vrc4173bcu_match(struct device *, struct cfdata *, void *); 55 static void vrc4173bcu_attach(struct device *, struct device *, void *); 56 static int vrc4173bcu_print(void *, const char *); 57 58 /* 59 * machine dependent info 60 */ 61 static struct vrc4173bcu_platdep { 62 platid_mask_t *platidmask; 63 u_int32_t clkmask; 64 int intr_port; /* GPIO port to which VRCINT is connected to. XXX */ 65 } platdep_table[] = { 66 { 67 &platid_mask_MACH_VICTOR_INTERLINK_MPC303, 68 USE_WINCE_CLKMASK, /* clock mask */ 69 1, /* intrrupt port# */ 70 }, 71 { 72 &platid_mask_MACH_VICTOR_INTERLINK_MPC304, 73 USE_WINCE_CLKMASK, /* clock mask */ 74 1, /* intrrupt port# */ 75 }, 76 { 77 &platid_mask_MACH_NEC_MCR_SIGMARION2, 78 USE_WINCE_CLKMASK, /* clock mask */ 79 0, /* intrrupt port# */ 80 }, 81 { 82 &platid_wild, 83 USE_WINCE_CLKMASK, /* XXX */ 84 -1, 85 }, 86 }; 87 88 struct vrc4173bcu_softc { 89 struct device sc_dev; 90 91 pci_chipset_tag_t sc_pc; 92 bus_space_tag_t sc_iot; 93 bus_space_handle_t sc_ioh; 94 bus_size_t sc_size; 95 96 bus_space_handle_t sc_icuh; /* I/O handle for ICU. */ 97 bus_space_handle_t sc_cmuh; /* I/O handle for CMU. */ 98 void *sc_ih; 99 100 #define VRC4173BCU_NINTRHAND (16) /* XXX */ 101 struct intrhand { 102 int (*ih_func)(void *); 103 void *ih_arg; 104 } sc_intrhand[VRC4173BCU_NINTRHAND]; 105 int sc_intrmask; 106 107 struct vrc4173bcu_platdep *sc_platdep; 108 }; 109 110 struct cfattach vrc4173bcu_ca = { 111 sizeof(struct vrc4173bcu_softc), vrc4173bcu_match, vrc4173bcu_attach, 112 }; 113 114 int 115 vrc4173bcu_match(struct device *parent, struct cfdata *match, void *aux) 116 { 117 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 118 119 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NEC && 120 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NEC_VRC4173_BCU) 121 return (1); 122 123 return (0); 124 } 125 126 void 127 vrc4173bcu_attach(struct device *parent, struct device *self, void *aux) 128 { 129 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)self; 130 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 131 pci_chipset_tag_t pc = pa->pa_pc; 132 pcitag_t tag = pa->pa_tag; 133 pcireg_t csr; 134 char devinfo[256]; 135 int i; 136 u_int16_t reg; 137 #ifdef DEBUG 138 char buf[80]; 139 #endif 140 141 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 142 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 143 144 #if 0 145 printf("%s: ", sc->sc_dev.dv_xname); 146 pci_conf_print(pa->pa_pc, pa->pa_tag, NULL); 147 #endif 148 149 csr = pci_conf_read(pc, tag, VRC4173BCU_BADR); 150 DPRINTF(("%s: base addr = 0x%08x\n", sc->sc_dev.dv_xname, csr)); 151 152 sc->sc_platdep = platid_search(&platid, platdep_table, 153 sizeof(platdep_table)/sizeof(*platdep_table), 154 sizeof(*platdep_table)); 155 156 /* Map I/O registers */ 157 if (pci_mapreg_map(pa, VRC4173BCU_BADR, PCI_MAPREG_TYPE_IO, 0, 158 &sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) { 159 printf("%s: can't map mem space\n", sc->sc_dev.dv_xname); 160 return; 161 } 162 163 sc->sc_pc = pc; 164 165 /* Enable the device. */ 166 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 167 DPRINTF(("%s: csr = 0x%08x", sc->sc_dev.dv_xname, csr)); 168 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 169 csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE); 170 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 171 DPRINTF((" -> 0x%08x\n", csr)); 172 173 csr = pci_conf_read(pc, tag, VRC4173BCU_BADR); 174 DPRINTF(("%s: base addr = %x@0x%08x\n", sc->sc_dev.dv_xname, 175 (int)sc->sc_size, csr)); 176 DPRINTF(("%s: iot = 0x%08x, ioh = 0x%08x\n", sc->sc_dev.dv_xname, 177 (int)sc->sc_iot, (int)sc->sc_ioh)); 178 179 /* 180 * Map I/O space for ICU. 181 */ 182 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 183 VRC4173ICU_IOBASE, VRC4173ICU_IOSIZE, &sc->sc_icuh)) { 184 printf(": can't map ICU i/o space\n"); 185 return; 186 } 187 188 /* 189 * Map I/O space for CMU. 190 */ 191 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 192 VRC4173CMU_IOBASE, VRC4173CMU_IOSIZE, &sc->sc_cmuh)) { 193 printf(": can't map CMU i/o space\n"); 194 return; 195 } 196 197 /* machine dependent setup */ 198 if (sc->sc_platdep->clkmask == USE_WINCE_CLKMASK) { 199 /* XXX, You can nothing! */ 200 reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh, 201 VRC4173CMU_CLKMSK); 202 printf("%s: default clock mask is %04x\n", 203 sc->sc_dev.dv_xname, reg); 204 } else { 205 /* assert all reset bits */ 206 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 207 VRC4173CMU_SRST_AC97 | VRC4173CMU_SRST_USB | 208 VRC4173CMU_SRST_CARD2 | VRC4173CMU_SRST_CARD1); 209 /* set clock mask */ 210 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, 211 VRC4173CMU_CLKMSK, sc->sc_platdep->clkmask); 212 /* clear reset bit */ 213 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 0); 214 } 215 216 #ifdef DEBUG 217 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1); 218 bitmask_snprintf(reg, 219 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 220 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 221 buf, sizeof(buf)); 222 printf("%s: SYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf); 223 224 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MKIUINT); 225 bitmask_snprintf(reg, 226 "\20\1SCANINT\2KDATRDY\3KDATLOST\4B3\5B4\6B5\7B6\10B7" 227 "\11B8\12B9\13B10\14B11\15B12\16B13\17B14\20B15", 228 buf, sizeof(buf)); 229 printf("%s: MKIUINT = 0x%s\n", sc->sc_dev.dv_xname, buf); 230 231 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1); 232 bitmask_snprintf(reg, 233 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 234 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 235 buf, sizeof(buf)); 236 printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf); 237 238 #if 1 239 reg = VRC4173ICU_USBINTR | VRC4173ICU_PIUINTR | VRC4173ICU_KIUINTR | 240 VRC4173ICU_DOZEPIUINTR; 241 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, reg); 242 243 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1); 244 bitmask_snprintf(reg, 245 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 246 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 247 buf, sizeof(buf)); 248 printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf); 249 #endif 250 #endif 251 252 for (i = 0; i < VRC4173BCU_NINTRHAND; i++) 253 sc->sc_intrhand[i].ih_func = NULL; 254 sc->sc_intrmask = 0; 255 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, 256 sc->sc_intrmask); 257 258 /* 259 * Attach sub units found in vrc4173. XXX. 260 */ 261 config_found(self, "vrc4173cmu", vrc4173bcu_print); 262 config_found(self, "vrc4173giu", vrc4173bcu_print); 263 config_found(self, "vrc4173piu", vrc4173bcu_print); 264 config_found(self, "vrc4173kiu", vrc4173bcu_print); 265 config_found(self, "vrc4173aiu", vrc4173bcu_print); 266 config_found(self, "vrc4173ps2u", vrc4173bcu_print); 267 268 /* 269 * Establish VRCINT interrupt. Normally connected to one of 270 * GPIO pin in VR41xx. XXX. 271 */ 272 if (0 <= sc->sc_platdep->intr_port) { 273 sc->sc_ih = pci_vrcintr_establish(pc, 274 sc->sc_platdep->intr_port, vrc4173bcu_intr, sc); 275 if (sc->sc_ih != NULL) 276 printf("%s: interrupting at %p\n", sc->sc_dev.dv_xname, 277 sc->sc_ih); 278 } else { 279 printf("%s: interrupt port isn't specified\n", 280 sc->sc_dev.dv_xname); 281 } 282 } 283 284 int 285 vrc4173bcu_print(void *aux, const char *pnp) 286 { 287 const char *name = aux; 288 289 if (pnp) 290 printf("%s at %s", name, pnp); 291 292 return (UNCONF); 293 } 294 295 int 296 vrc4173bcu_intr(void *arg) 297 { 298 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)arg; 299 struct intrhand *ih; 300 u_int16_t reg; 301 int i, handled; 302 303 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1); 304 if (reg == 0) 305 return (0); 306 307 #if 0 308 { 309 char buf[80]; 310 bitmask_snprintf(reg, 311 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 312 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 313 buf, sizeof(buf)); 314 printf("%s: %s\n", sc->sc_dev.dv_xname, buf); 315 } 316 #endif 317 for (handled = i = 0; i < VRC4173BCU_NINTRHAND; i++) { 318 ih = &sc->sc_intrhand[i]; 319 if (ih->ih_func != NULL && (reg & (1 << i)) != 0) { 320 handled = 1; 321 (*ih->ih_func)(ih->ih_arg); 322 } 323 } 324 325 return (handled); 326 } 327 328 void * 329 vrc4173bcu_intr_establish(struct vrc4173bcu_softc *sc, int kind, 330 int (*func)(void *), void *arg) 331 { 332 struct intrhand *ih; 333 334 DPRINTF(("vrc4173bcu_intr_establish: %d, %p, %p\n", kind, func, arg)); 335 if (kind < 0 || kind >= VRC4173BCU_NINTRHAND) 336 return (NULL); 337 338 ih = &sc->sc_intrhand[kind]; 339 if (ih->ih_func != NULL) 340 return (NULL); 341 342 ih->ih_func = func; 343 ih->ih_arg = arg; 344 sc->sc_intrmask |= (1 << kind); 345 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, 346 sc->sc_intrmask); 347 348 return (ih); 349 } 350 351 void 352 vrc4173bcu_intr_disestablish(struct vrc4173bcu_softc *sc, void *ihp) 353 { 354 struct intrhand *ih = ihp; 355 356 if (ih < &sc->sc_intrhand[0] || 357 ih >= &sc->sc_intrhand[VRC4173BCU_NINTRHAND]) 358 return; 359 360 ih->ih_func = NULL; 361 sc->sc_intrmask &= ~(1 << (ih - &sc->sc_intrhand[0])); 362 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, 363 sc->sc_intrmask); 364 } 365 366 int 367 vrc4173bcu_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 368 { 369 pci_chipset_tag_t pc = pa->pa_pc; 370 pcitag_t intrtag = pa->pa_intrtag; 371 int bus, dev, func; 372 #ifdef DEBUG 373 int line = pa->pa_intrline; 374 int pin = pa->pa_intrpin; 375 #endif 376 377 pci_decompose_tag(pc, intrtag, &bus, &dev, &func); 378 DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", pc->pc_dev->dv_xname, 379 bus, dev, func, line, pin)); 380 381 *ihp = -1; 382 switch (dev) { 383 case 1: /* CARDU0 */ 384 *ihp = VRC4173ICU_PCMCIA1INTR; 385 break; 386 case 2: /* CARDU1 */ 387 *ihp = VRC4173ICU_PCMCIA2INTR; 388 break; 389 case 12: /* VRC4173 (SigmarionII) */ 390 case 19: /* VRC4173 (MP-C303) */ 391 switch (func) { 392 case 2: 393 *ihp = VRC4173ICU_USBINTR; 394 break; 395 } 396 break; 397 } 398 399 return (*ihp == -1); 400 } 401 402 const char * 403 vrc4173bcu_pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 404 { 405 static char irqstr[8 + sizeof("vrc4173 intr")]; 406 407 snprintf(irqstr, sizeof(irqstr), "vrc4173 intr %d", (int)ih); 408 return (irqstr); 409 } 410 411 const struct evcnt * 412 vrc4173bcu_pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 413 { 414 415 /* XXX for now, no evcnt parent reported */ 416 return (NULL); 417 } 418 419
Indexes created Wed Oct 01 18:09:54 GMT 2025