vrc4173bcu.c revision 1.7
1 /* $NetBSD: vrc4173bcu.c,v 1.7 2002/03/10 07:24:54 takemura Exp $ */ 2 3 /*- 4 * Copyright (c) 2001,2002 Enami Tsugutomo. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/device.h> 32 33 #include <machine/bus.h> 34 35 #include <dev/pci/pcivar.h> 36 #include <dev/pci/pcidevs.h> 37 38 #include <machine/platid.h> 39 #include <machine/platid_mask.h> 40 #include <machine/config_hook.h> 41 42 #include <hpcmips/vr/vripunit.h> 43 #include <hpcmips/vr/vripif.h> 44 #include <hpcmips/vr/vrc4173bcuvar.h> 45 #include <hpcmips/vr/vrc4173icureg.h> 46 #include <hpcmips/vr/vrc4173cmureg.h> 47 48 #ifdef VRC4173BCU_DEBUG 49 #define DPRINTF_ENABLE 50 #define DPRINTF_DEBUG vrc4173bcu_debug 51 #endif 52 #define USE_HPC_DPRINTF 53 #include <machine/debug.h> 54 55 #define VRC4173BCU_BADR 0x10 56 #define USE_WINCE_CLKMASK (~0) 57 58 static int vrc4173bcu_match(struct device *, struct cfdata *, void *); 59 static void vrc4173bcu_attach(struct device *, struct device *, void *); 60 static int vrc4173bcu_intr(void *); 61 static int vrc4173bcu_print(void *, const char *); 62 static int vrc4173bcu_search(struct device *, struct cfdata *cf, void *); 63 static int vrc4173bcu_pci_intr(void *); 64 #ifdef VRC4173BCU_DEBUG 65 static void vrc4173bcu_dump_level2mask(vrip_chipset_tag_t, 66 vrip_intr_handle_t); 67 #endif 68 69 int __vrc4173bcu_power(vrip_chipset_tag_t, int, int); 70 vrip_intr_handle_t __vrc4173bcu_intr_establish(vrip_chipset_tag_t, int, int, 71 int, int(*)(void*), void*); 72 void __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t, vrip_intr_handle_t); 73 void __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t, vrip_intr_handle_t, int); 74 void __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t, vrip_intr_handle_t, 75 u_int32_t, int); 76 void __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t, vrip_intr_handle_t, 77 u_int32_t*); 78 void __vrc4173bcu_register_cmu(vrip_chipset_tag_t, vrcmu_chipset_tag_t); 79 void __vrc4173bcu_register_gpio(vrip_chipset_tag_t, hpcio_chip_t); 80 void __vrc4173bcu_register_dmaau(vrip_chipset_tag_t, vrdmaau_chipset_tag_t); 81 void __vrc4173bcu_register_dcu(vrip_chipset_tag_t, vrdcu_chipset_tag_t); 82 int __vrc4173bcu_clock(vrcmu_chipset_tag_t, u_int16_t, int); 83 84 /* 85 * machine dependent info 86 */ 87 static struct vrc4173bcu_platdep { 88 platid_mask_t *platidmask; 89 u_int32_t clkmask; 90 int intrmask; 91 } platdep_table[] = { 92 { 93 &platid_mask_MACH_VICTOR_INTERLINK_MPC303, 94 USE_WINCE_CLKMASK, /* clock mask */ 95 (1 << VRC4173ICU_USBINTR)| /* intrrupts */ 96 (1 << VRC4173ICU_PCMCIA1INTR)| 97 (1 << VRC4173ICU_PCMCIA2INTR), 98 }, 99 { 100 &platid_mask_MACH_VICTOR_INTERLINK_MPC304, 101 USE_WINCE_CLKMASK, /* clock mask */ 102 (1 << VRC4173ICU_USBINTR)| /* intrrupts */ 103 (1 << VRC4173ICU_PCMCIA1INTR)| 104 (1 << VRC4173ICU_PCMCIA2INTR), 105 }, 106 { 107 &platid_mask_MACH_NEC_MCR_SIGMARION2, 108 USE_WINCE_CLKMASK, /* clock mask */ 109 (1 << VRC4173ICU_USBINTR), /* intrrupts */ 110 }, 111 { 112 &platid_wild, 113 USE_WINCE_CLKMASK, /* XXX */ 114 -1, 115 }, 116 }; 117 118 struct vrc4173bcu_unit { 119 char *vu_name; 120 int vu_intr[2]; 121 int vu_clkmask; 122 bus_addr_t vu_lreg; 123 bus_addr_t vu_mlreg; 124 bus_addr_t vu_hreg; 125 bus_addr_t vu_mhreg; 126 }; 127 128 struct vrc4173bcu_softc { 129 struct device sc_dev; 130 struct vrip_chipset_tag sc_chipset; 131 struct vrcmu_chipset_tag sc_cmuchip; 132 133 pci_chipset_tag_t sc_pc; 134 bus_space_tag_t sc_iot; 135 bus_space_handle_t sc_ioh; 136 bus_size_t sc_size; 137 138 bus_space_handle_t sc_icuh; /* I/O handle for ICU. */ 139 bus_space_handle_t sc_cmuh; /* I/O handle for CMU. */ 140 void *sc_ih; 141 #define VRC4173BCU_NINTRS 16 142 int sc_intrmask; 143 struct vrc4173bcu_intrhand { 144 int (*ih_fun)(void *); 145 void *ih_arg; 146 const struct vrc4173bcu_unit *ih_unit; 147 } sc_intrhands[32]; 148 149 struct vrc4173bcu_unit *sc_units; 150 int sc_nunits; 151 int sc_pri; 152 153 struct vrc4173bcu_platdep *sc_platdep; 154 }; 155 156 #define VALID_UNIT(sc, unit) (0 <= (unit) && (unit) < (sc)->sc_nunits) 157 158 static struct vrc4173bcu_unit vrc4173bcu_units[] = { 159 [VRIP_UNIT_KIU] = { 160 "kiu", 161 { VRC4173ICU_KIUINTR, }, 162 VRC4173CMU_CLKMSK_KIU, 163 VRC4173ICU_KIUINT, VRC4173ICU_MKIUINT, 164 }, 165 [VRIP_UNIT_PIU] = { 166 "piu", 167 { VRC4173ICU_PIUINTR, VRC4173ICU_DOZEPIUINTR}, 168 VRC4173CMU_CLKMSK_PIU, 169 VRC4173ICU_PIUINT, VRC4173ICU_MPIUINT, 170 }, 171 [VRIP_UNIT_AIU] = { 172 "aiu", 173 { VRC4173ICU_AIUINTR, }, 174 VRC4173CMU_CLKMSK_AIU, 175 VRC4173ICU_AIUINT, VRC4173ICU_MAIUINT, 176 }, 177 [VRIP_UNIT_GIU] = { 178 "giu", 179 { VRC4173ICU_GIUINTR, }, 180 0, 181 VRC4173ICU_GIULINT, VRC4173ICU_MGIULINT, 182 VRC4173ICU_GIUHINT, VRC4173ICU_MGIUHINT, 183 }, 184 [VRIP_UNIT_PS2U0] = { 185 "PS/2-Ch1", 186 { VRC4173ICU_PS2CH1INTR, }, 187 VRC4173CMU_CLKMSK_PS2CH1, 188 }, 189 [VRIP_UNIT_PS2U1] = { 190 "PS/2-Ch2", 191 { VRC4173ICU_PS2CH2INTR, }, 192 VRC4173CMU_CLKMSK_PS2CH2, 193 }, 194 [VRIP_UNIT_USBU] = { 195 "usbu", 196 { VRC4173ICU_USBINTR, }, 197 VRC4173CMU_CLKMSK_USB, 198 }, 199 [VRIP_UNIT_CARDU0] = { 200 "cardu0", 201 { VRC4173ICU_PCMCIA1INTR, }, 202 VRC4173CMU_CLKMSK_CARD1, 203 }, 204 [VRIP_UNIT_CARDU1] = { 205 "cardu1", 206 { VRC4173ICU_PCMCIA2INTR, }, 207 VRC4173CMU_CLKMSK_CARD2, 208 }, 209 }; 210 211 struct cfattach vrc4173bcu_ca = { 212 sizeof(struct vrc4173bcu_softc), vrc4173bcu_match, vrc4173bcu_attach, 213 }; 214 215 static const struct vrip_chipset_tag vrc4173bcu_chipset_methods = { 216 .vc_power = __vrc4173bcu_power, 217 .vc_intr_establish = __vrc4173bcu_intr_establish, 218 .vc_intr_disestablish = __vrc4173bcu_intr_disestablish, 219 .vc_intr_setmask1 = __vrc4173bcu_intr_setmask1, 220 .vc_intr_setmask2 = __vrc4173bcu_intr_setmask2, 221 .vc_intr_getstatus2 = __vrc4173bcu_intr_getstatus2, 222 .vc_register_cmu = __vrc4173bcu_register_cmu, 223 .vc_register_gpio = __vrc4173bcu_register_gpio, 224 .vc_register_dmaau = __vrc4173bcu_register_dmaau, 225 .vc_register_dcu = __vrc4173bcu_register_dcu, 226 }; 227 228 int 229 vrc4173bcu_match(struct device *parent, struct cfdata *match, void *aux) 230 { 231 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 232 233 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NEC && 234 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NEC_VRC4173_BCU) 235 return (1); 236 237 return (0); 238 } 239 240 void 241 vrc4173bcu_attach(struct device *parent, struct device *self, void *aux) 242 { 243 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)self; 244 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 245 pci_chipset_tag_t pc = pa->pa_pc; 246 pcitag_t tag = pa->pa_tag; 247 pcireg_t csr; 248 char devinfo[256]; 249 u_int16_t reg; 250 pci_intr_handle_t ih; 251 const char *intrstr; 252 int bus, device, function; 253 #ifdef DEBUG 254 char buf[80]; 255 #endif 256 257 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 258 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 259 260 #if 0 261 printf("%s: ", sc->sc_dev.dv_xname); 262 pci_conf_print(pa->pa_pc, pa->pa_tag, NULL); 263 #endif 264 265 sc->sc_pc = pc; 266 sc->sc_cmuchip.cc_sc = sc; 267 sc->sc_cmuchip.cc_clock = __vrc4173bcu_clock; 268 sc->sc_units = vrc4173bcu_units; 269 sc->sc_nunits = sizeof(vrc4173bcu_units)/sizeof(struct vrc4173bcu_unit); 270 sc->sc_chipset = vrc4173bcu_chipset_methods; /* structure assignment */ 271 sc->sc_chipset.vc_sc = sc; 272 273 sc->sc_platdep = platid_search(&platid, platdep_table, 274 sizeof(platdep_table)/sizeof(*platdep_table), 275 sizeof(*platdep_table)); 276 277 /* Map I/O registers */ 278 if (pci_mapreg_map(pa, VRC4173BCU_BADR, PCI_MAPREG_TYPE_IO, 0, 279 &sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) { 280 printf("%s: can't map mem space\n", sc->sc_dev.dv_xname); 281 return; 282 } 283 284 /* Enable the device. */ 285 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 286 DPRINTF(("%s: csr = 0x%08x", sc->sc_dev.dv_xname, csr)); 287 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 288 csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE); 289 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 290 DPRINTF((" -> 0x%08x\n", csr)); 291 292 csr = pci_conf_read(pc, tag, VRC4173BCU_BADR); 293 DPRINTF(("%s: base addr = %x@0x%08x\n", sc->sc_dev.dv_xname, 294 (int)sc->sc_size, csr)); 295 DPRINTF(("%s: iot = 0x%08x, ioh = 0x%08x\n", sc->sc_dev.dv_xname, 296 (int)sc->sc_iot, (int)sc->sc_ioh)); 297 298 /* 299 * Map I/O space for ICU. 300 */ 301 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 302 VRC4173ICU_IOBASE, VRC4173ICU_IOSIZE, &sc->sc_icuh)) { 303 printf(": can't map ICU i/o space\n"); 304 return; 305 } 306 307 /* 308 * Map I/O space for CMU. 309 */ 310 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 311 VRC4173CMU_IOBASE, VRC4173CMU_IOSIZE, &sc->sc_cmuh)) { 312 printf(": can't map CMU i/o space\n"); 313 return; 314 } 315 316 /* machine dependent setup */ 317 if (sc->sc_platdep->clkmask == USE_WINCE_CLKMASK) { 318 /* XXX, You can nothing! */ 319 reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh, 320 VRC4173CMU_CLKMSK); 321 printf("%s: default clock mask is %04x\n", 322 sc->sc_dev.dv_xname, reg); 323 } else { 324 /* assert all reset bits */ 325 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 326 VRC4173CMU_SRST_AC97 | VRC4173CMU_SRST_USB | 327 VRC4173CMU_SRST_CARD2 | VRC4173CMU_SRST_CARD1); 328 /* set clock mask */ 329 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, 330 VRC4173CMU_CLKMSK, sc->sc_platdep->clkmask); 331 /* clear reset bit */ 332 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 0); 333 } 334 335 #ifdef DEBUG 336 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1); 337 bitmask_snprintf(reg, 338 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 339 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 340 buf, sizeof(buf)); 341 printf("%s: SYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf); 342 343 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MKIUINT); 344 bitmask_snprintf(reg, 345 "\20\1SCANINT\2KDATRDY\3KDATLOST\4B3\5B4\6B5\7B6\10B7" 346 "\11B8\12B9\13B10\14B11\15B12\16B13\17B14\20B15", 347 buf, sizeof(buf)); 348 printf("%s: MKIUINT = 0x%s\n", sc->sc_dev.dv_xname, buf); 349 350 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1); 351 bitmask_snprintf(reg, 352 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 353 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 354 buf, sizeof(buf)); 355 printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf); 356 357 #if 1 358 reg = VRC4173ICU_USBINTR | VRC4173ICU_PIUINTR | VRC4173ICU_KIUINTR | 359 VRC4173ICU_DOZEPIUINTR; 360 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, reg); 361 362 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1); 363 bitmask_snprintf(reg, 364 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 365 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 366 buf, sizeof(buf)); 367 printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf); 368 #endif 369 #endif 370 371 /* 372 * set interrupt mask 373 */ 374 sc->sc_intrmask = sc->sc_platdep->intrmask; 375 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, 376 sc->sc_intrmask); 377 378 /* 379 * install interrupt handler 380 */ 381 if (pci_intr_map(pa, &ih)) { 382 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 383 return; 384 } 385 intrstr = pci_intr_string(pc, ih); 386 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, vrc4173bcu_intr, sc); 387 if (sc->sc_ih == NULL) { 388 printf("%s: couldn't establish interrupt", 389 sc->sc_dev.dv_xname); 390 if (intrstr != NULL) 391 printf(" at %s", intrstr); 392 printf("\n"); 393 return; 394 } 395 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 396 397 /* 398 * install pci intr hooks 399 */ 400 pci_decompose_tag(pc, pa->pa_intrtag, &bus, &device, &function); 401 /* USB unit */ 402 if (sc->sc_intrmask & (1 << VRC4173ICU_USBINTR)) 403 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_USBU, 0, 404 IPL_NET, vrc4173bcu_pci_intr, 405 config_connect(CONFIG_HOOK_PCIINTR, 406 CONFIG_HOOK_PCIINTR_ID(bus, device, 2))); 407 /* PC card unit 1 */ 408 if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA1INTR)) 409 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU0, 0, 410 IPL_NET, vrc4173bcu_pci_intr, 411 config_connect(CONFIG_HOOK_PCIINTR, 412 CONFIG_HOOK_PCIINTR_ID(bus, 1, 0))); 413 /* PC card unit 2 */ 414 if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA2INTR)) 415 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU1, 0, 416 IPL_NET, vrc4173bcu_pci_intr, 417 config_connect(CONFIG_HOOK_PCIINTR, 418 CONFIG_HOOK_PCIINTR_ID(bus, 2, 0))); 419 420 /* 421 * Attach each devices 422 * sc->sc_pri = 2~1 423 */ 424 for (sc->sc_pri = 2; 0 < sc->sc_pri; sc->sc_pri--) 425 config_search(vrc4173bcu_search, self, vrc4173bcu_print); 426 } 427 428 int 429 vrc4173bcu_print(void *aux, const char *hoge) 430 { 431 struct vrip_attach_args *va = (struct vrip_attach_args*)aux; 432 433 if (va->va_addr) 434 printf(" addr 0x%lx", va->va_addr); 435 if (va->va_size > 1) 436 printf("-0x%lx", va->va_addr + va->va_size - 1); 437 438 return (UNCONF); 439 } 440 441 int 442 vrc4173bcu_search(struct device *parent, struct cfdata *cf, void *aux) 443 { 444 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)parent; 445 struct vrip_attach_args va; 446 447 memset(&va, 0, sizeof(va)); 448 va.va_vc = &sc->sc_chipset; 449 va.va_iot = sc->sc_iot; 450 va.va_parent_ioh = sc->sc_ioh; 451 va.va_unit = cf->cf_loc[VRIPIFCF_UNIT]; 452 va.va_addr = cf->cf_loc[VRIPIFCF_ADDR]; 453 va.va_size = cf->cf_loc[VRIPIFCF_SIZE]; 454 va.va_addr2 = cf->cf_loc[VRIPIFCF_ADDR2]; 455 va.va_size2 = cf->cf_loc[VRIPIFCF_SIZE2]; 456 va.va_gpio_chips = NULL; /* XXX */ 457 va.va_cc = sc->sc_chipset.vc_cc; 458 va.va_ac = sc->sc_chipset.vc_ac; 459 va.va_dc = sc->sc_chipset.vc_dc; 460 if (((*cf->cf_attach->ca_match)(parent, cf, &va) == sc->sc_pri)) 461 config_attach(parent, cf, &va, vrc4173bcu_print); 462 463 return (0); 464 } 465 466 int 467 vrc4173bcu_intr(void *arg) 468 { 469 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)arg; 470 u_int16_t reg; 471 struct vrc4173bcu_intrhand *ih; 472 int i; 473 474 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1); 475 reg &= sc->sc_intrmask; 476 if (reg == 0) 477 return (0); 478 479 #if 0 480 { 481 char buf[80]; 482 bitmask_snprintf(reg, 483 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU" 484 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", 485 buf, sizeof(buf)); 486 printf("%s: %s\n", sc->sc_dev.dv_xname, buf); 487 } 488 #endif 489 for (ih = sc->sc_intrhands, i = 0; i < VRC4173BCU_NINTRS; i++, ih++) 490 if ((reg & (1 << i)) && ih->ih_fun != NULL) 491 ih->ih_fun(ih->ih_arg); 492 493 return (1); 494 } 495 496 static int 497 vrc4173bcu_pci_intr(void *arg) 498 { 499 config_call_tag ct = (config_call_tag)arg; 500 config_connected_call(ct, NULL); 501 502 return (0); 503 } 504 505 #ifdef VRC4173BCU_DEBUG 506 static void 507 vrc4173bcu_dump_level2mask(vrip_chipset_tag_t vc, vrip_intr_handle_t handle) 508 { 509 struct vrc4173bcu_softc *sc = vc->vc_sc; 510 struct vrc4173bcu_intrhand *ih = handle; 511 const struct vrc4173bcu_unit *vu = ih->ih_unit; 512 u_int32_t reg; 513 514 if (vu->vu_mlreg) { 515 DPRINTF(("level1[%d] level2 mask:", vu->vu_intr[0])); 516 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg); 517 if (vu->vu_mhreg) { 518 reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh, 519 vu->vu_mhreg) << 16); 520 dbg_bit_print(reg); 521 } else 522 dbg_bit_print(reg); 523 } 524 } 525 #endif 526 527 int 528 __vrc4173bcu_power(vrip_chipset_tag_t vc, int unit, int onoff) 529 { 530 struct vrc4173bcu_softc *sc = vc->vc_sc; 531 const struct vrc4173bcu_unit *vu; 532 533 if (sc->sc_chipset.vc_cc == NULL) 534 return (0); /* You have no clock mask unit yet. */ 535 if (!VALID_UNIT(sc, unit)) 536 return (0); 537 vu = &sc->sc_units[unit]; 538 539 return (*sc->sc_chipset.vc_cc->cc_clock)(sc->sc_chipset.vc_cc, 540 vu->vu_clkmask, onoff); 541 } 542 543 vrip_intr_handle_t 544 __vrc4173bcu_intr_establish(vrip_chipset_tag_t vc, int unit, int line, 545 int level, int (*ih_fun)(void *), void *ih_arg) 546 { 547 struct vrc4173bcu_softc *sc = vc->vc_sc; 548 const struct vrc4173bcu_unit *vu; 549 struct vrc4173bcu_intrhand *ih; 550 551 if (!VALID_UNIT(sc, unit)) 552 return (NULL); 553 vu = &sc->sc_units[unit]; 554 ih = &sc->sc_intrhands[vu->vu_intr[line]]; 555 if (ih->ih_fun) /* Can't share level 1 interrupt */ 556 return (NULL); 557 ih->ih_fun = ih_fun; 558 ih->ih_arg = ih_arg; 559 ih->ih_unit = vu; 560 561 /* Mask level 2 interrupt mask register. (disable interrupt) */ 562 vrip_intr_setmask2(vc, ih, ~0, 0); 563 /* Unmask Level 1 interrupt mask register (enable interrupt) */ 564 vrip_intr_setmask1(vc, ih, 1); 565 566 return ((void *)ih); 567 } 568 569 void 570 __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t vc, vrip_intr_handle_t handle) 571 { 572 struct vrc4173bcu_intrhand *ih = handle; 573 574 /* Mask Level 1 interrupt mask register (disable interrupt) */ 575 vrip_intr_setmask1(vc, ih, 0); 576 /* Mask level 2 interrupt mask register(if any). (disable interrupt) */ 577 vrip_intr_setmask2(vc, ih, ~0, 0); 578 ih->ih_fun = NULL; 579 ih->ih_arg = NULL; 580 } 581 582 /* Set level 1 interrupt mask. */ 583 void 584 __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t vc, vrip_intr_handle_t handle, 585 int enable) 586 { 587 struct vrc4173bcu_softc *sc = vc->vc_sc; 588 struct vrc4173bcu_intrhand *ih = handle; 589 int level1 = ih - sc->sc_intrhands; 590 591 DPRINTF(("__vrc4173bcu_intr_setmask1: SYSINT: %s %d\n", 592 enable ? "enable" : "disable", level1)); 593 if (enable) 594 sc->sc_intrmask |= (1 << level1); 595 else 596 sc->sc_intrmask &= ~(1 << level1); 597 bus_space_write_2 (sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, 598 sc->sc_intrmask); 599 #ifdef VRC4173BCU_DEBUG 600 if (vrc4173bcu_debug) 601 dbg_bit_print(sc->sc_intrmask); 602 #endif 603 604 return; 605 } 606 607 /* Get level 2 interrupt status */ 608 void 609 __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle, 610 u_int32_t *status /* Level 2 status */) 611 { 612 struct vrc4173bcu_softc *sc = vc->vc_sc; 613 struct vrc4173bcu_intrhand *ih = handle; 614 const struct vrc4173bcu_unit *vu = ih->ih_unit; 615 u_int32_t reg; 616 617 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_lreg); 618 reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_hreg) << 16); 619 *status = reg; 620 } 621 622 /* Set level 2 interrupt mask. */ 623 void 624 __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle, 625 u_int32_t mask /* Level 2 mask */, int onoff) 626 { 627 struct vrc4173bcu_softc *sc = vc->vc_sc; 628 struct vrc4173bcu_intrhand *ih = handle; 629 const struct vrc4173bcu_unit *vu = ih->ih_unit; 630 u_int16_t reg; 631 632 DPRINTF(("vrc4173bcu_intr_setmask2:\n")); 633 #ifdef VRC4173BCU_DEBUG 634 if (vrc4173bcu_debug) 635 vrc4173bcu_dump_level2mask(vc, handle); 636 #endif 637 if (vu->vu_mlreg) { 638 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg); 639 if (onoff) 640 reg |= (mask & 0xffff); 641 else 642 reg &= ~(mask & 0xffff); 643 bus_space_write_2(sc->sc_iot, sc->sc_ioh, vu->vu_mlreg, reg); 644 } 645 if (vu->vu_mhreg) { 646 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg); 647 if (onoff) 648 reg |= ((mask >> 16) & 0xffff); 649 else 650 reg &= ~((mask >> 16) & 0xffff); 651 bus_space_write_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg, reg); 652 } 653 #ifdef VRC4173BCU_DEBUG 654 if (vrc4173bcu_debug) 655 vrc4173bcu_dump_level2mask(vc, handle); 656 #endif 657 658 return; 659 } 660 661 int 662 __vrc4173bcu_clock(vrcmu_chipset_tag_t cc, u_int16_t mask, int onoff) 663 { 664 struct vrc4173bcu_softc *sc = cc->cc_sc; 665 u_int16_t reg; 666 667 reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK); 668 #if 0 669 printf("cmu register(enter):"); 670 dbg_bit_print(reg); 671 #endif 672 if (onoff) 673 reg |= mask; 674 else 675 reg &= ~mask; 676 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK, reg); 677 #if 0 678 printf("cmu register(exit) :"); 679 dbg_bit_print(reg); 680 #endif 681 return (0); 682 } 683 684 void 685 __vrc4173bcu_register_cmu(vrip_chipset_tag_t vc, vrcmu_chipset_tag_t cmu) 686 { 687 vc->vc_cc = cmu; 688 } 689 690 void 691 __vrc4173bcu_register_gpio(vrip_chipset_tag_t vc, hpcio_chip_t chip) 692 { 693 /* XXX, not implemented yet */ 694 } 695 696 void 697 __vrc4173bcu_register_dmaau(vrip_chipset_tag_t vc, vrdmaau_chipset_tag_t dmaau) 698 { 699 700 vc->vc_ac = dmaau; 701 } 702 703 void 704 __vrc4173bcu_register_dcu(vrip_chipset_tag_t vc, vrdcu_chipset_tag_t dcu) 705 { 706 707 vc->vc_dc = dcu; 708 } 709
Indexes created Wed Oct 01 18:09:54 GMT 2025