vrdcu.c revision 1.1
1 /* 2 * Copyright (c) 2001 HAMAJIMA Katsuomi. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/param.h> 27 #include <sys/systm.h> 28 #include <sys/device.h> 29 30 #include <uvm/uvm_extern.h> 31 32 #include <machine/cpu.h> 33 #include <machine/bus.h> 34 #include <machine/bus_dma_hpcmips.h> 35 36 #include <hpcmips/vr/vripif.h> 37 #include <hpcmips/vr/dcureg.h> 38 39 #ifdef VRDCU_DEBUG 40 int vrdcu_debug = VRDCU_DEBUG; 41 #define DPRINTFN(n,x) if (vrdcu_debug>(n)) printf x; 42 #else 43 #define DPRINTFN(n,x) 44 #endif 45 46 struct vrdcu_softc { 47 struct device sc_dev; 48 bus_space_tag_t sc_iot; 49 bus_space_handle_t sc_ioh; 50 struct vrdcu_chipset_tag sc_chipset; 51 int sc_status; /* DMA status */ 52 }; 53 54 int vrdcu_match(struct device *, struct cfdata *, void *); 55 void vrdcu_attach(struct device *, struct device *, void *); 56 57 struct cfattach vrdcu_ca = { 58 sizeof(struct vrdcu_softc), vrdcu_match, vrdcu_attach 59 }; 60 61 int vrdcu_enable_aiuin(vrdcu_chipset_tag_t); 62 int vrdcu_enable_aiuout(vrdcu_chipset_tag_t); 63 int vrdcu_enable_fir(vrdcu_chipset_tag_t); 64 void vrdcu_disable(vrdcu_chipset_tag_t); 65 void vrdcu_fir_direction(vrdcu_chipset_tag_t, int); 66 int _vrdcu_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, 67 bus_size_t, bus_dma_segment_t *, int, int *, int); 68 69 struct bus_dma_tag vrdcu_bus_dma_tag = { 70 NULL, 71 { 72 _hpcmips_bd_map_create, 73 _hpcmips_bd_map_destroy, 74 _hpcmips_bd_map_load, 75 _hpcmips_bd_map_load_mbuf, 76 _hpcmips_bd_map_load_uio, 77 _hpcmips_bd_map_load_raw, 78 _hpcmips_bd_map_unload, 79 _hpcmips_bd_map_sync, 80 _vrdcu_dmamem_alloc, 81 _hpcmips_bd_mem_free, 82 _hpcmips_bd_mem_map, 83 _hpcmips_bd_mem_unmap, 84 _hpcmips_bd_mem_mmap, 85 }, 86 }; 87 88 int 89 vrdcu_match(struct device *parent, struct cfdata *cf, void *aux) 90 { 91 return 2; /* 1st attach group of vrip */ 92 } 93 94 void 95 vrdcu_attach(struct device *parent, struct device *self, void *aux) 96 { 97 struct vrip_attach_args *va = aux; 98 struct vrdcu_softc *sc = (void*)self; 99 100 sc->sc_iot = va->va_iot; 101 sc->sc_chipset.dc_sc = sc; 102 sc->sc_chipset.dc_enable_aiuin = vrdcu_enable_aiuin; 103 sc->sc_chipset.dc_enable_aiuout = vrdcu_enable_aiuout; 104 sc->sc_chipset.dc_enable_fir = vrdcu_enable_fir; 105 sc->sc_chipset.dc_disable = vrdcu_disable; 106 sc->sc_chipset.dc_fir_direction = vrdcu_fir_direction; 107 108 if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 109 0 /* no flags */, &sc->sc_ioh)) { 110 printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname); 111 return; 112 } 113 printf("\n"); 114 vrip_register_dcu(va->va_vc, &sc->sc_chipset); 115 116 sc->sc_status = DMASDS; 117 /* reset DCU */ 118 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMARST_REG_W, DMARST); 119 } 120 121 int 122 vrdcu_enable_aiuin(vrdcu_chipset_tag_t dc) 123 { 124 struct vrdcu_softc *sc = dc->dc_sc; 125 int mask; 126 127 DPRINTFN(1, ("vrdcu_enable_aiuin\n")); 128 129 if (sc->sc_status){ 130 mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W); 131 if (mask & DMAMSKAIN) { 132 DPRINTFN(0, ("vrdcu_enable_aiuin: already enabled\n")); 133 return 0; 134 } else { 135 DPRINTFN(0, ("vrdcu_enable_aiuin: device busy\n")); 136 return EBUSY; 137 } 138 } 139 sc->sc_status = DMASEN; 140 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKAIN); 141 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status); 142 return 0; 143 } 144 145 int 146 vrdcu_enable_aiuout(vrdcu_chipset_tag_t dc) 147 { 148 struct vrdcu_softc *sc = dc->dc_sc; 149 int mask; 150 151 DPRINTFN(1, ("vrdcu_enable_aiuout\n")); 152 153 if (sc->sc_status){ 154 mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W); 155 if (mask & DMAMSKAOUT) { 156 DPRINTFN(0, ("vrdcu_enable_aiuout: already enabled\n")); 157 return 0; 158 } else { 159 DPRINTFN(0, ("vrdcu_enable_aiuout: device busy\n")); 160 return EBUSY; 161 } 162 } 163 sc->sc_status = DMASEN; 164 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKAOUT); 165 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status); 166 return 0; 167 } 168 169 int 170 vrdcu_enable_fir(vrdcu_chipset_tag_t dc) 171 { 172 struct vrdcu_softc *sc = dc->dc_sc; 173 int mask; 174 175 DPRINTFN(1, ("vrdcu_enable_fir\n")); 176 177 if (sc->sc_status){ 178 mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W); 179 if (mask & DMAMSKFOUT) { 180 DPRINTFN(0, ("vrdcu_enable_fir: already enabled\n")); 181 return 0; 182 } else { 183 DPRINTFN(0, ("vrdcu_enable_fir: device busy\n")); 184 return EBUSY; 185 } 186 } 187 sc->sc_status = DMASEN; 188 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKFOUT); 189 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status); 190 return 0; 191 } 192 193 void 194 vrdcu_disable(vrdcu_chipset_tag_t dc) 195 { 196 struct vrdcu_softc *sc = dc->dc_sc; 197 198 DPRINTFN(1, ("vrdcu_disable\n")); 199 200 sc->sc_status = DMASDS; 201 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status); 202 } 203 204 void 205 vrdcu_fir_direction(vrdcu_chipset_tag_t dc, int dir) 206 { 207 struct vrdcu_softc *sc = dc->dc_sc; 208 209 DPRINTFN(1, ("vrdcu_fir_direction: dir %d\n", dir)); 210 211 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 212 DMATD_REG_W, dir & DMATDMASK); 213 } 214 215 int 216 _vrdcu_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment, 217 bus_size_t boundary, bus_dma_segment_t *segs, 218 int nsegs, int *rsegs, int flags) 219 { 220 extern paddr_t avail_start, avail_end; /* XXX */ 221 paddr_t high; 222 223 DPRINTFN(1, ("_vrdcu_dmamem_alloc\n")); 224 225 high = (avail_end < VRDMAAU_BOUNCE_THRESHOLD ? 226 avail_end : VRDMAAU_BOUNCE_THRESHOLD) - PAGE_SIZE; 227 alignment = alignment > VRDMAAU_ALIGNMENT ? 228 alignment : VRDMAAU_ALIGNMENT; 229 230 return _hpcmips_bd_mem_alloc_range(t, size, alignment, boundary, 231 segs, nsegs, rsegs, flags, 232 avail_start, high); 233 } 234
Indexes created Fri Sep 26 08:10:20 GMT 2025