vrdcu.c revision 1.4
1 /* 2 * Copyright (c) 2001 HAMAJIMA Katsuomi. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: vrdcu.c,v 1.4 2003/07/15 02:29:35 lukem Exp $"); 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/device.h> 32 33 #include <uvm/uvm_extern.h> 34 35 #include <machine/cpu.h> 36 #include <machine/bus.h> 37 #include <machine/bus_dma_hpcmips.h> 38 39 #include <hpcmips/vr/vripif.h> 40 #include <hpcmips/vr/dcureg.h> 41 42 #ifdef VRDCU_DEBUG 43 int vrdcu_debug = VRDCU_DEBUG; 44 #define DPRINTFN(n,x) if (vrdcu_debug>(n)) printf x; 45 #else 46 #define DPRINTFN(n,x) 47 #endif 48 49 struct vrdcu_softc { 50 struct device sc_dev; 51 bus_space_tag_t sc_iot; 52 bus_space_handle_t sc_ioh; 53 struct vrdcu_chipset_tag sc_chipset; 54 int sc_status; /* DMA status */ 55 }; 56 57 int vrdcu_match(struct device *, struct cfdata *, void *); 58 void vrdcu_attach(struct device *, struct device *, void *); 59 60 CFATTACH_DECL(vrdcu, sizeof(struct vrdcu_softc), 61 vrdcu_match, vrdcu_attach, NULL, NULL); 62 63 int vrdcu_enable_aiuin(vrdcu_chipset_tag_t); 64 int vrdcu_enable_aiuout(vrdcu_chipset_tag_t); 65 int vrdcu_enable_fir(vrdcu_chipset_tag_t); 66 void vrdcu_disable(vrdcu_chipset_tag_t); 67 void vrdcu_fir_direction(vrdcu_chipset_tag_t, int); 68 int _vrdcu_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, 69 bus_size_t, bus_dma_segment_t *, int, int *, int); 70 71 struct bus_dma_tag vrdcu_bus_dma_tag = { 72 NULL, 73 { 74 _hpcmips_bd_map_create, 75 _hpcmips_bd_map_destroy, 76 _hpcmips_bd_map_load, 77 _hpcmips_bd_map_load_mbuf, 78 _hpcmips_bd_map_load_uio, 79 _hpcmips_bd_map_load_raw, 80 _hpcmips_bd_map_unload, 81 _hpcmips_bd_map_sync, 82 _vrdcu_dmamem_alloc, 83 _hpcmips_bd_mem_free, 84 _hpcmips_bd_mem_map, 85 _hpcmips_bd_mem_unmap, 86 _hpcmips_bd_mem_mmap, 87 }, 88 }; 89 90 int 91 vrdcu_match(struct device *parent, struct cfdata *cf, void *aux) 92 { 93 return 2; /* 1st attach group of vrip */ 94 } 95 96 void 97 vrdcu_attach(struct device *parent, struct device *self, void *aux) 98 { 99 struct vrip_attach_args *va = aux; 100 struct vrdcu_softc *sc = (void*)self; 101 102 sc->sc_iot = va->va_iot; 103 sc->sc_chipset.dc_sc = sc; 104 sc->sc_chipset.dc_enable_aiuin = vrdcu_enable_aiuin; 105 sc->sc_chipset.dc_enable_aiuout = vrdcu_enable_aiuout; 106 sc->sc_chipset.dc_enable_fir = vrdcu_enable_fir; 107 sc->sc_chipset.dc_disable = vrdcu_disable; 108 sc->sc_chipset.dc_fir_direction = vrdcu_fir_direction; 109 110 if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 111 0 /* no flags */, &sc->sc_ioh)) { 112 printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname); 113 return; 114 } 115 printf("\n"); 116 vrip_register_dcu(va->va_vc, &sc->sc_chipset); 117 118 sc->sc_status = DMASDS; 119 /* reset DCU */ 120 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMARST_REG_W, DMARST); 121 } 122 123 int 124 vrdcu_enable_aiuin(vrdcu_chipset_tag_t dc) 125 { 126 struct vrdcu_softc *sc = dc->dc_sc; 127 int mask; 128 129 DPRINTFN(1, ("vrdcu_enable_aiuin\n")); 130 131 if (sc->sc_status){ 132 mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W); 133 if (mask & DMAMSKAIN) { 134 DPRINTFN(0, ("vrdcu_enable_aiuin: already enabled\n")); 135 return 0; 136 } else { 137 DPRINTFN(0, ("vrdcu_enable_aiuin: device busy\n")); 138 return EBUSY; 139 } 140 } 141 sc->sc_status = DMASEN; 142 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKAIN); 143 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status); 144 return 0; 145 } 146 147 int 148 vrdcu_enable_aiuout(vrdcu_chipset_tag_t dc) 149 { 150 struct vrdcu_softc *sc = dc->dc_sc; 151 int mask; 152 153 DPRINTFN(1, ("vrdcu_enable_aiuout\n")); 154 155 if (sc->sc_status){ 156 mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W); 157 if (mask & DMAMSKAOUT) { 158 DPRINTFN(0, ("vrdcu_enable_aiuout: already enabled\n")); 159 return 0; 160 } else { 161 DPRINTFN(0, ("vrdcu_enable_aiuout: device busy\n")); 162 return EBUSY; 163 } 164 } 165 sc->sc_status = DMASEN; 166 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKAOUT); 167 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status); 168 return 0; 169 } 170 171 int 172 vrdcu_enable_fir(vrdcu_chipset_tag_t dc) 173 { 174 struct vrdcu_softc *sc = dc->dc_sc; 175 int mask; 176 177 DPRINTFN(1, ("vrdcu_enable_fir\n")); 178 179 if (sc->sc_status){ 180 mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W); 181 if (mask & DMAMSKFOUT) { 182 DPRINTFN(0, ("vrdcu_enable_fir: already enabled\n")); 183 return 0; 184 } else { 185 DPRINTFN(0, ("vrdcu_enable_fir: device busy\n")); 186 return EBUSY; 187 } 188 } 189 sc->sc_status = DMASEN; 190 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKFOUT); 191 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status); 192 return 0; 193 } 194 195 void 196 vrdcu_disable(vrdcu_chipset_tag_t dc) 197 { 198 struct vrdcu_softc *sc = dc->dc_sc; 199 200 DPRINTFN(1, ("vrdcu_disable\n")); 201 202 sc->sc_status = DMASDS; 203 bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status); 204 } 205 206 void 207 vrdcu_fir_direction(vrdcu_chipset_tag_t dc, int dir) 208 { 209 struct vrdcu_softc *sc = dc->dc_sc; 210 211 DPRINTFN(1, ("vrdcu_fir_direction: dir %d\n", dir)); 212 213 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 214 DMATD_REG_W, dir & DMATDMASK); 215 } 216 217 int 218 _vrdcu_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment, 219 bus_size_t boundary, bus_dma_segment_t *segs, 220 int nsegs, int *rsegs, int flags) 221 { 222 extern paddr_t avail_start, avail_end; /* XXX */ 223 paddr_t high; 224 225 DPRINTFN(1, ("_vrdcu_dmamem_alloc\n")); 226 227 high = (avail_end < VRDMAAU_BOUNCE_THRESHOLD ? 228 avail_end : VRDMAAU_BOUNCE_THRESHOLD) - PAGE_SIZE; 229 alignment = alignment > VRDMAAU_ALIGNMENT ? 230 alignment : VRDMAAU_ALIGNMENT; 231 232 return _hpcmips_bd_mem_alloc_range(t, size, alignment, boundary, 233 segs, nsegs, rsegs, flags, 234 avail_start, high); 235 } 236
Indexes created Sat Sep 27 14:09:57 GMT 2025