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vrecu.c revision 1.1.2.5
      1  1.1.2.5  skrll /* $NetBSD: vrecu.c,v 1.1.2.5 2004/09/24 10:53:16 skrll Exp $ */
      2      1.1    igy 
      3      1.1    igy /*
      4      1.1    igy  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5      1.1    igy  * All rights reserved.
      6      1.1    igy  *
      7      1.1    igy  * This code is derived from software contributed to The NetBSD Foundation
      8      1.1    igy  * by Naoto Shimazaki of YOKOGAWA Electric Corporation.
      9      1.1    igy  *
     10      1.1    igy  * Redistribution and use in source and binary forms, with or without
     11      1.1    igy  * modification, are permitted provided that the following conditions
     12      1.1    igy  * are met:
     13      1.1    igy  * 1. Redistributions of source code must retain the above copyright
     14      1.1    igy  *    notice, this list of conditions and the following disclaimer.
     15      1.1    igy  * 2. Redistributions in binary form must reproduce the above copyright
     16      1.1    igy  *    notice, this list of conditions and the following disclaimer in the
     17      1.1    igy  *    documentation and/or other materials provided with the distribution.
     18      1.1    igy  * 3. All advertising materials mentioning features or use of this software
     19      1.1    igy  *    must display the following acknowledgement:
     20      1.1    igy  *        This product includes software developed by the NetBSD
     21      1.1    igy  *        Foundation, Inc. and its contributors.
     22      1.1    igy  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23      1.1    igy  *    contributors may be used to endorse or promote products derived
     24      1.1    igy  *    from this software without specific prior written permission.
     25      1.1    igy  *
     26      1.1    igy  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27      1.1    igy  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28      1.1    igy  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29      1.1    igy  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30      1.1    igy  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31      1.1    igy  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32      1.1    igy  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33      1.1    igy  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34      1.1    igy  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35      1.1    igy  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36      1.1    igy  * POSSIBILITY OF SUCH DAMAGE.
     37      1.1    igy  */
     38      1.1    igy 
     39  1.1.2.1  skrll #include <sys/cdefs.h>
     40  1.1.2.5  skrll __KERNEL_RCSID(0, "$NetBSD: vrecu.c,v 1.1.2.5 2004/09/24 10:53:16 skrll Exp $");
     41  1.1.2.1  skrll 
     42      1.1    igy #include <sys/param.h>
     43      1.1    igy #include <sys/device.h>
     44      1.1    igy #include <sys/malloc.h>
     45      1.1    igy #include <sys/queue.h>
     46      1.1    igy #include <sys/systm.h>
     47      1.1    igy 
     48      1.1    igy #include <machine/bus.h>
     49      1.1    igy #include <machine/intr.h>
     50      1.1    igy 
     51      1.1    igy #include <hpcmips/vr/vrcpudef.h>
     52      1.1    igy #include <hpcmips/vr/vripif.h>
     53      1.1    igy #include <hpcmips/vr/vr4181ecureg.h>
     54      1.1    igy 
     55      1.1    igy #include <dev/isa/isareg.h>
     56      1.1    igy #include <dev/isa/isavar.h>
     57      1.1    igy #include <dev/pcmcia/pcmciareg.h>
     58      1.1    igy #include <dev/pcmcia/pcmciavar.h>
     59      1.1    igy #include <dev/pcmcia/pcmciachip.h>
     60      1.1    igy 
     61      1.1    igy #include <dev/ic/i82365reg.h>
     62      1.1    igy #include <dev/ic/i82365var.h>
     63      1.1    igy #include <dev/isa/i82365_isavar.h>
     64      1.1    igy 
     65      1.1    igy static int pcic_vrip_match(struct device *, struct cfdata *, void *);
     66      1.1    igy static void pcic_vrip_attach(struct device *, struct device *, void *);
     67      1.1    igy static void *pcic_vrip_chip_intr_establish(pcmcia_chipset_handle_t,
     68      1.1    igy 					   struct pcmcia_function *, int,
     69      1.1    igy 					   int (*)(void *), void *);
     70      1.1    igy static void pcic_vrip_chip_intr_disestablish(pcmcia_chipset_handle_t, void *);
     71      1.1    igy static int pcic_vrip_intr(void *);
     72      1.1    igy 
     73      1.1    igy struct pcic_vrip_softc {
     74      1.1    igy 	struct pcic_softc	sc_pcic;	/* real pcic softc */
     75      1.1    igy 	u_int16_t		sc_intr_mask;
     76      1.1    igy 	u_int16_t		sc_intr_valid;
     77      1.1    igy 	struct intrhand {
     78      1.1    igy 		int	(*ih_fun)(void *);
     79      1.1    igy 		void	*ih_arg;
     80      1.1    igy 	} 			sc_intrhand[ECU_MAX_INTR];
     81      1.1    igy };
     82      1.1    igy 
     83      1.1    igy CFATTACH_DECL(pcic_vrip, sizeof(struct pcic_vrip_softc),
     84      1.1    igy 	      pcic_vrip_match, pcic_vrip_attach, NULL, NULL);
     85      1.1    igy 
     86      1.1    igy static struct pcmcia_chip_functions pcic_vrip_functions = {
     87      1.1    igy 	.mem_alloc		= pcic_chip_mem_alloc,
     88      1.1    igy 	.mem_free		= pcic_chip_mem_free,
     89      1.1    igy 	.mem_map		= pcic_chip_mem_map,
     90      1.1    igy 	.mem_unmap		= pcic_chip_mem_unmap,
     91      1.1    igy 
     92      1.1    igy 	.io_alloc		= pcic_chip_io_alloc,
     93      1.1    igy 	.io_free		= pcic_chip_io_free,
     94      1.1    igy 	.io_map			= pcic_chip_io_map,
     95      1.1    igy 	.io_unmap		= pcic_chip_io_unmap,
     96      1.1    igy 
     97      1.1    igy 	.intr_establish		= pcic_vrip_chip_intr_establish,
     98      1.1    igy 	.intr_disestablish	= pcic_vrip_chip_intr_disestablish,
     99      1.1    igy 
    100      1.1    igy 	.socket_enable		= pcic_chip_socket_enable,
    101      1.1    igy 	.socket_disable		= pcic_chip_socket_disable,
    102  1.1.2.2  skrll 	.socket_settype		= pcic_chip_socket_settype,
    103      1.1    igy };
    104      1.1    igy 
    105      1.1    igy 
    106      1.1    igy static int
    107      1.1    igy pcic_vrip_match(struct device *parent, struct cfdata *match, void *aux)
    108      1.1    igy {
    109      1.1    igy 	return 1;
    110      1.1    igy }
    111      1.1    igy 
    112      1.1    igy static void
    113      1.1    igy pcic_vrip_attach(struct device *parent, struct device *self, void *aux)
    114      1.1    igy {
    115      1.1    igy 	struct pcic_softc	*sc = (void *) self;
    116      1.1    igy 	struct pcic_vrip_softc	*vsc = (void *) self;
    117      1.1    igy 	struct vrip_attach_args	*va = aux;
    118      1.1    igy 	bus_space_handle_t	ioh;
    119      1.1    igy 	bus_space_handle_t	memh;
    120      1.1    igy 	int			i;
    121      1.1    igy 
    122      1.1    igy 	vsc->sc_intr_valid = PCIC_INTR_IRQ_VALIDMASK;
    123      1.1    igy 	vsc->sc_intr_mask = 0xffff;
    124      1.1    igy 	for (i = 0; i < ECU_MAX_INTR; i++)
    125      1.1    igy 		vsc->sc_intrhand[i].ih_fun = NULL;
    126      1.1    igy 
    127      1.1    igy 	if ((sc->ih = vrip_intr_establish(va->va_vc, va->va_unit, 0,
    128      1.1    igy 					  IPL_NET, pcic_vrip_intr, sc))
    129      1.1    igy 	    == NULL) {
    130      1.1    igy 		printf("%s: can't establish interrupt", sc->dev.dv_xname);
    131      1.1    igy 	}
    132      1.1    igy 
    133      1.1    igy         /* Map i/o space. */
    134      1.1    igy         if (bus_space_map(va->va_iot, va->va_addr, ECU_SIZE, 0, &ioh)) {
    135      1.1    igy                 printf(": can't map pcic register space\n");
    136      1.1    igy                 return;
    137      1.1    igy         }
    138      1.1    igy 
    139      1.1    igy 	/* init CFG_REG_1 */
    140      1.1    igy 	bus_space_write_2(va->va_iot, ioh, ECU_CFG_REG_1_W, 0x0001);
    141      1.1    igy 
    142      1.1    igy 	/* mask all interrupt */
    143      1.1    igy 	bus_space_write_2(va->va_iot, ioh, ECU_INTMSK_REG_W,
    144      1.1    igy 			  vsc->sc_intr_mask);
    145      1.1    igy 
    146      1.1    igy 	/* Map mem space. */
    147      1.1    igy #if 1
    148      1.1    igy 	if (bus_space_map(va->va_iot, VR_ISA_MEM_BASE, 0x4000, 0, &memh))
    149      1.1    igy 		panic("pcic_pci_attach: can't map mem space");
    150      1.1    igy 
    151      1.1    igy 	sc->membase = VR_ISA_MEM_BASE;
    152      1.1    igy 	sc->subregionmask = (1 << (0x4000 / PCIC_MEM_PAGESIZE)) - 1;
    153      1.1    igy 
    154      1.1    igy 	sc->iobase = VR_ISA_PORT_BASE + 0x400;
    155      1.1    igy 	sc->iosize = 0xbff;
    156      1.1    igy #else
    157      1.1    igy 	if (bus_space_map(va->va_iot, VR_ISA_MEM_BASE, 0x70000, 0, &memh))
    158      1.1    igy 		panic("pcic_pci_attach: can't map mem space");
    159      1.1    igy 
    160      1.1    igy 	sc->membase = VR_ISA_MEM_BASE;
    161      1.1    igy 	sc->subregionmask = (1 << (0x70000 / PCIC_MEM_PAGESIZE)) - 1;
    162      1.1    igy 
    163      1.1    igy 	sc->iobase = VR_ISA_PORT_BASE;
    164      1.1    igy 	sc->iosize = 0x10000;
    165      1.1    igy #endif
    166      1.1    igy 
    167      1.1    igy 	sc->pct = &pcic_vrip_functions;
    168      1.1    igy 
    169      1.1    igy 	sc->iot = va->va_iot;
    170      1.1    igy 	sc->ioh = ioh;
    171      1.1    igy 	sc->memt = va->va_iot;
    172      1.1    igy 	sc->memh = memh;
    173      1.1    igy 
    174      1.1    igy 	printf("\n");
    175      1.1    igy 
    176  1.1.2.5  skrll 	sc->irq = -1;
    177      1.1    igy 
    178      1.1    igy 	pcic_attach(sc);
    179      1.1    igy 	pcic_attach_sockets(sc);
    180      1.1    igy         pcic_attach_sockets_finish(sc);
    181      1.1    igy }
    182      1.1    igy 
    183      1.1    igy static void *
    184      1.1    igy pcic_vrip_chip_intr_establish(pcmcia_chipset_handle_t pch,
    185      1.1    igy 			      struct pcmcia_function *pf,
    186      1.1    igy 			      int ipl,
    187      1.1    igy 			      int (*ih_fun)(void *),
    188      1.1    igy 			      void *ih_arg)
    189      1.1    igy {
    190      1.1    igy 	struct pcic_handle	*h;
    191      1.1    igy 	struct pcic_softc	*sc;
    192      1.1    igy 	struct pcic_vrip_softc	*vsc;
    193      1.1    igy 	struct intrhand		*ih;
    194      1.1    igy 
    195      1.1    igy 	int	irq;
    196      1.1    igy 	int	r;
    197      1.1    igy 
    198      1.1    igy 
    199      1.1    igy 	/*
    200      1.1    igy 	 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
    201      1.1    igy 	 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
    202      1.1    igy 	 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
    203      1.1    igy 	 */
    204      1.1    igy 	irq = 11;
    205      1.1    igy 	/*
    206      1.1    igy 	 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
    207      1.1    igy 	 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
    208      1.1    igy 	 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
    209      1.1    igy 	 */
    210      1.1    igy 
    211      1.1    igy 
    212      1.1    igy 	h = (struct pcic_handle *) pch;
    213      1.1    igy 	sc = (struct pcic_softc *) h->ph_parent;
    214      1.1    igy 	vsc = (struct pcic_vrip_softc *) h->ph_parent;
    215      1.1    igy 
    216      1.1    igy 
    217      1.1    igy 	ih = &vsc->sc_intrhand[irq];
    218      1.1    igy 	if (ih->ih_fun) /* cannot share ecu interrupt */
    219      1.1    igy 		return NULL;
    220      1.1    igy 	ih->ih_fun = ih_fun;
    221      1.1    igy 	ih->ih_arg = ih_arg;
    222      1.1    igy 
    223      1.1    igy 	h->ih_irq = irq;
    224      1.1    igy 	if (h->flags & PCIC_FLAG_ENABLED) {
    225      1.1    igy 		r = pcic_read(h, PCIC_INTR);
    226  1.1.2.1  skrll 		r &= ~PCIC_INTR_IRQ_MASK;
    227  1.1.2.1  skrll 		pcic_write(h, PCIC_INTR, r | irq);
    228      1.1    igy         }
    229      1.1    igy 
    230      1.1    igy 	vsc->sc_intr_mask &= ~(1 << irq);
    231      1.1    igy 	bus_space_write_2(sc->iot, sc->ioh, ECU_INTMSK_REG_W,
    232      1.1    igy 			  vsc->sc_intr_mask);
    233      1.1    igy 
    234      1.1    igy 	return ih;
    235      1.1    igy }
    236      1.1    igy 
    237      1.1    igy static void
    238      1.1    igy pcic_vrip_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *arg)
    239      1.1    igy {
    240      1.1    igy 	struct pcic_handle	*h;
    241      1.1    igy 	struct pcic_softc	*sc;
    242      1.1    igy 	struct pcic_vrip_softc	*vsc;
    243      1.1    igy 	struct intrhand		*ih = arg;
    244      1.1    igy 
    245      1.1    igy 	int	s;
    246      1.1    igy 	int	r;
    247      1.1    igy 
    248      1.1    igy 	h = (struct pcic_handle *) pch;
    249      1.1    igy 	sc = (struct pcic_softc *) h->ph_parent;
    250      1.1    igy 	vsc = (struct pcic_vrip_softc *) h->ph_parent;
    251      1.1    igy 
    252      1.1    igy 	if (ih != &vsc->sc_intrhand[h->ih_irq])
    253      1.1    igy 		panic("pcic_vrip_chip_intr_disestablish: bad handler");
    254      1.1    igy 
    255      1.1    igy 	s = splhigh();
    256      1.1    igy 
    257      1.1    igy 	vsc->sc_intr_mask |= 1 << h->ih_irq;
    258      1.1    igy 	bus_space_write_2(sc->iot, sc->ioh, ECU_INTMSK_REG_W,
    259      1.1    igy 			  vsc->sc_intr_mask);
    260      1.1    igy 
    261      1.1    igy 	h->ih_irq = 0;
    262      1.1    igy 	if (h->flags & PCIC_FLAG_ENABLED) {
    263      1.1    igy 		r = pcic_read(h, PCIC_INTR);
    264      1.1    igy 		r &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
    265      1.1    igy 		pcic_write(h, PCIC_INTR, r);
    266      1.1    igy         }
    267      1.1    igy 
    268      1.1    igy 	ih->ih_fun = NULL;
    269      1.1    igy 	ih->ih_arg = NULL;
    270      1.1    igy 
    271      1.1    igy 	splx(s);
    272      1.1    igy }
    273      1.1    igy 
    274      1.1    igy /*
    275      1.1    igy  * interrupt handler
    276      1.1    igy  */
    277      1.1    igy static int
    278      1.1    igy pcic_vrip_intr(void *arg)
    279      1.1    igy {
    280      1.1    igy 	struct pcic_softc	*sc = arg;
    281      1.1    igy 	struct pcic_vrip_softc	*vsc = arg;
    282      1.1    igy 	int			i;
    283      1.1    igy 	u_int16_t		r;
    284      1.1    igy 
    285      1.1    igy 	r = bus_space_read_2(sc->iot, sc->ioh, ECU_INTSTAT_REG_W)
    286      1.1    igy 		& ~vsc->sc_intr_mask;
    287      1.1    igy 
    288      1.1    igy 	for (i = 0; i < ECU_MAX_INTR; i++) {
    289      1.1    igy 		struct intrhand	*ih = &vsc->sc_intrhand[i];
    290      1.1    igy 		if (ih->ih_fun && (r & (1 << i)))
    291      1.1    igy 			ih->ih_fun(ih->ih_arg);
    292      1.1    igy 	}
    293      1.1    igy 	return 1;
    294      1.1    igy }
    295