vrecu.c revision 1.10 1 /* $NetBSD: vrecu.c,v 1.10 2012/10/27 17:17:56 chs Exp $ */
2
3 /*
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Naoto Shimazaki of YOKOGAWA Electric Corporation.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: vrecu.c,v 1.10 2012/10/27 17:17:56 chs Exp $");
34
35 #include <sys/param.h>
36 #include <sys/device.h>
37 #include <sys/malloc.h>
38 #include <sys/queue.h>
39 #include <sys/systm.h>
40
41 #include <machine/bus.h>
42 #include <machine/intr.h>
43
44 #include <hpcmips/vr/vrcpudef.h>
45 #include <hpcmips/vr/vripif.h>
46 #include <hpcmips/vr/vr4181ecureg.h>
47
48 #include <dev/isa/isareg.h>
49 #include <dev/isa/isavar.h>
50 #include <dev/pcmcia/pcmciareg.h>
51 #include <dev/pcmcia/pcmciavar.h>
52 #include <dev/pcmcia/pcmciachip.h>
53
54 #include <dev/ic/i82365reg.h>
55 #include <dev/ic/i82365var.h>
56 #include <dev/isa/i82365_isavar.h>
57
58 static int pcic_vrip_match(device_t, cfdata_t, void *);
59 static void pcic_vrip_attach(device_t, device_t, void *);
60 static void *pcic_vrip_chip_intr_establish(pcmcia_chipset_handle_t,
61 struct pcmcia_function *, int,
62 int (*)(void *), void *);
63 static void pcic_vrip_chip_intr_disestablish(pcmcia_chipset_handle_t, void *);
64 static int pcic_vrip_intr(void *);
65
66 struct pcic_vrip_softc {
67 struct pcic_softc sc_pcic; /* real pcic softc */
68 uint16_t sc_intr_mask;
69 uint16_t sc_intr_valid;
70 struct intrhand {
71 int (*ih_fun)(void *);
72 void *ih_arg;
73 } sc_intrhand[ECU_MAX_INTR];
74 };
75
76 CFATTACH_DECL_NEW(pcic_vrip, sizeof(struct pcic_vrip_softc),
77 pcic_vrip_match, pcic_vrip_attach, NULL, NULL);
78
79 static struct pcmcia_chip_functions pcic_vrip_functions = {
80 .mem_alloc = pcic_chip_mem_alloc,
81 .mem_free = pcic_chip_mem_free,
82 .mem_map = pcic_chip_mem_map,
83 .mem_unmap = pcic_chip_mem_unmap,
84
85 .io_alloc = pcic_chip_io_alloc,
86 .io_free = pcic_chip_io_free,
87 .io_map = pcic_chip_io_map,
88 .io_unmap = pcic_chip_io_unmap,
89
90 .intr_establish = pcic_vrip_chip_intr_establish,
91 .intr_disestablish = pcic_vrip_chip_intr_disestablish,
92
93 .socket_enable = pcic_chip_socket_enable,
94 .socket_disable = pcic_chip_socket_disable,
95 .socket_settype = pcic_chip_socket_settype,
96 };
97
98
99 static int
100 pcic_vrip_match(device_t parent, cfdata_t match, void *aux)
101 {
102 return 1;
103 }
104
105 static void
106 pcic_vrip_attach(device_t parent, device_t self, void *aux)
107 {
108 struct pcic_vrip_softc *vsc = device_private(self);
109 struct pcic_softc *sc = &vsc->sc_pcic;
110 struct vrip_attach_args *va = aux;
111 bus_space_handle_t ioh;
112 bus_space_handle_t memh;
113 int i;
114
115 sc->dev = self;
116 vsc->sc_intr_valid = PCIC_INTR_IRQ_VALIDMASK;
117 vsc->sc_intr_mask = 0xffff;
118 for (i = 0; i < ECU_MAX_INTR; i++)
119 vsc->sc_intrhand[i].ih_fun = NULL;
120
121 if ((sc->ih = vrip_intr_establish(va->va_vc, va->va_unit, 0,
122 IPL_NET, pcic_vrip_intr, vsc))
123 == NULL) {
124 printf(": can't establish interrupt");
125 }
126
127 /* Map i/o space. */
128 if (bus_space_map(va->va_iot, va->va_addr, ECU_SIZE, 0, &ioh)) {
129 printf(": can't map pcic register space\n");
130 return;
131 }
132
133 /* init CFG_REG_1 */
134 bus_space_write_2(va->va_iot, ioh, ECU_CFG_REG_1_W, 0x0001);
135
136 /* mask all interrupt */
137 bus_space_write_2(va->va_iot, ioh, ECU_INTMSK_REG_W,
138 vsc->sc_intr_mask);
139
140 /* Map mem space. */
141 #if 1
142 if (bus_space_map(va->va_iot, VR_ISA_MEM_BASE, 0x4000, 0, &memh))
143 panic("pcic_pci_attach: can't map mem space");
144
145 sc->membase = VR_ISA_MEM_BASE;
146 sc->subregionmask = (1 << (0x4000 / PCIC_MEM_PAGESIZE)) - 1;
147
148 sc->iobase = VR_ISA_PORT_BASE + 0x400;
149 sc->iosize = 0xbff;
150 #else
151 if (bus_space_map(va->va_iot, VR_ISA_MEM_BASE, 0x70000, 0, &memh))
152 panic("pcic_pci_attach: can't map mem space");
153
154 sc->membase = VR_ISA_MEM_BASE;
155 sc->subregionmask = (1 << (0x70000 / PCIC_MEM_PAGESIZE)) - 1;
156
157 sc->iobase = VR_ISA_PORT_BASE;
158 sc->iosize = 0x10000;
159 #endif
160
161 sc->pct = &pcic_vrip_functions;
162
163 sc->iot = va->va_iot;
164 sc->ioh = ioh;
165 sc->memt = va->va_iot;
166 sc->memh = memh;
167
168 printf("\n");
169
170 sc->irq = -1;
171
172 pcic_attach(sc);
173 pcic_attach_sockets(sc);
174 pcic_attach_sockets_finish(sc);
175 }
176
177 static void *
178 pcic_vrip_chip_intr_establish(pcmcia_chipset_handle_t pch,
179 struct pcmcia_function *pf,
180 int ipl,
181 int (*ih_fun)(void *),
182 void *ih_arg)
183 {
184 struct pcic_handle *h;
185 struct pcic_softc *sc;
186 struct pcic_vrip_softc *vsc;
187 struct intrhand *ih;
188
189 int irq;
190 int r;
191
192
193 /*
194 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
195 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
196 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
197 */
198 irq = 11;
199 /*
200 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
201 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
202 * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
203 */
204
205
206 h = (struct pcic_handle *) pch;
207 vsc = device_private(h->ph_parent);
208 sc = &vsc->sc_pcic;
209
210
211 ih = &vsc->sc_intrhand[irq];
212 if (ih->ih_fun) /* cannot share ecu interrupt */
213 return NULL;
214 ih->ih_fun = ih_fun;
215 ih->ih_arg = ih_arg;
216
217 h->ih_irq = irq;
218 if (h->flags & PCIC_FLAG_ENABLED) {
219 r = pcic_read(h, PCIC_INTR);
220 r &= ~PCIC_INTR_IRQ_MASK;
221 pcic_write(h, PCIC_INTR, r | irq);
222 }
223
224 vsc->sc_intr_mask &= ~(1 << irq);
225 bus_space_write_2(sc->iot, sc->ioh, ECU_INTMSK_REG_W,
226 vsc->sc_intr_mask);
227
228 return ih;
229 }
230
231 static void
232 pcic_vrip_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *arg)
233 {
234 struct pcic_handle *h;
235 struct pcic_softc *sc;
236 struct pcic_vrip_softc *vsc;
237 struct intrhand *ih = arg;
238
239 int s;
240 int r;
241
242 h = (struct pcic_handle *) pch;
243 vsc = device_private(h->ph_parent);
244 sc = &vsc->sc_pcic;
245
246 if (ih != &vsc->sc_intrhand[h->ih_irq])
247 panic("pcic_vrip_chip_intr_disestablish: bad handler");
248
249 s = splhigh();
250
251 vsc->sc_intr_mask |= 1 << h->ih_irq;
252 bus_space_write_2(sc->iot, sc->ioh, ECU_INTMSK_REG_W,
253 vsc->sc_intr_mask);
254
255 h->ih_irq = 0;
256 if (h->flags & PCIC_FLAG_ENABLED) {
257 r = pcic_read(h, PCIC_INTR);
258 r &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
259 pcic_write(h, PCIC_INTR, r);
260 }
261
262 ih->ih_fun = NULL;
263 ih->ih_arg = NULL;
264
265 splx(s);
266 }
267
268 /*
269 * interrupt handler
270 */
271 static int
272 pcic_vrip_intr(void *arg)
273 {
274 struct pcic_vrip_softc *vsc = arg;
275 struct pcic_softc *sc = &vsc->sc_pcic;
276 int i;
277 uint16_t r;
278
279 r = bus_space_read_2(sc->iot, sc->ioh, ECU_INTSTAT_REG_W)
280 & ~vsc->sc_intr_mask;
281
282 for (i = 0; i < ECU_MAX_INTR; i++) {
283 struct intrhand *ih = &vsc->sc_intrhand[i];
284 if (ih->ih_fun && (r & (1 << i)))
285 ih->ih_fun(ih->ih_arg);
286 }
287 return 1;
288 }
289