vrgiu.c revision 1.28
1 /* $NetBSD: vrgiu.c,v 1.28 2001/12/29 05:15:32 takemura Exp $ */ 2 /*- 3 * Copyright (c) 1999-2001 4 * Shin Takemura and PocketBSD Project. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the PocketBSD project 17 * and its contributors. 18 * 4. Neither the name of the project nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/device.h> 39 #include <sys/malloc.h> 40 #include <sys/queue.h> 41 #include <sys/reboot.h> 42 43 #include <mips/cpuregs.h> 44 #include <machine/bus.h> 45 #include <machine/config_hook.h> 46 47 #include <dev/hpc/hpciovar.h> 48 49 #include "opt_vr41xx.h" 50 #include <hpcmips/vr/vrcpudef.h> 51 #include <hpcmips/vr/vripreg.h> 52 #include <hpcmips/vr/vripvar.h> 53 #include <hpcmips/vr/vrgiureg.h> 54 #include <hpcmips/vr/vrgiuvar.h> 55 56 #include "locators.h" 57 58 /* 59 * constant and macro definitions 60 */ 61 #define VRGIUDEBUG 62 #ifdef VRGIUDEBUG 63 #define DEBUG_IO 1 64 #define DEBUG_INTR 2 65 #ifndef VRGIUDEBUG_CONF 66 #define VRGIUDEBUG_CONF 0 67 #endif /* VRGIUDEBUG_CONF */ 68 int vrgiu_debug = VRGIUDEBUG_CONF; 69 #define DPRINTF(flag, arg) if (vrgiu_debug & flag) printf arg; 70 #define DDUMP_IO(flag, sc) if (vrgiu_debug & flag) vrgiu_dump_io(sc); 71 #define DDUMP_IOSETTING(flag, sc) \ 72 if (vrgiu_debug & flag) vrgiu_dump_iosetting(sc); 73 #define VPRINTF(flag, arg) \ 74 if (bootverbose || vrgiu_debug & flag) printf arg; 75 #define VDUMP_IO(flag, sc) \ 76 if (bootverbose || vrgiu_debug & flag) vrgiu_dump_io(sc); 77 #define VDUMP_IOSETTING(flag, sc) \ 78 if (bootverbose || vrgiu_debug & flag) vrgiu_dump_iosetting(sc); 79 #else 80 #define DPRINTF(flag, arg) 81 #define DDUMP_IO(flag, sc) 82 #define DDUMP_IOSETTING(flag, sc) 83 #define VPRINTF(flag, arg) if (bootverbose) printf arg; 84 #define VDUMP_IO(flag, sc) if (bootverbose) vrgiu_dump_io(sc); 85 #define VDUMP_IOSETTING(flag, sc) \ 86 if (bootverbose) vrgiu_dump_iosetting(sc); 87 #endif 88 89 #ifdef VRGIU_INTR_NOLED 90 int vrgiu_intr_led = 0; 91 #else /* VRGIU_INTR_NOLED */ 92 int vrgiu_intr_led = 1; 93 #endif /* VRGIU_INTR_NOLED */ 94 95 #define MAX_GPIO_OUT 50 /* port 32:49 are output only port */ 96 #define MAX_GPIO_INOUT 32 /* input/output port(0:31) */ 97 98 #define LEGAL_INTR_PORT(x) ((x) >= 0 && (x) < MAX_GPIO_INOUT) 99 #define LEGAL_OUT_PORT(x) ((x) >= 0 && (x) < MAX_GPIO_OUT) 100 101 /* flags for variant chips */ 102 #if !defined(VR4122) && !defined(VR4131) 103 #define VRGIU_HAVE_PULLUPDNREGS 104 #endif 105 106 /* 107 * type declarations 108 */ 109 struct vrgiu_intr_entry { 110 int ih_port; 111 int (*ih_fun)(void *); 112 void *ih_arg; 113 TAILQ_ENTRY(vrgiu_intr_entry) ih_link; 114 }; 115 116 struct vrgiu_softc { 117 struct device sc_dev; 118 bus_space_tag_t sc_iot; 119 bus_space_handle_t sc_ioh; 120 /* Interrupt */ 121 vrip_chipset_tag_t sc_vc; 122 void *sc_ih; 123 u_int32_t sc_intr_mask; 124 u_int32_t sc_intr_mode[MAX_GPIO_INOUT]; 125 TAILQ_HEAD(, vrgiu_intr_entry) sc_intr_head[MAX_GPIO_INOUT]; 126 struct hpcio_chip sc_iochip; 127 }; 128 129 /* 130 * prototypes 131 */ 132 int vrgiu_match(struct device*, struct cfdata*, void*); 133 void vrgiu_attach(struct device*, struct device*, void*); 134 int vrgiu_intr(void*); 135 int vrgiu_print(void*, const char*); 136 void vrgiu_callback(struct device*); 137 138 void vrgiu_dump_regs(struct vrgiu_softc *); 139 void vrgiu_dump_io(struct vrgiu_softc *); 140 void vrgiu_diff_io(void); 141 void vrgiu_dump_iosetting(struct vrgiu_softc *); 142 void vrgiu_diff_iosetting(void); 143 u_int32_t vrgiu_regread_4(struct vrgiu_softc *, bus_addr_t); 144 u_int16_t vrgiu_regread(struct vrgiu_softc *, bus_addr_t); 145 void vrgiu_regwrite_4(struct vrgiu_softc *, bus_addr_t, u_int32_t); 146 void vrgiu_regwrite(struct vrgiu_softc *, bus_addr_t, u_int16_t); 147 148 static int vrgiu_port_read(hpcio_chip_t, int); 149 static void vrgiu_port_write(hpcio_chip_t, int, int); 150 static void *vrgiu_intr_establish(hpcio_chip_t, int, int, int (*)(void *), void*); 151 static void vrgiu_intr_disestablish(hpcio_chip_t, void*); 152 static void vrgiu_intr_clear(hpcio_chip_t, void*); 153 static void vrgiu_register_iochip(hpcio_chip_t, hpcio_chip_t); 154 static void vrgiu_update(hpcio_chip_t); 155 static void vrgiu_dump(hpcio_chip_t); 156 static hpcio_chip_t vrgiu_getchip(void*, int); 157 158 /* 159 * variables 160 */ 161 static struct hpcio_chip vrgiu_iochip = { 162 .hc_portread = vrgiu_port_read, 163 .hc_portwrite = vrgiu_port_write, 164 .hc_intr_establish = vrgiu_intr_establish, 165 .hc_intr_disestablish = vrgiu_intr_disestablish, 166 .hc_intr_clear = vrgiu_intr_clear, 167 .hc_register_iochip = vrgiu_register_iochip, 168 .hc_update = vrgiu_update, 169 .hc_dump = vrgiu_dump, 170 }; 171 172 struct cfattach vrgiu_ca = { 173 sizeof(struct vrgiu_softc), vrgiu_match, vrgiu_attach 174 }; 175 176 struct vrgiu_softc *this_giu; 177 178 /* 179 * function bodies 180 */ 181 int 182 vrgiu_match(struct device *parent, struct cfdata *cf, void *aux) 183 { 184 185 return (2); /* 1st attach group of vrip */ 186 } 187 188 void 189 vrgiu_attach(struct device *parent, struct device *self, void *aux) 190 { 191 struct vrip_attach_args *va = aux; 192 struct vrgiu_softc *sc = (void*)self; 193 struct hpcio_attach_args haa; 194 int i; 195 196 this_giu = sc; 197 sc->sc_vc = va->va_vc; 198 sc->sc_iot = va->va_iot; 199 bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 200 0 /* no cache */, &sc->sc_ioh); 201 /* 202 * Disable all interrupts. 203 */ 204 sc->sc_intr_mask = 0; 205 printf("\n"); 206 #ifdef WINCE_DEFAULT_SETTING 207 #warning WINCE_DEFAULT_SETTING 208 #else 209 VPRINTF(DEBUG_IO, (" " 210 " 3 2 1\n")); 211 VPRINTF(DEBUG_IO, (" " 212 "10987654321098765432109876543210\n")); 213 VPRINTF(DEBUG_IO, ("WIN setting: ")); 214 VDUMP_IOSETTING(DEBUG_IO, sc); 215 VPRINTF(DEBUG_IO, ("\n")); 216 vrgiu_regwrite_4(sc, GIUINTEN_REG, sc->sc_intr_mask); 217 #endif 218 219 for (i = 0; i < MAX_GPIO_INOUT; i++) 220 TAILQ_INIT(&sc->sc_intr_head[i]); 221 if (!(sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_intr, IPL_BIO, 222 vrgiu_intr, sc))) { 223 printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname); 224 return; 225 } 226 /* 227 * fill hpcio_chip structure 228 */ 229 sc->sc_iochip = vrgiu_iochip; /* structure copy */ 230 sc->sc_iochip.hc_chipid = VRIP_IOCHIP_VRGIU; 231 sc->sc_iochip.hc_name = sc->sc_dev.dv_xname; 232 sc->sc_iochip.hc_sc = sc; 233 /* Register functions to upper interface */ 234 vrip_gpio_register(va->va_vc, &sc->sc_iochip); 235 236 /* Display port status (Input/Output) for debugging */ 237 VPRINTF(DEBUG_IO, ("I/O setting: ")); 238 VDUMP_IOSETTING(DEBUG_IO, sc); 239 VPRINTF(DEBUG_IO, ("\n")); 240 VPRINTF(DEBUG_IO, (" data:")); 241 VDUMP_IO(DEBUG_IO, sc); 242 243 /* 244 * hpcio I/F 245 */ 246 haa.haa_busname = HPCIO_BUSNAME; 247 haa.haa_sc = sc; 248 haa.haa_getchip = vrgiu_getchip; 249 haa.haa_iot = sc->sc_iot; 250 while (config_found(self, &haa, vrgiu_print)) ; 251 /* 252 * GIU-ISA bridge 253 */ 254 #if 1 /* XXX Sometimes mounting root device failed. Why? XXX*/ 255 config_defer(self, vrgiu_callback); 256 #else 257 vrgiu_callback(self); 258 #endif 259 } 260 261 void 262 vrgiu_callback(struct device *self) 263 { 264 struct vrgiu_softc *sc = (void*)self; 265 struct hpcio_attach_args haa; 266 267 haa.haa_busname = "vrisab"; 268 haa.haa_sc = sc; 269 haa.haa_getchip = vrgiu_getchip; 270 haa.haa_iot = sc->sc_iot; 271 config_found(self, &haa, vrgiu_print); 272 } 273 274 int 275 vrgiu_print(void *aux, const char *pnp) 276 { 277 if (pnp) 278 return (QUIET); 279 return (UNCONF); 280 } 281 282 void 283 vrgiu_dump_iosetting(struct vrgiu_softc *sc) 284 { 285 long iosel, inten, useupdn, termupdn, edge, hold, level; 286 u_int32_t m; 287 char syms[] = "iiiiiiiilhLHeeEEoooooooooooooooo" 288 "DDDDDDDDDDDDDDDDUUUUUUUUUUUUUUUU"; 289 290 iosel= vrgiu_regread_4(sc, GIUIOSEL_REG); 291 inten= vrgiu_regread_4(sc, GIUINTEN_REG); 292 edge = vrgiu_regread_4(sc, GIUINTTYP_REG); 293 hold = vrgiu_regread_4(sc, GIUINTHTSEL_REG); 294 level = vrgiu_regread_4(sc, GIUINTALSEL_REG); 295 #ifndef VRGIU_HAVE_PULLUPDNREGS 296 useupdn = termupdn = 0; 297 #else 298 useupdn = vrgiu_regread(sc, GIUUSEUPDN_REG_W); 299 termupdn = vrgiu_regread(sc, GIUTERMUPDN_REG_W); 300 #endif 301 for (m = 0x80000000; m; m >>=1) 302 printf ("%c", syms[ 303 ((useupdn&m) ? 32 : 0) + 304 ((iosel&m) ? 16 : 0) + ((termupdn&m) ? 16 : 0) + 305 ((inten&m) ? 8 : 0) + 306 ((edge&m) ? 4 : 0) + 307 ((hold&m) ? 2 : 0) + 308 ((level&m) ? 1 : 0)]); 309 } 310 311 void 312 vrgiu_diff_iosetting() 313 { 314 struct vrgiu_softc *sc = this_giu; 315 static long oiosel = 0, ointen = 0, ouseupdn = 0, otermupdn = 0; 316 long iosel, inten, useupdn, termupdn; 317 u_int32_t m; 318 319 iosel= vrgiu_regread_4(sc, GIUIOSEL_REG); 320 inten= vrgiu_regread_4(sc, GIUINTEN_REG); 321 #ifndef VRGIU_HAVE_PULLUPDNREGS 322 useupdn = termupdn = 0; 323 #else 324 useupdn = vrgiu_regread(sc, GIUUSEUPDN_REG_W); 325 termupdn = vrgiu_regread(sc, GIUTERMUPDN_REG_W); 326 #endif 327 if (oiosel != iosel || ointen != inten || 328 ouseupdn != useupdn || otermupdn != termupdn) { 329 for (m = 0x80000000; m; m >>=1) 330 printf ("%c" , (useupdn&m) ? 331 ((termupdn&m) ? 'U' : 'D') : 332 ((iosel&m) ? 'o' : ((inten&m)?'I':'i'))); 333 } 334 oiosel = iosel; 335 ointen = inten; 336 ouseupdn = useupdn; 337 otermupdn = termupdn; 338 } 339 340 void 341 vrgiu_dump_io(struct vrgiu_softc *sc) 342 { 343 u_int32_t preg[2]; 344 345 preg[0] = vrgiu_regread_4(sc, GIUPIOD_REG); 346 preg[1] = vrgiu_regread_4(sc, GIUPODAT_REG); 347 348 bitdisp64(preg); 349 } 350 351 void 352 vrgiu_diff_io() 353 { 354 struct vrgiu_softc *sc = this_giu; 355 static u_int32_t opreg[2] = {0, 0}; 356 u_int32_t preg[2]; 357 358 preg[0] = vrgiu_regread_4(sc, GIUPIOD_REG); 359 preg[1] = vrgiu_regread_4(sc, GIUPODAT_REG); 360 361 if (opreg[0] != preg[0] || opreg[1] != preg[1]) { 362 printf("giu data: "); 363 bitdisp64(preg); 364 } 365 opreg[0] = preg[0]; 366 opreg[1] = preg[1]; 367 } 368 369 void 370 vrgiu_dump_regs(struct vrgiu_softc *sc) 371 { 372 373 if (sc == NULL) { 374 panic("%s(%d): VRGIU device not initialized\n", 375 __FILE__, __LINE__); 376 } 377 printf(" IOSEL: %08x\n", vrgiu_regread_4(sc, GIUIOSEL_REG)); 378 printf(" PIOD: %08x\n", vrgiu_regread_4(sc, GIUPIOD_REG)); 379 printf(" PODAT: %08x\n", vrgiu_regread_4(sc, GIUPODAT_REG)); 380 printf(" INTSTAT: %08x\n", vrgiu_regread_4(sc, GIUINTSTAT_REG)); 381 printf(" INTEN: %08x\n", vrgiu_regread_4(sc, GIUINTEN_REG)); 382 printf(" INTTYP: %08x\n", vrgiu_regread_4(sc, GIUINTTYP_REG)); 383 printf(" INTALSEL: %08x\n", vrgiu_regread_4(sc, GIUINTALSEL_REG)); 384 printf(" INTHTSEL: %08x\n", vrgiu_regread_4(sc, GIUINTHTSEL_REG)); 385 } 386 /* 387 * GIU regster access method. 388 */ 389 u_int32_t 390 vrgiu_regread_4(struct vrgiu_softc *sc, bus_addr_t offs) 391 { 392 u_int16_t reg[2]; 393 394 bus_space_read_region_2 (sc->sc_iot, sc->sc_ioh, offs, reg, 2); 395 396 return (reg[0] | (reg[1] << 16)); 397 } 398 399 u_int16_t 400 vrgiu_regread(struct vrgiu_softc *sc, bus_addr_t off) 401 { 402 403 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, off)); 404 } 405 406 void 407 vrgiu_regwrite_4(struct vrgiu_softc *sc, bus_addr_t offs, u_int32_t data) 408 { 409 u_int16_t reg[2]; 410 411 reg[0] = data & 0xffff; 412 reg[1] = (data>>16)&0xffff; 413 bus_space_write_region_2 (sc->sc_iot, sc->sc_ioh, offs, reg, 2); 414 } 415 416 void 417 vrgiu_regwrite(struct vrgiu_softc *sc, bus_addr_t off, u_int16_t data) 418 { 419 420 bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, data); 421 } 422 423 /* 424 * PORT 425 */ 426 int 427 vrgiu_port_read(hpcio_chip_t hc, int port) 428 { 429 struct vrgiu_softc *sc = hc->hc_sc; 430 int on; 431 432 if (!LEGAL_OUT_PORT(port)) 433 panic("vrgiu_port_read: illegal gpio port"); 434 435 if (port < 32) 436 on = (vrgiu_regread_4(sc, GIUPIOD_REG) & (1 << port)); 437 else 438 on = (vrgiu_regread_4(sc, GIUPODAT_REG) & (1 << (port - 32))); 439 440 return (on ? 1 : 0); 441 } 442 443 void 444 vrgiu_port_write(hpcio_chip_t hc, int port, int onoff) 445 { 446 struct vrgiu_softc *sc = hc->hc_sc; 447 u_int32_t reg[2]; 448 int bank; 449 450 if (!LEGAL_OUT_PORT(port)) 451 panic("vrgiu_port_write: illegal gpio port"); 452 453 reg[0] = vrgiu_regread_4(sc, GIUPIOD_REG); 454 reg[1] = vrgiu_regread_4(sc, GIUPODAT_REG); 455 bank = port < 32 ? 0 : 1; 456 if (bank == 1) 457 port -= 32; 458 459 if (onoff) 460 reg[bank] |= (1<<port); 461 else 462 reg[bank] &= ~(1<<port); 463 vrgiu_regwrite_4(sc, GIUPIOD_REG, reg[0]); 464 vrgiu_regwrite_4(sc, GIUPODAT_REG, reg[1]); 465 } 466 467 static void 468 vrgiu_update(hpcio_chip_t hc) 469 { 470 } 471 472 static void 473 vrgiu_dump(hpcio_chip_t hc) 474 { 475 } 476 477 static hpcio_chip_t 478 vrgiu_getchip(void* scx, int chipid) 479 { 480 struct vrgiu_softc *sc = scx; 481 482 return (&sc->sc_iochip); 483 } 484 485 /* 486 * For before autoconfiguration. 487 */ 488 void 489 __vrgiu_out(int port, int data) 490 { 491 u_int16_t reg; 492 u_int32_t addr; 493 int offs; 494 495 if (!LEGAL_OUT_PORT(port)) 496 panic("__vrgiu_out: illegal gpio port"); 497 if (port < 16) { 498 addr = MIPS_PHYS_TO_KSEG1((VRIP_GIU_ADDR + GIUPIOD_L_REG_W)); 499 offs = port; 500 } else if (port < 32) { 501 addr = MIPS_PHYS_TO_KSEG1((VRIP_GIU_ADDR + GIUPIOD_H_REG_W)); 502 offs = port - 16; 503 } else if (port < 48) { 504 addr = MIPS_PHYS_TO_KSEG1((VRIP_GIU_ADDR + GIUPODAT_L_REG_W)); 505 offs = port - 32; 506 } else { 507 addr = MIPS_PHYS_TO_KSEG1((VRIP_GIU_ADDR + GIUPODAT_H_REG_W)); 508 offs = port - 48; 509 panic ("__vrgiu_out: not coded yet."); 510 } 511 DPRINTF(DEBUG_IO, ("__vrgiu_out: addr %08x bit %d\n", addr, offs)); 512 513 wbflush(); 514 reg = *((volatile u_int16_t*)addr); 515 if (data) { 516 reg |= (1 << offs); 517 } else { 518 reg &= ~(1 << offs); 519 } 520 *((volatile u_int16_t*)addr) = reg; 521 wbflush(); 522 } 523 /* 524 * Interrupt staff 525 */ 526 void * 527 vrgiu_intr_establish( 528 hpcio_chip_t hc, 529 int port, /* GPIO pin # */ 530 int mode, /* GIU trigger setting */ 531 int (*ih_fun)(void *), 532 void *ih_arg) 533 { 534 struct vrgiu_softc *sc = hc->hc_sc; 535 int s; 536 u_int32_t reg, mask; 537 struct vrgiu_intr_entry *ih; 538 539 if (!LEGAL_INTR_PORT(port)) 540 panic ("vrgiu_intr_establish: bogus interrupt line."); 541 if (sc->sc_intr_mode[port] && mode != sc->sc_intr_mode[port]) 542 panic ("vrgiu_intr_establish: bogus interrupt type."); 543 else 544 sc->sc_intr_mode[port] = mode; 545 mask = (1 << port); 546 547 s = splhigh(); 548 549 if (!(ih = malloc(sizeof(struct vrgiu_intr_entry), M_DEVBUF, M_NOWAIT))) 550 panic ("vrgiu_intr_establish: no memory."); 551 552 DPRINTF(DEBUG_INTR, ("%s: port %d ", sc->sc_dev.dv_xname, port)); 553 ih->ih_port = port; 554 ih->ih_fun = ih_fun; 555 ih->ih_arg = ih_arg; 556 TAILQ_INSERT_TAIL(&sc->sc_intr_head[port], ih, ih_link); 557 #ifdef WINCE_DEFAULT_SETTING 558 #warning WINCE_DEFAULT_SETTING 559 #else 560 /* 561 * Setup registers 562 */ 563 /* Input mode */ 564 reg = vrgiu_regread_4(sc, GIUIOSEL_REG); 565 reg &= ~mask; 566 vrgiu_regwrite_4(sc, GIUIOSEL_REG, reg); 567 568 /* interrupt type */ 569 reg = vrgiu_regread_4(sc, GIUINTTYP_REG); 570 DPRINTF(DEBUG_INTR, ("[%s->",reg & mask ? "edge" : "level")); 571 if (mode & HPCIO_INTR_EDGE) { 572 DPRINTF(DEBUG_INTR, ("edge]")); 573 reg |= mask; /* edge */ 574 } else { 575 DPRINTF(DEBUG_INTR, ("level]")); 576 reg &= ~mask; /* level */ 577 } 578 vrgiu_regwrite_4(sc, GIUINTTYP_REG, reg); 579 580 /* interrupt level */ 581 if (!(mode & HPCIO_INTR_EDGE)) { 582 reg = vrgiu_regread_4(sc, GIUINTALSEL_REG); 583 DPRINTF(DEBUG_INTR, ("[%s->",reg & mask ? "high" : "low")); 584 if (mode & HPCIO_INTR_HIGH) { 585 DPRINTF(DEBUG_INTR, ("high]")); 586 reg |= mask; /* high */ 587 } else { 588 DPRINTF(DEBUG_INTR, ("low]")); 589 reg &= ~mask; /* low */ 590 } 591 vrgiu_regwrite_4(sc, GIUINTALSEL_REG, reg); 592 } 593 /* hold or through */ 594 reg = vrgiu_regread_4(sc, GIUINTHTSEL_REG); 595 DPRINTF(DEBUG_INTR, ("[%s->",reg & mask ? "hold" : "through")); 596 if (mode & HPCIO_INTR_HOLD) { 597 DPRINTF(DEBUG_INTR, ("hold]")); 598 reg |= mask; /* hold */ 599 } else { 600 DPRINTF(DEBUG_INTR, ("through]")); 601 reg &= ~mask; /* through */ 602 } 603 vrgiu_regwrite_4(sc, GIUINTHTSEL_REG, reg); 604 #endif 605 /* 606 * clear interrupt status 607 */ 608 reg = vrgiu_regread_4(sc, GIUINTSTAT_REG); 609 reg &= ~mask; 610 vrgiu_regwrite_4(sc, GIUINTSTAT_REG, reg); 611 /* 612 * enable interrupt 613 */ 614 #ifdef WINCE_DEFAULT_SETTING 615 #warning WINCE_DEFAULT_SETTING 616 #else 617 sc->sc_intr_mask |= mask; 618 vrgiu_regwrite_4(sc, GIUINTEN_REG, sc->sc_intr_mask); 619 /* Unmask GIU level 2 mask register */ 620 vrip_intr_setmask2(sc->sc_vc, sc->sc_ih, (1<<port), 1); 621 #endif 622 splx(s); 623 624 DPRINTF(DEBUG_INTR, ("\n")); 625 626 return (ih); 627 } 628 629 void 630 vrgiu_intr_disestablish(hpcio_chip_t hc, void *arg) 631 { 632 struct vrgiu_intr_entry *ihe = arg; 633 struct vrgiu_softc *sc = hc->hc_sc; 634 int port = ihe->ih_port; 635 struct vrgiu_intr_entry *ih; 636 int s; 637 638 s = splhigh(); 639 TAILQ_FOREACH(ih, &sc->sc_intr_head[port], ih_link) { 640 if (ih == ihe) { 641 TAILQ_REMOVE(&sc->sc_intr_head[port], ih, ih_link); 642 free(ih, M_DEVBUF); 643 if (TAILQ_EMPTY(&sc->sc_intr_head[port])) { 644 /* Disable interrupt */ 645 #ifdef WINCE_DEFAULT_SETTING 646 #warning WINCE_DEFAULT_SETTING 647 #else 648 sc->sc_intr_mask &= ~(1<<port); 649 vrgiu_regwrite_4(sc, GIUINTEN_REG, sc->sc_intr_mask); 650 #endif 651 } 652 splx(s); 653 return; 654 } 655 } 656 panic("vrgiu_intr_disetablish: no such a handle."); 657 /* NOTREACHED */ 658 } 659 660 /* Clear interrupt */ 661 void 662 vrgiu_intr_clear(hpcio_chip_t hc, void *arg) 663 { 664 struct vrgiu_softc *sc = hc->hc_sc; 665 struct vrgiu_intr_entry *ihe = arg; 666 u_int32_t reg; 667 668 reg = vrgiu_regread_4(sc, GIUINTSTAT_REG); 669 vrgiu_regwrite_4(sc, GIUINTSTAT_REG, reg & ~(1 << ihe->ih_port)); 670 } 671 672 static void 673 vrgiu_register_iochip(hpcio_chip_t hc, hpcio_chip_t iochip) 674 { 675 struct vrgiu_softc *sc = hc->hc_sc; 676 677 vrip_gpio_register(sc->sc_vc, iochip); 678 } 679 680 /* interrupt handler */ 681 int 682 vrgiu_intr(void *arg) 683 { 684 #ifdef DUMP_GIU_LEVEL2_INTR 685 #warning DUMP_GIU_LEVEL2_INTR 686 static u_int32_t oreg; 687 #endif 688 struct vrgiu_softc *sc = arg; 689 int i; 690 u_int32_t reg; 691 int ledvalue = CONFIG_HOOK_LED_FLASH; 692 693 /* Get Level 2 interrupt status */ 694 vrip_intr_get_status2 (sc->sc_vc, sc->sc_ih, ®); 695 #ifdef DUMP_GIU_LEVEL2_INTR 696 #warning DUMP_GIU_LEVEL2_INTR 697 { 698 u_int32_t uedge, dedge, j; 699 for (j = 0x80000000; j > 0; j >>=1) 700 printf ("%c" , reg&j ? '|' : '.'); 701 uedge = (reg ^ oreg) & reg; 702 dedge = (reg ^ oreg) & ~reg; 703 if (uedge || dedge) { 704 for (j = 0; j < 32; j++) { 705 if (uedge & (1 << j)) 706 printf ("+%d", j); 707 else if (dedge & (1 << j)) 708 printf ("-%d", j); 709 } 710 } 711 oreg = reg; 712 printf ("\n"); 713 } 714 #endif 715 /* Clear interrupt */ 716 vrgiu_regwrite_4(sc, GIUINTSTAT_REG, vrgiu_regread_4(sc, GIUINTSTAT_REG)); 717 718 /* Dispatch handler */ 719 for (i = 0; i < MAX_GPIO_INOUT; i++) { 720 if (reg & (1 << i)) { 721 register struct vrgiu_intr_entry *ih; 722 TAILQ_FOREACH(ih, &sc->sc_intr_head[i], ih_link) { 723 ih->ih_fun(ih->ih_arg); 724 } 725 } 726 } 727 728 if (vrgiu_intr_led) 729 config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_LED, 730 (void *)&ledvalue); 731 return (0); 732 } 733
Indexes created Mon Sep 29 21:09:56 GMT 2025