vrgiu.c revision 1.30
1 /* $NetBSD: vrgiu.c,v 1.30 2002/01/27 14:18:12 takemura Exp $ */ 2 /*- 3 * Copyright (c) 1999-2001 4 * Shin Takemura and PocketBSD Project. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the PocketBSD project 17 * and its contributors. 18 * 4. Neither the name of the project nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/device.h> 39 #include <sys/malloc.h> 40 #include <sys/queue.h> 41 #include <sys/reboot.h> 42 43 #include <mips/cpuregs.h> 44 #include <machine/bus.h> 45 #include <machine/config_hook.h> 46 #include <machine/bitdisp.h> 47 48 #include <dev/hpc/hpciovar.h> 49 50 #include "opt_vr41xx.h" 51 #include <hpcmips/vr/vrcpudef.h> 52 #include <hpcmips/vr/vripif.h> 53 #include <hpcmips/vr/vripreg.h> 54 #include <hpcmips/vr/vrgiureg.h> 55 #include <hpcmips/vr/vrgiuvar.h> 56 57 #include "locators.h" 58 59 /* 60 * constant and macro definitions 61 */ 62 #define VRGIUDEBUG 63 #ifdef VRGIUDEBUG 64 #define DEBUG_IO 1 65 #define DEBUG_INTR 2 66 #ifndef VRGIUDEBUG_CONF 67 #define VRGIUDEBUG_CONF 0 68 #endif /* VRGIUDEBUG_CONF */ 69 int vrgiu_debug = VRGIUDEBUG_CONF; 70 #define DPRINTF(flag, arg) if (vrgiu_debug & flag) printf arg; 71 #define DDUMP_IO(flag, sc) if (vrgiu_debug & flag) vrgiu_dump_io(sc); 72 #define DDUMP_IOSETTING(flag, sc) \ 73 if (vrgiu_debug & flag) vrgiu_dump_iosetting(sc); 74 #define VPRINTF(flag, arg) \ 75 if (bootverbose || vrgiu_debug & flag) printf arg; 76 #define VDUMP_IO(flag, sc) \ 77 if (bootverbose || vrgiu_debug & flag) vrgiu_dump_io(sc); 78 #define VDUMP_IOSETTING(flag, sc) \ 79 if (bootverbose || vrgiu_debug & flag) vrgiu_dump_iosetting(sc); 80 #else 81 #define DPRINTF(flag, arg) 82 #define DDUMP_IO(flag, sc) 83 #define DDUMP_IOSETTING(flag, sc) 84 #define VPRINTF(flag, arg) if (bootverbose) printf arg; 85 #define VDUMP_IO(flag, sc) if (bootverbose) vrgiu_dump_io(sc); 86 #define VDUMP_IOSETTING(flag, sc) \ 87 if (bootverbose) vrgiu_dump_iosetting(sc); 88 #endif 89 90 #ifdef VRGIU_INTR_NOLED 91 int vrgiu_intr_led = 0; 92 #else /* VRGIU_INTR_NOLED */ 93 int vrgiu_intr_led = 1; 94 #endif /* VRGIU_INTR_NOLED */ 95 96 #define MAX_GPIO_OUT 50 /* port 32:49 are output only port */ 97 #define MAX_GPIO_INOUT 32 /* input/output port(0:31) */ 98 99 #define LEGAL_INTR_PORT(x) ((x) >= 0 && (x) < MAX_GPIO_INOUT) 100 #define LEGAL_OUT_PORT(x) ((x) >= 0 && (x) < MAX_GPIO_OUT) 101 102 /* flags for variant chips */ 103 #if !defined(VR4122) && !defined(VR4131) 104 #define VRGIU_HAVE_PULLUPDNREGS 105 #endif 106 107 /* 108 * type declarations 109 */ 110 struct vrgiu_intr_entry { 111 int ih_port; 112 int (*ih_fun)(void *); 113 void *ih_arg; 114 TAILQ_ENTRY(vrgiu_intr_entry) ih_link; 115 }; 116 117 struct vrgiu_softc { 118 struct device sc_dev; 119 bus_space_tag_t sc_iot; 120 bus_space_handle_t sc_ioh; 121 /* Interrupt */ 122 vrip_chipset_tag_t sc_vc; 123 void *sc_ih; 124 u_int32_t sc_intr_mask; 125 u_int32_t sc_intr_mode[MAX_GPIO_INOUT]; 126 TAILQ_HEAD(, vrgiu_intr_entry) sc_intr_head[MAX_GPIO_INOUT]; 127 struct hpcio_chip sc_iochip; 128 }; 129 130 /* 131 * prototypes 132 */ 133 int vrgiu_match(struct device*, struct cfdata*, void*); 134 void vrgiu_attach(struct device*, struct device*, void*); 135 int vrgiu_intr(void*); 136 int vrgiu_print(void*, const char*); 137 void vrgiu_callback(struct device*); 138 139 void vrgiu_dump_regs(struct vrgiu_softc *); 140 void vrgiu_dump_io(struct vrgiu_softc *); 141 void vrgiu_diff_io(void); 142 void vrgiu_dump_iosetting(struct vrgiu_softc *); 143 void vrgiu_diff_iosetting(void); 144 u_int32_t vrgiu_regread_4(struct vrgiu_softc *, bus_addr_t); 145 u_int16_t vrgiu_regread(struct vrgiu_softc *, bus_addr_t); 146 void vrgiu_regwrite_4(struct vrgiu_softc *, bus_addr_t, u_int32_t); 147 void vrgiu_regwrite(struct vrgiu_softc *, bus_addr_t, u_int16_t); 148 149 static int vrgiu_port_read(hpcio_chip_t, int); 150 static void vrgiu_port_write(hpcio_chip_t, int, int); 151 static void *vrgiu_intr_establish(hpcio_chip_t, int, int, int (*)(void *), void*); 152 static void vrgiu_intr_disestablish(hpcio_chip_t, void*); 153 static void vrgiu_intr_clear(hpcio_chip_t, void*); 154 static void vrgiu_register_iochip(hpcio_chip_t, hpcio_chip_t); 155 static void vrgiu_update(hpcio_chip_t); 156 static void vrgiu_dump(hpcio_chip_t); 157 static hpcio_chip_t vrgiu_getchip(void*, int); 158 159 /* 160 * variables 161 */ 162 static struct hpcio_chip vrgiu_iochip = { 163 .hc_portread = vrgiu_port_read, 164 .hc_portwrite = vrgiu_port_write, 165 .hc_intr_establish = vrgiu_intr_establish, 166 .hc_intr_disestablish = vrgiu_intr_disestablish, 167 .hc_intr_clear = vrgiu_intr_clear, 168 .hc_register_iochip = vrgiu_register_iochip, 169 .hc_update = vrgiu_update, 170 .hc_dump = vrgiu_dump, 171 }; 172 173 struct cfattach vrgiu_ca = { 174 sizeof(struct vrgiu_softc), vrgiu_match, vrgiu_attach 175 }; 176 177 struct vrgiu_softc *this_giu; 178 179 /* 180 * function bodies 181 */ 182 int 183 vrgiu_match(struct device *parent, struct cfdata *cf, void *aux) 184 { 185 186 return (2); /* 1st attach group of vrip */ 187 } 188 189 void 190 vrgiu_attach(struct device *parent, struct device *self, void *aux) 191 { 192 struct vrip_attach_args *va = aux; 193 struct vrgiu_softc *sc = (void*)self; 194 struct hpcio_attach_args haa; 195 int i; 196 197 this_giu = sc; 198 sc->sc_vc = va->va_vc; 199 sc->sc_iot = va->va_iot; 200 bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 201 0 /* no cache */, &sc->sc_ioh); 202 /* 203 * Disable all interrupts. 204 */ 205 sc->sc_intr_mask = 0; 206 printf("\n"); 207 #ifdef WINCE_DEFAULT_SETTING 208 #warning WINCE_DEFAULT_SETTING 209 #else 210 VPRINTF(DEBUG_IO, (" " 211 " 3 2 1\n")); 212 VPRINTF(DEBUG_IO, (" " 213 "10987654321098765432109876543210\n")); 214 VPRINTF(DEBUG_IO, ("WIN setting: ")); 215 VDUMP_IOSETTING(DEBUG_IO, sc); 216 VPRINTF(DEBUG_IO, ("\n")); 217 vrgiu_regwrite_4(sc, GIUINTEN_REG, sc->sc_intr_mask); 218 #endif 219 220 for (i = 0; i < MAX_GPIO_INOUT; i++) 221 TAILQ_INIT(&sc->sc_intr_head[i]); 222 if (!(sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_unit, 0, 223 IPL_BIO, vrgiu_intr, sc))) { 224 printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname); 225 return; 226 } 227 /* 228 * fill hpcio_chip structure 229 */ 230 sc->sc_iochip = vrgiu_iochip; /* structure copy */ 231 sc->sc_iochip.hc_chipid = VRIP_IOCHIP_VRGIU; 232 sc->sc_iochip.hc_name = sc->sc_dev.dv_xname; 233 sc->sc_iochip.hc_sc = sc; 234 /* Register functions to upper interface */ 235 vrip_register_gpio(va->va_vc, &sc->sc_iochip); 236 237 /* Display port status (Input/Output) for debugging */ 238 VPRINTF(DEBUG_IO, ("I/O setting: ")); 239 VDUMP_IOSETTING(DEBUG_IO, sc); 240 VPRINTF(DEBUG_IO, ("\n")); 241 VPRINTF(DEBUG_IO, (" data:")); 242 VDUMP_IO(DEBUG_IO, sc); 243 244 /* 245 * hpcio I/F 246 */ 247 haa.haa_busname = HPCIO_BUSNAME; 248 haa.haa_sc = sc; 249 haa.haa_getchip = vrgiu_getchip; 250 haa.haa_iot = sc->sc_iot; 251 while (config_found(self, &haa, vrgiu_print)) ; 252 /* 253 * GIU-ISA bridge 254 */ 255 #if 1 /* XXX Sometimes mounting root device failed. Why? XXX*/ 256 config_defer(self, vrgiu_callback); 257 #else 258 vrgiu_callback(self); 259 #endif 260 } 261 262 void 263 vrgiu_callback(struct device *self) 264 { 265 struct vrgiu_softc *sc = (void*)self; 266 struct hpcio_attach_args haa; 267 268 haa.haa_busname = "vrisab"; 269 haa.haa_sc = sc; 270 haa.haa_getchip = vrgiu_getchip; 271 haa.haa_iot = sc->sc_iot; 272 config_found(self, &haa, vrgiu_print); 273 } 274 275 int 276 vrgiu_print(void *aux, const char *pnp) 277 { 278 if (pnp) 279 return (QUIET); 280 return (UNCONF); 281 } 282 283 void 284 vrgiu_dump_iosetting(struct vrgiu_softc *sc) 285 { 286 long iosel, inten, useupdn, termupdn, edge, hold, level; 287 u_int32_t m; 288 char syms[] = "iiiiiiiilhLHeeEEoooooooooooooooo" 289 "DDDDDDDDDDDDDDDDUUUUUUUUUUUUUUUU"; 290 291 iosel= vrgiu_regread_4(sc, GIUIOSEL_REG); 292 inten= vrgiu_regread_4(sc, GIUINTEN_REG); 293 edge = vrgiu_regread_4(sc, GIUINTTYP_REG); 294 hold = vrgiu_regread_4(sc, GIUINTHTSEL_REG); 295 level = vrgiu_regread_4(sc, GIUINTALSEL_REG); 296 #ifndef VRGIU_HAVE_PULLUPDNREGS 297 useupdn = termupdn = 0; 298 #else 299 useupdn = vrgiu_regread(sc, GIUUSEUPDN_REG_W); 300 termupdn = vrgiu_regread(sc, GIUTERMUPDN_REG_W); 301 #endif 302 for (m = 0x80000000; m; m >>=1) 303 printf ("%c", syms[ 304 ((useupdn&m) ? 32 : 0) + 305 ((iosel&m) ? 16 : 0) + ((termupdn&m) ? 16 : 0) + 306 ((inten&m) ? 8 : 0) + 307 ((edge&m) ? 4 : 0) + 308 ((hold&m) ? 2 : 0) + 309 ((level&m) ? 1 : 0)]); 310 } 311 312 void 313 vrgiu_diff_iosetting() 314 { 315 struct vrgiu_softc *sc = this_giu; 316 static long oiosel = 0, ointen = 0, ouseupdn = 0, otermupdn = 0; 317 long iosel, inten, useupdn, termupdn; 318 u_int32_t m; 319 320 iosel= vrgiu_regread_4(sc, GIUIOSEL_REG); 321 inten= vrgiu_regread_4(sc, GIUINTEN_REG); 322 #ifndef VRGIU_HAVE_PULLUPDNREGS 323 useupdn = termupdn = 0; 324 #else 325 useupdn = vrgiu_regread(sc, GIUUSEUPDN_REG_W); 326 termupdn = vrgiu_regread(sc, GIUTERMUPDN_REG_W); 327 #endif 328 if (oiosel != iosel || ointen != inten || 329 ouseupdn != useupdn || otermupdn != termupdn) { 330 for (m = 0x80000000; m; m >>=1) 331 printf ("%c" , (useupdn&m) ? 332 ((termupdn&m) ? 'U' : 'D') : 333 ((iosel&m) ? 'o' : ((inten&m)?'I':'i'))); 334 } 335 oiosel = iosel; 336 ointen = inten; 337 ouseupdn = useupdn; 338 otermupdn = termupdn; 339 } 340 341 void 342 vrgiu_dump_io(struct vrgiu_softc *sc) 343 { 344 u_int32_t preg[2]; 345 346 preg[0] = vrgiu_regread_4(sc, GIUPIOD_REG); 347 preg[1] = vrgiu_regread_4(sc, GIUPODAT_REG); 348 349 bitdisp64(preg); 350 } 351 352 void 353 vrgiu_diff_io() 354 { 355 struct vrgiu_softc *sc = this_giu; 356 static u_int32_t opreg[2] = {0, 0}; 357 u_int32_t preg[2]; 358 359 preg[0] = vrgiu_regread_4(sc, GIUPIOD_REG); 360 preg[1] = vrgiu_regread_4(sc, GIUPODAT_REG); 361 362 if (opreg[0] != preg[0] || opreg[1] != preg[1]) { 363 printf("giu data: "); 364 bitdisp64(preg); 365 } 366 opreg[0] = preg[0]; 367 opreg[1] = preg[1]; 368 } 369 370 void 371 vrgiu_dump_regs(struct vrgiu_softc *sc) 372 { 373 374 if (sc == NULL) { 375 panic("%s(%d): VRGIU device not initialized\n", 376 __FILE__, __LINE__); 377 } 378 printf(" IOSEL: %08x\n", vrgiu_regread_4(sc, GIUIOSEL_REG)); 379 printf(" PIOD: %08x\n", vrgiu_regread_4(sc, GIUPIOD_REG)); 380 printf(" PODAT: %08x\n", vrgiu_regread_4(sc, GIUPODAT_REG)); 381 printf(" INTSTAT: %08x\n", vrgiu_regread_4(sc, GIUINTSTAT_REG)); 382 printf(" INTEN: %08x\n", vrgiu_regread_4(sc, GIUINTEN_REG)); 383 printf(" INTTYP: %08x\n", vrgiu_regread_4(sc, GIUINTTYP_REG)); 384 printf(" INTALSEL: %08x\n", vrgiu_regread_4(sc, GIUINTALSEL_REG)); 385 printf(" INTHTSEL: %08x\n", vrgiu_regread_4(sc, GIUINTHTSEL_REG)); 386 } 387 /* 388 * GIU regster access method. 389 */ 390 u_int32_t 391 vrgiu_regread_4(struct vrgiu_softc *sc, bus_addr_t offs) 392 { 393 u_int16_t reg[2]; 394 395 bus_space_read_region_2 (sc->sc_iot, sc->sc_ioh, offs, reg, 2); 396 397 return (reg[0] | (reg[1] << 16)); 398 } 399 400 u_int16_t 401 vrgiu_regread(struct vrgiu_softc *sc, bus_addr_t off) 402 { 403 404 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, off)); 405 } 406 407 void 408 vrgiu_regwrite_4(struct vrgiu_softc *sc, bus_addr_t offs, u_int32_t data) 409 { 410 u_int16_t reg[2]; 411 412 reg[0] = data & 0xffff; 413 reg[1] = (data>>16)&0xffff; 414 bus_space_write_region_2 (sc->sc_iot, sc->sc_ioh, offs, reg, 2); 415 } 416 417 void 418 vrgiu_regwrite(struct vrgiu_softc *sc, bus_addr_t off, u_int16_t data) 419 { 420 421 bus_space_write_2(sc->sc_iot, sc->sc_ioh, off, data); 422 } 423 424 /* 425 * PORT 426 */ 427 int 428 vrgiu_port_read(hpcio_chip_t hc, int port) 429 { 430 struct vrgiu_softc *sc = hc->hc_sc; 431 int on; 432 433 if (!LEGAL_OUT_PORT(port)) 434 panic("vrgiu_port_read: illegal gpio port"); 435 436 if (port < 32) 437 on = (vrgiu_regread_4(sc, GIUPIOD_REG) & (1 << port)); 438 else 439 on = (vrgiu_regread_4(sc, GIUPODAT_REG) & (1 << (port - 32))); 440 441 return (on ? 1 : 0); 442 } 443 444 void 445 vrgiu_port_write(hpcio_chip_t hc, int port, int onoff) 446 { 447 struct vrgiu_softc *sc = hc->hc_sc; 448 u_int32_t reg[2]; 449 int bank; 450 451 if (!LEGAL_OUT_PORT(port)) 452 panic("vrgiu_port_write: illegal gpio port"); 453 454 reg[0] = vrgiu_regread_4(sc, GIUPIOD_REG); 455 reg[1] = vrgiu_regread_4(sc, GIUPODAT_REG); 456 bank = port < 32 ? 0 : 1; 457 if (bank == 1) 458 port -= 32; 459 460 if (onoff) 461 reg[bank] |= (1<<port); 462 else 463 reg[bank] &= ~(1<<port); 464 vrgiu_regwrite_4(sc, GIUPIOD_REG, reg[0]); 465 vrgiu_regwrite_4(sc, GIUPODAT_REG, reg[1]); 466 } 467 468 static void 469 vrgiu_update(hpcio_chip_t hc) 470 { 471 } 472 473 static void 474 vrgiu_dump(hpcio_chip_t hc) 475 { 476 } 477 478 static hpcio_chip_t 479 vrgiu_getchip(void* scx, int chipid) 480 { 481 struct vrgiu_softc *sc = scx; 482 483 return (&sc->sc_iochip); 484 } 485 486 /* 487 * For before autoconfiguration. 488 */ 489 void 490 __vrgiu_out(int port, int data) 491 { 492 u_int16_t reg; 493 u_int32_t addr; 494 int offs; 495 496 if (!LEGAL_OUT_PORT(port)) 497 panic("__vrgiu_out: illegal gpio port"); 498 if (port < 16) { 499 addr = MIPS_PHYS_TO_KSEG1((VRIP_GIU_ADDR + GIUPIOD_L_REG_W)); 500 offs = port; 501 } else if (port < 32) { 502 addr = MIPS_PHYS_TO_KSEG1((VRIP_GIU_ADDR + GIUPIOD_H_REG_W)); 503 offs = port - 16; 504 } else if (port < 48) { 505 addr = MIPS_PHYS_TO_KSEG1((VRIP_GIU_ADDR + GIUPODAT_L_REG_W)); 506 offs = port - 32; 507 } else { 508 addr = MIPS_PHYS_TO_KSEG1((VRIP_GIU_ADDR + GIUPODAT_H_REG_W)); 509 offs = port - 48; 510 panic ("__vrgiu_out: not coded yet."); 511 } 512 DPRINTF(DEBUG_IO, ("__vrgiu_out: addr %08x bit %d\n", addr, offs)); 513 514 wbflush(); 515 reg = *((volatile u_int16_t*)addr); 516 if (data) { 517 reg |= (1 << offs); 518 } else { 519 reg &= ~(1 << offs); 520 } 521 *((volatile u_int16_t*)addr) = reg; 522 wbflush(); 523 } 524 /* 525 * Interrupt staff 526 */ 527 void * 528 vrgiu_intr_establish( 529 hpcio_chip_t hc, 530 int port, /* GPIO pin # */ 531 int mode, /* GIU trigger setting */ 532 int (*ih_fun)(void *), 533 void *ih_arg) 534 { 535 struct vrgiu_softc *sc = hc->hc_sc; 536 int s; 537 u_int32_t reg, mask; 538 struct vrgiu_intr_entry *ih; 539 540 if (!LEGAL_INTR_PORT(port)) 541 panic ("vrgiu_intr_establish: bogus interrupt line."); 542 if (sc->sc_intr_mode[port] && mode != sc->sc_intr_mode[port]) 543 panic ("vrgiu_intr_establish: bogus interrupt type."); 544 else 545 sc->sc_intr_mode[port] = mode; 546 mask = (1 << port); 547 548 s = splhigh(); 549 550 if (!(ih = malloc(sizeof(struct vrgiu_intr_entry), M_DEVBUF, M_NOWAIT))) 551 panic ("vrgiu_intr_establish: no memory."); 552 553 DPRINTF(DEBUG_INTR, ("%s: port %d ", sc->sc_dev.dv_xname, port)); 554 ih->ih_port = port; 555 ih->ih_fun = ih_fun; 556 ih->ih_arg = ih_arg; 557 TAILQ_INSERT_TAIL(&sc->sc_intr_head[port], ih, ih_link); 558 #ifdef WINCE_DEFAULT_SETTING 559 #warning WINCE_DEFAULT_SETTING 560 #else 561 /* 562 * Setup registers 563 */ 564 /* Input mode */ 565 reg = vrgiu_regread_4(sc, GIUIOSEL_REG); 566 reg &= ~mask; 567 vrgiu_regwrite_4(sc, GIUIOSEL_REG, reg); 568 569 /* interrupt type */ 570 reg = vrgiu_regread_4(sc, GIUINTTYP_REG); 571 DPRINTF(DEBUG_INTR, ("[%s->",reg & mask ? "edge" : "level")); 572 if (mode & HPCIO_INTR_EDGE) { 573 DPRINTF(DEBUG_INTR, ("edge]")); 574 reg |= mask; /* edge */ 575 } else { 576 DPRINTF(DEBUG_INTR, ("level]")); 577 reg &= ~mask; /* level */ 578 } 579 vrgiu_regwrite_4(sc, GIUINTTYP_REG, reg); 580 581 /* interrupt level */ 582 if (!(mode & HPCIO_INTR_EDGE)) { 583 reg = vrgiu_regread_4(sc, GIUINTALSEL_REG); 584 DPRINTF(DEBUG_INTR, ("[%s->",reg & mask ? "high" : "low")); 585 if (mode & HPCIO_INTR_HIGH) { 586 DPRINTF(DEBUG_INTR, ("high]")); 587 reg |= mask; /* high */ 588 } else { 589 DPRINTF(DEBUG_INTR, ("low]")); 590 reg &= ~mask; /* low */ 591 } 592 vrgiu_regwrite_4(sc, GIUINTALSEL_REG, reg); 593 } 594 /* hold or through */ 595 reg = vrgiu_regread_4(sc, GIUINTHTSEL_REG); 596 DPRINTF(DEBUG_INTR, ("[%s->",reg & mask ? "hold" : "through")); 597 if (mode & HPCIO_INTR_HOLD) { 598 DPRINTF(DEBUG_INTR, ("hold]")); 599 reg |= mask; /* hold */ 600 } else { 601 DPRINTF(DEBUG_INTR, ("through]")); 602 reg &= ~mask; /* through */ 603 } 604 vrgiu_regwrite_4(sc, GIUINTHTSEL_REG, reg); 605 #endif 606 /* 607 * clear interrupt status 608 */ 609 reg = vrgiu_regread_4(sc, GIUINTSTAT_REG); 610 reg &= ~mask; 611 vrgiu_regwrite_4(sc, GIUINTSTAT_REG, reg); 612 /* 613 * enable interrupt 614 */ 615 #ifdef WINCE_DEFAULT_SETTING 616 #warning WINCE_DEFAULT_SETTING 617 #else 618 sc->sc_intr_mask |= mask; 619 vrgiu_regwrite_4(sc, GIUINTEN_REG, sc->sc_intr_mask); 620 /* Unmask GIU level 2 mask register */ 621 vrip_intr_setmask2(sc->sc_vc, sc->sc_ih, (1<<port), 1); 622 #endif 623 splx(s); 624 625 DPRINTF(DEBUG_INTR, ("\n")); 626 627 return (ih); 628 } 629 630 void 631 vrgiu_intr_disestablish(hpcio_chip_t hc, void *arg) 632 { 633 struct vrgiu_intr_entry *ihe = arg; 634 struct vrgiu_softc *sc = hc->hc_sc; 635 int port = ihe->ih_port; 636 struct vrgiu_intr_entry *ih; 637 int s; 638 639 s = splhigh(); 640 TAILQ_FOREACH(ih, &sc->sc_intr_head[port], ih_link) { 641 if (ih == ihe) { 642 TAILQ_REMOVE(&sc->sc_intr_head[port], ih, ih_link); 643 free(ih, M_DEVBUF); 644 if (TAILQ_EMPTY(&sc->sc_intr_head[port])) { 645 /* Disable interrupt */ 646 #ifdef WINCE_DEFAULT_SETTING 647 #warning WINCE_DEFAULT_SETTING 648 #else 649 sc->sc_intr_mask &= ~(1<<port); 650 vrgiu_regwrite_4(sc, GIUINTEN_REG, sc->sc_intr_mask); 651 #endif 652 } 653 splx(s); 654 return; 655 } 656 } 657 panic("vrgiu_intr_disetablish: no such a handle."); 658 /* NOTREACHED */ 659 } 660 661 /* Clear interrupt */ 662 void 663 vrgiu_intr_clear(hpcio_chip_t hc, void *arg) 664 { 665 struct vrgiu_softc *sc = hc->hc_sc; 666 struct vrgiu_intr_entry *ihe = arg; 667 u_int32_t reg; 668 669 reg = vrgiu_regread_4(sc, GIUINTSTAT_REG); 670 vrgiu_regwrite_4(sc, GIUINTSTAT_REG, reg & ~(1 << ihe->ih_port)); 671 } 672 673 static void 674 vrgiu_register_iochip(hpcio_chip_t hc, hpcio_chip_t iochip) 675 { 676 struct vrgiu_softc *sc = hc->hc_sc; 677 678 vrip_register_gpio(sc->sc_vc, iochip); 679 } 680 681 /* interrupt handler */ 682 int 683 vrgiu_intr(void *arg) 684 { 685 #ifdef DUMP_GIU_LEVEL2_INTR 686 #warning DUMP_GIU_LEVEL2_INTR 687 static u_int32_t oreg; 688 #endif 689 struct vrgiu_softc *sc = arg; 690 int i; 691 u_int32_t reg; 692 int ledvalue = CONFIG_HOOK_LED_FLASH; 693 694 /* Get Level 2 interrupt status */ 695 vrip_intr_getstatus2 (sc->sc_vc, sc->sc_ih, ®); 696 #ifdef DUMP_GIU_LEVEL2_INTR 697 #warning DUMP_GIU_LEVEL2_INTR 698 { 699 u_int32_t uedge, dedge, j; 700 for (j = 0x80000000; j > 0; j >>=1) 701 printf ("%c" , reg&j ? '|' : '.'); 702 uedge = (reg ^ oreg) & reg; 703 dedge = (reg ^ oreg) & ~reg; 704 if (uedge || dedge) { 705 for (j = 0; j < 32; j++) { 706 if (uedge & (1 << j)) 707 printf ("+%d", j); 708 else if (dedge & (1 << j)) 709 printf ("-%d", j); 710 } 711 } 712 oreg = reg; 713 printf ("\n"); 714 } 715 #endif 716 /* Clear interrupt */ 717 vrgiu_regwrite_4(sc, GIUINTSTAT_REG, vrgiu_regread_4(sc, GIUINTSTAT_REG)); 718 719 /* Dispatch handler */ 720 for (i = 0; i < MAX_GPIO_INOUT; i++) { 721 if (reg & (1 << i)) { 722 register struct vrgiu_intr_entry *ih; 723 TAILQ_FOREACH(ih, &sc->sc_intr_head[i], ih_link) { 724 ih->ih_fun(ih->ih_arg); 725 } 726 } 727 } 728 729 if (vrgiu_intr_led) 730 config_hook_call(CONFIG_HOOK_SET, CONFIG_HOOK_LED, 731 (void *)&ledvalue); 732 return (0); 733 } 734
Indexes created Mon Sep 29 21:09:56 GMT 2025