vrip.c revision 1.2
1 /* $NetBSD: vrip.c,v 1.2 1999/12/04 14:23:36 takemura Exp $ */ 2 3 /*- 4 * Copyright (c) 1999 5 * Shin Takemura and PocketBSD Project. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the PocketBSD project 18 * and its contributors. 19 * 4. Neither the name of the project nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 */ 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/device.h> 39 #include <sys/reboot.h> 40 41 #include <machine/cpu.h> 42 #include <machine/bus.h> 43 #include <machine/autoconf.h> 44 45 #include <hpcmips/vr/vr.h> 46 #include <hpcmips/vr/vripreg.h> 47 #include <hpcmips/vr/vripvar.h> 48 #include <hpcmips/vr/icureg.h> 49 #include "locators.h" 50 51 int vripmatch __P((struct device*, struct cfdata*, void*)); 52 void vripattach __P((struct device*, struct device*, void*)); 53 int vrip_print __P((void*, const char*)); 54 int vrip_search __P((struct device*, struct cfdata*, void*)); 55 int vrip_intr __P((void*, u_int32_t, u_int32_t)); 56 57 static void vrip_dump_level2mask __P((vrip_chipset_tag_t, void*)); 58 59 struct cfattach vrip_ca = { 60 sizeof(struct vrip_softc), vripmatch, vripattach 61 }; 62 63 #define MAX_LEVEL1 32 64 65 struct vrip_softc *the_vrip_sc = NULL; 66 67 static struct intrhand { 68 int (*ih_fun) __P((void *)); 69 void *ih_arg; 70 int ih_l1line; 71 int ih_ipl; 72 bus_addr_t ih_lreg; 73 bus_addr_t ih_mlreg; 74 bus_addr_t ih_hreg; 75 bus_addr_t ih_mhreg; 76 } intrhand[MAX_LEVEL1] = { 77 [5] = { 0, 0, 0, 0, PIUINT_REG_W, MPIUINT_REG_W }, 78 [6] = { 0, 0, 0, 0, AIUINT_REG_W, MAIUINT_REG_W }, 79 [7] = { 0, 0, 0, 0, KIUINT_REG_W, MKIUINT_REG_W }, 80 [8] = { 0, 0, 0, 0, GIUINT_L_REG_W, MGIUINT_L_REG_W, GIUINT_H_REG_W, MGIUINT_H_REG_W }, 81 [20] = { 0, 0, 0, 0, FIRINT_REG_W, MFIRINT_REG_W }, 82 [21] = { 0, 0, 0, 0, DSIUINT_REG_W, MDSIUINT_REG_W } 83 }; 84 #define LEGAL_LEVEL1(x) ((x) >= 0 && (x) < MAX_LEVEL1) 85 86 void 87 bitdisp16 (u_int16_t a) 88 { 89 u_int16_t j; 90 for (j = 0x8000; j > 0; j >>=1) 91 printf ("%c", a&j ?'|':'.'); 92 printf ("\n"); 93 } 94 95 void 96 bitdisp32 (u_int32_t a) 97 { 98 u_int32_t j; 99 for (j = 0x80000000; j > 0; j >>=1) 100 printf ("%c" , a&j ? '|' : '.'); 101 printf ("\n"); 102 } 103 104 void 105 bitdisp64(u_int32_t a[2]) 106 { 107 u_int32_t j; 108 for( j = 0x80000000 ; j > 0 ; j >>=1 ) 109 printf("%c" , a[1]&j ?';':',' ); 110 for( j = 0x80000000 ; j > 0 ; j >>=1 ) 111 printf("%c" , a[0]&j ?'|':'.' ); 112 printf("\n"); 113 } 114 115 int 116 vripmatch(parent, match, aux) 117 struct device *parent; 118 struct cfdata *match; 119 void *aux; 120 { 121 struct mainbus_attach_args *ma = aux; 122 123 if (strcmp(ma->ma_name, match->cf_driver->cd_name)) 124 return 0; 125 return 1; 126 } 127 128 void 129 vripattach(parent, self, aux) 130 struct device *parent; 131 struct device *self; 132 void *aux; 133 { 134 struct mainbus_attach_args *ma = aux; 135 struct vrip_softc *sc = (struct vrip_softc*)self; 136 137 printf("\n"); 138 /* 139 * Map ICU (Interrupt Control Unit) register space. 140 */ 141 sc->sc_iot = ma->ma_iot; 142 if (bus_space_map(sc->sc_iot, VRIP_ICU_ADDR, 0x20/*XXX lower area only*/, 143 0, /* no flags */ 144 &sc->sc_ioh)) { 145 printf("vripattach: can't map ICU register.\n"); 146 return; 147 } 148 149 /* 150 * Disable all Level 1 interrupts. 151 */ 152 sc->sc_intrmask = 0; 153 bus_space_write_2(sc->sc_iot, sc->sc_ioh, MSYSINT1_REG_W, 0x0000); 154 bus_space_write_2(sc->sc_iot, sc->sc_ioh, MSYSINT2_REG_W, 0x0000); 155 /* 156 * Level 1 interrupts are redirected to HwInt0 157 */ 158 vr_intr_establish(VR_INTR0, vrip_intr, self); 159 the_vrip_sc = sc; 160 /* 161 * Attach each devices 162 */ 163 /* GIU CMU interface interface is used by other system device. so attach first */ 164 sc->sc_pri = 2; 165 config_search(vrip_search, self, vrip_print); 166 /* Other system devices. */ 167 sc->sc_pri = 1; 168 config_search(vrip_search, self, vrip_print); 169 } 170 171 int 172 vrip_print(aux, hoge) 173 void *aux; 174 const char *hoge; 175 { 176 struct vrip_attach_args *va = (struct vrip_attach_args*)aux; 177 178 if (va->va_addr) 179 printf(" addr 0x%x", va->va_addr); 180 if (va->va_size > 1) 181 printf("-0x%x", va->va_addr + va->va_size - 1); 182 if (va->va_intr != VRIPCF_INTR_DEFAULT) 183 printf(" intr %d", va->va_intr); 184 return (UNCONF); 185 } 186 187 int 188 vrip_search(parent, cf, aux) 189 struct device *parent; 190 struct cfdata *cf; 191 void *aux; 192 { 193 struct vrip_softc *sc = (struct vrip_softc *)parent; 194 struct vrip_attach_args va; 195 196 va.va_vc = sc; 197 va.va_iot = sc->sc_iot; 198 va.va_addr = cf->cf_loc[VRIPCF_ADDR]; 199 va.va_size = cf->cf_loc[VRIPCF_SIZE]; 200 va.va_intr = cf->cf_loc[VRIPCF_INTR]; 201 va.va_addr2 = cf->cf_loc[VRIPCF_ADDR2]; 202 va.va_size2 = cf->cf_loc[VRIPCF_SIZE2]; 203 va.va_gc = sc->sc_gc; 204 va.va_gf = sc->sc_gf; 205 va.va_cc = sc->sc_cc; 206 va.va_cf = sc->sc_cf; 207 if (((*cf->cf_attach->ca_match)(parent, cf, &va) == sc->sc_pri)) 208 config_attach(parent, cf, &va, vrip_print); 209 210 return 0; 211 } 212 213 void * 214 vrip_intr_establish(vc, intr, level, ih_fun, ih_arg) 215 vrip_chipset_tag_t vc; 216 int intr; 217 int level; /* XXX not yet */ 218 int (*ih_fun) __P((void *)); 219 void *ih_arg; 220 { 221 struct intrhand *ih; 222 223 if (!LEGAL_LEVEL1(intr)) 224 return 0; 225 ih = &intrhand[intr]; 226 if (ih->ih_fun) /* Can't share level 1 interrupt */ 227 return 0; 228 ih->ih_l1line = intr; 229 ih->ih_fun = ih_fun; 230 ih->ih_arg = ih_arg; 231 232 /* Mask level 2 interrupt mask register. (disable interrupt) */ 233 vrip_intr_setmask2(vc, ih, ~0, 0); 234 /* Unmask Level 1 interrupt mask register (enable interrupt) */ 235 vrip_intr_setmask1(vc, ih, 1); 236 237 return (void *)ih; 238 } 239 240 void 241 vrip_intr_disestablish(vc, arg) 242 vrip_chipset_tag_t vc; 243 void *arg; 244 { 245 struct intrhand *ih = arg; 246 ih->ih_fun = NULL; 247 ih->ih_arg = NULL; 248 /* Mask level 2 interrupt mask register(if any). (disable interrupt) */ 249 vrip_intr_setmask2(vc, ih, ~0, 0); 250 /* Mask Level 1 interrupt mask register (disable interrupt) */ 251 vrip_intr_setmask1(vc, ih, 0); 252 } 253 254 void 255 vrip_intr_suspend() 256 { 257 bus_space_tag_t iot = the_vrip_sc->sc_iot; 258 bus_space_handle_t ioh = the_vrip_sc->sc_ioh; 259 260 bus_space_write_2 (iot, ioh, MSYSINT1_REG_W, (1<<VRIP_INTR_POWER)); 261 bus_space_write_2 (iot, ioh, MSYSINT2_REG_W, 0); 262 } 263 264 void 265 vrip_intr_resume() 266 { 267 u_int32_t reg = the_vrip_sc->sc_intrmask; 268 bus_space_tag_t iot = the_vrip_sc->sc_iot; 269 bus_space_handle_t ioh = the_vrip_sc->sc_ioh; 270 271 bus_space_write_2 (iot, ioh, MSYSINT1_REG_W, reg & 0xffff); 272 bus_space_write_2 (iot, ioh, MSYSINT2_REG_W, (reg >> 16) & 0xffff); 273 } 274 275 /* Set level 1 interrupt mask. */ 276 void 277 vrip_intr_setmask1(vc, arg, enable) 278 vrip_chipset_tag_t vc; 279 void *arg; 280 int enable; 281 { 282 struct vrip_softc *sc = (void*)vc; 283 struct intrhand *ih = arg; 284 int level1 = ih->ih_l1line; 285 bus_space_tag_t iot = sc->sc_iot; 286 bus_space_handle_t ioh = sc->sc_ioh; 287 u_int32_t reg = sc->sc_intrmask; 288 289 reg = (bus_space_read_2 (iot, ioh, MSYSINT1_REG_W)&0xffff) | 290 ((bus_space_read_2 (iot, ioh, MSYSINT2_REG_W)<< 16)&0xffff0000); 291 if (enable) 292 reg |= (1 << level1); 293 else { 294 reg &= ~(1 << level1); 295 } 296 sc->sc_intrmask = reg; 297 bus_space_write_2 (iot, ioh, MSYSINT1_REG_W, reg & 0xffff); 298 bus_space_write_2 (iot, ioh, MSYSINT2_REG_W, (reg >> 16) & 0xffff); 299 /* bitdisp32(reg); */ 300 301 return; 302 } 303 304 static void 305 vrip_dump_level2mask (vc, arg) 306 vrip_chipset_tag_t vc; 307 void *arg; 308 { 309 struct vrip_softc *sc = (void*)vc; 310 struct intrhand *ih = arg; 311 u_int32_t reg; 312 313 if (ih->ih_mlreg) { 314 printf ("level1[%d] level2 mask:", ih->ih_l1line); 315 reg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ih->ih_mlreg); 316 if (ih->ih_mhreg) { /* GIU [16:31] case only */ 317 reg |= (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ih->ih_mhreg) << 16); 318 bitdisp32(reg); 319 } else 320 bitdisp16(reg); 321 } 322 } 323 324 /* Get level 2 interrupt status */ 325 void 326 vrip_intr_get_status2(vc, arg, mask) 327 vrip_chipset_tag_t vc; 328 void *arg; 329 u_int32_t *mask; /* Level 2 mask */ 330 { 331 struct vrip_softc *sc = (void*)vc; 332 struct intrhand *ih = arg; 333 u_int32_t reg; 334 reg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 335 ih->ih_lreg); 336 reg |= ((bus_space_read_2(sc->sc_iot, sc->sc_ioh, 337 ih->ih_hreg) << 16)&0xffff0000); 338 /* bitdisp32(reg);*/ 339 *mask = reg; 340 } 341 342 /* Set level 2 interrupt mask. */ 343 void 344 vrip_intr_setmask2(vc, arg, mask, onoff) 345 vrip_chipset_tag_t vc; 346 void *arg; 347 u_int32_t mask; /* Level 2 mask */ 348 { 349 struct vrip_softc *sc = (void*)vc; 350 struct intrhand *ih = arg; 351 u_int16_t reg; 352 #if 1 353 printf("vrip_intr_setmask2:\n"); 354 vrip_dump_level2mask (vc, arg); 355 #endif 356 #ifdef WINCE_DEFAULT_SETTING 357 #warning WINCE_DEFAULT_SETTING 358 #else 359 if (ih->ih_mlreg) { 360 reg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ih->ih_mlreg); 361 if (onoff) 362 reg |= (mask&0xffff); 363 else 364 reg &= ~(mask&0xffff); 365 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ih->ih_mlreg, reg); 366 if (ih->ih_mhreg != -1) { /* GIU [16:31] case only */ 367 reg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ih->ih_mhreg); 368 if (onoff) 369 reg |= ((mask >> 16) & 0xffff); 370 else 371 reg &= ~((mask >> 16) & 0xffff); 372 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 373 ih->ih_mhreg, reg); 374 } 375 } 376 #endif /* WINCE_DEFAULT_SETTING */ 377 #if 0 378 vrip_dump_level2mask (vc, arg); 379 #endif 380 return; 381 } 382 383 int 384 vrip_intr(arg, pc, statusReg) 385 void *arg; 386 u_int32_t pc; 387 u_int32_t statusReg; 388 { 389 struct vrip_softc *sc = (struct vrip_softc*)arg; 390 bus_space_tag_t iot = sc->sc_iot; 391 bus_space_handle_t ioh = sc->sc_ioh; 392 int i; 393 u_int32_t reg, mask; 394 /* 395 * Read level1 interrupt status. 396 */ 397 reg = (bus_space_read_2 (iot, ioh, SYSINT1_REG_W)&0xffff) | 398 ((bus_space_read_2 (iot, ioh, SYSINT2_REG_W)<< 16)&0xffff0000); 399 mask = (bus_space_read_2 (iot, ioh, MSYSINT1_REG_W)&0xffff) | 400 ((bus_space_read_2 (iot, ioh, MSYSINT2_REG_W)<< 16)&0xffff0000); 401 reg &= mask; 402 403 /* 404 * Dispatch each handler. 405 */ 406 for (i = 0; i < 32; i++) { 407 register struct intrhand *ih = &intrhand[i]; 408 if (ih->ih_fun && (reg & (1 << i))) { 409 ih->ih_fun(ih->ih_arg); 410 } 411 } 412 return 1; 413 } 414 415 void 416 vrip_cmu_function_register(vc, func, arg) 417 vrip_chipset_tag_t vc; 418 vrcmu_function_tag_t func; 419 vrcmu_chipset_tag_t arg; 420 { 421 struct vrip_softc *sc = (void*)vc; 422 sc->sc_cf = func; 423 sc->sc_cc = arg; 424 } 425 426 void 427 vrip_giu_function_register(vc, func, arg) 428 vrip_chipset_tag_t vc; 429 vrgiu_function_tag_t func; 430 vrgiu_chipset_tag_t arg; 431 { 432 struct vrip_softc *sc = (void*)vc; 433 sc->sc_gf = func; 434 sc->sc_gc = arg; 435 } 436 437
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