vripreg.h revision 1.2
1 1.2 sato /* $NetBSD: vripreg.h,v 1.2 2001/04/18 11:07:28 sato Exp $ */ 2 1.1 takemura 3 1.1 takemura /*- 4 1.1 takemura * Copyright (c) 1999 5 1.1 takemura * Shin Takemura and PocketBSD Project. All rights reserved. 6 1.2 sato * Copyright (c) 2001 SATO Kazumi, All rights reserved. 7 1.1 takemura * 8 1.1 takemura * Redistribution and use in source and binary forms, with or without 9 1.1 takemura * modification, are permitted provided that the following conditions 10 1.1 takemura * are met: 11 1.1 takemura * 1. Redistributions of source code must retain the above copyright 12 1.1 takemura * notice, this list of conditions and the following disclaimer. 13 1.1 takemura * 2. Redistributions in binary form must reproduce the above copyright 14 1.1 takemura * notice, this list of conditions and the following disclaimer in the 15 1.1 takemura * documentation and/or other materials provided with the distribution. 16 1.1 takemura * 3. All advertising materials mentioning features or use of this software 17 1.1 takemura * must display the following acknowledgement: 18 1.1 takemura * This product includes software developed by the PocketBSD project 19 1.1 takemura * and its contributors. 20 1.1 takemura * 4. Neither the name of the project nor the names of its contributors 21 1.1 takemura * may be used to endorse or promote products derived from this software 22 1.1 takemura * without specific prior written permission. 23 1.1 takemura * 24 1.1 takemura * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 1.1 takemura * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 1.1 takemura * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 1.1 takemura * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 1.1 takemura * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 1.1 takemura * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 1.1 takemura * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 1.1 takemura * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 1.1 takemura * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 1.1 takemura * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 1.1 takemura * SUCH DAMAGE. 35 1.1 takemura * 36 1.1 takemura */ 37 1.1 takemura 38 1.2 sato #define VRIP_NO_ADDR 0x00000000 39 1.2 sato /* 40 1.2 sato * VR4101-4121 registers 41 1.2 sato */ 42 1.2 sato #define VR4102_BCU_ADDR 0x0b000000 43 1.2 sato #define VR4102_DMAAU_ADDR 0x0b000020 44 1.2 sato #define VR4102_DCU_ADDR 0x0b000040 45 1.2 sato #define VR4102_CMU_ADDR 0x0b000060 46 1.2 sato #define VR4102_ICU_ADDR 0x0b000080 47 1.2 sato #define VR4102_PMU_ADDR 0x0b0000a0 48 1.2 sato #define VR4102_RTC_ADDR 0x0b0000c0 49 1.2 sato #define VR4102_DSU_ADDR 0x0b0000e0 50 1.2 sato #define VR4102_GIU_ADDR 0x0b000100 51 1.2 sato #define VR4102_PIU_ADDR 0x0b000120 52 1.2 sato #define VR4102_AIU_ADDR 0x0b000000 /* XXX */ 53 1.2 sato #define VR4102_KIU_ADDR 0x0b000180 54 1.2 sato #define VR4102_DSIU_ADDR 0x0b0001a0 55 1.2 sato #define VR4102_LED_ADDR 0x0b000240 56 1.2 sato #define VR4102_SIU_ADDR 0x0c000000 57 1.2 sato #define VR4102_HSP_ADDR 0x0c000020 58 1.2 sato #define VR4102_FIR_ADDR 0x0b000000 /* XXX */ 59 1.2 sato #define VR4102_SCU_ARR VRIP_NO_ADDR /* XXX: no register */ 60 1.2 sato #define VR4102_SDRAMU_ADDR VRIP_NO_ADDR /* XXX: no register */ 61 1.2 sato #define VR4102_PCI_ADDR VRIP_NO_ADDR /* XXX: no register */ 62 1.2 sato #define VR4102_PCICONF_ADDR VRIP_NO_ADDR /* XXX: no register */ 63 1.2 sato #define VR4102_CSI_ADDR VRIP_NO_ADDR /* XXX: no register */ 64 1.1 takemura 65 1.2 sato /* 66 1.2 sato * VR4122 registers 67 1.2 sato */ 68 1.2 sato #define VR4122_BCU_ADDR 0x0f000000 69 1.2 sato #define VR4122_DMAAU_ADDR 0x0f000020 70 1.2 sato #define VR4122_DCU_ADDR 0x0f000040 71 1.2 sato #define VR4122_CMU_ADDR 0x0f000060 72 1.2 sato #define VR4122_ICU_ADDR 0x0f000080 73 1.2 sato #define VR4122_PMU_ADDR 0x0f000100 74 1.2 sato #define VR4122_RTC_ADDR 0x0f000140 75 1.2 sato #define VR4122_DSU_ADDR VRIP_NO_ADDR /* XXX: no register */ 76 1.2 sato #define VR4122_GIU_ADDR 0x0f000140 77 1.2 sato #define VR4122_PIU_ADDR VRIP_NO_ADDR /* XXX: no register */ 78 1.2 sato #define VR4122_AIU_ADDR VRIP_NO_ADDR /* XXX: no register */ 79 1.2 sato #define VR4122_KIU_ADDR VRIP_NO_ADDR /* XXX: no register */ 80 1.2 sato #define VR4122_DSIU_ADDR 0x0f000820 81 1.2 sato #define VR4122_LED_ADDR 0x0f000180 82 1.2 sato #define VR4122_SIU_ADDR 0x0f000800 83 1.2 sato #define VR4122_HSP_ADDR VRIP_NO_ADDR /* XXX: no register */ 84 1.2 sato #define VR4122_FIR_ADDR 0x0f000840 /* XXX */ 85 1.2 sato #define VR4122_SCU_ARR 0x0f001000 86 1.2 sato #define VR4122_SDRAMU_ADDR 0x00000400 87 1.2 sato #define VR4122_PCI_ADDR 0x00000c00 88 1.2 sato #define VR4122_PCICONF_ADDR 0x00000d00 89 1.2 sato #define VR4122_CSI_ADDR 0x000001a0 90 1.1 takemura 91 1.2 sato /* 92 1.2 sato * VRIP base address 93 1.2 sato * 94 1.2 sato * REQUIRE: opt_vr41xx.h, vrcpudef.h 95 1.2 sato */ 96 1.2 sato #include "opt_vr41xx.h" 97 1.2 sato #include <hpcmips/vr/vrcpudef.h> 98 1.1 takemura 99 1.2 sato #if !defined SINGLE_VRIP_BASE 100 1.1 takemura 101 1.2 sato #error currently missconfiguration. 102 1.2 sato #error NEED switch VRIP_BASE_ADDR by vr cpu type. 103 1.1 takemura 104 1.2 sato #else 105 1.2 sato 106 1.2 sato #if defined VRGROUP_4181 107 1.2 sato #define VRIP_BASE_ADDR 0x0a000000 108 1.2 sato #endif /* VRGROUP_4181 */ 109 1.2 sato 110 1.2 sato #if defined VRGROUP_4122 111 1.2 sato #define VRIP_BASE_ADDR 0x0f000000 112 1.2 sato 113 1.2 sato #define VRIP_BCU_ADDR VR4122_BCU_ADDR 114 1.2 sato #define VRIP_DMAAU_ADDR VR4122_DMAAU_ADDR 115 1.2 sato #define VRIP_DCU_ADDR VR4122_DCU_ADDR 116 1.2 sato #define VRIP_CMU_ADDR VR4122_CMU_ADDR 117 1.2 sato #define VRIP_ICU_ADDR VR4122_ICU_ADDR 118 1.2 sato #define VRIP_PMU_ADDR VR4122_PMU_ADDR 119 1.2 sato #define VRIP_RTC_ADDR VR4122_RTC_ADDR 120 1.2 sato #define VRIP_DSU_ADDR VR4122_DSU_ADDR 121 1.2 sato #define VRIP_GIU_ADDR VR4122_GIU_ADDR 122 1.2 sato #define VRIP_PIU_ADDR VR4122_PIU_ADDR 123 1.2 sato #define VRIP_AIU_ADDR VR4122_AIU_ADDR 124 1.2 sato #define VRIP_KIU_ADDR VR4122_KIU_ADDR 125 1.2 sato #define VRIP_DSIU_ADDR VR4122_DSIU_ADDR 126 1.2 sato #define VRIP_LED_ADDR VR4122_LED_ADDR 127 1.2 sato #define VRIP_SIU_ADDR VR4122_SIU_ADDR 128 1.2 sato #define VRIP_HSP_ADDR VR4122_HSP_ADDR 129 1.2 sato #define VRIP_FIR_ADDR VR4122_FIR_ADDR 130 1.2 sato #define VRIP_SCU_ARR VR4122_SCU_ARR /* XXX: no register */ 131 1.2 sato #define VRIP_SDRAMU_ADDR VR4122_SDRAMU_ADDR /* XXX: no register */ 132 1.2 sato #define VRIP_PCI_ADDR VR4122_PCI_ADDR /* XXX: no register */ 133 1.2 sato #define VRIP_PCICONF_ADDR VR4122_PCICONF_ADDR /* XXX: no register */ 134 1.2 sato #define VRIP_CSI_ADDR VR4122_CSI_ADDR /* XXX: no register */ 135 1.2 sato 136 1.2 sato #endif /* VRGROUP_4122 */ 137 1.2 sato 138 1.2 sato #if defined VRGROUP_4102_4121 139 1.2 sato #define VRIP_BASE_ADDR 0x0b000000 140 1.2 sato 141 1.2 sato #define VRIP_BCU_ADDR VR4102_BCU_ADDR 142 1.2 sato #define VRIP_DMAAU_ADDR VR4102_DMAAU_ADDR 143 1.2 sato #define VRIP_DCU_ADDR VR4102_DCU_ADDR 144 1.2 sato #define VRIP_CMU_ADDR VR4102_CMU_ADDR 145 1.2 sato #define VRIP_ICU_ADDR VR4102_ICU_ADDR 146 1.2 sato #define VRIP_PMU_ADDR VR4102_PMU_ADDR 147 1.2 sato #define VRIP_RTC_ADDR VR4102_RTC_ADDR 148 1.2 sato #define VRIP_DSU_ADDR VR4102_DSU_ADDR 149 1.2 sato #define VRIP_GIU_ADDR VR4102_GIU_ADDR 150 1.2 sato #define VRIP_PIU_ADDR VR4102_PIU_ADDR 151 1.2 sato #define VRIP_AIU_ADDR VR4102_AIU_ADDR 152 1.2 sato #define VRIP_KIU_ADDR VR4102_KIU_ADDR 153 1.2 sato #define VRIP_DSIU_ADDR VR4102_DSIU_ADDR 154 1.2 sato #define VRIP_LED_ADDR VR4102_LED_ADDR 155 1.2 sato #define VRIP_SIU_ADDR VR4102_SIU_ADDR 156 1.2 sato #define VRIP_HSP_ADDR VR4102_HSP_ADDR 157 1.2 sato #define VRIP_FIR_ADDR VR4102_FIR_ADDR 158 1.2 sato #define VRIP_SCU_ARR VR4102_SCU_ARR /* XXX: no register */ 159 1.2 sato #define VRIP_SDRAMU_ADDR VR4102_SDRAMU_ADDR /* XXX: no register */ 160 1.2 sato #define VRIP_PCI_ADDR VR4102_PCI_ADDR /* XXX: no register */ 161 1.2 sato #define VRIP_PCICONF_ADDR VR4102_PCICONF_ADDR /* XXX: no register */ 162 1.2 sato #define VRIP_CSI_ADDR VR4102_CSI_ADDR /* XXX: no register */ 163 1.1 takemura 164 1.2 sato #endif /* VRGROUP_4102_4121 */ 165 1.1 takemura 166 1.2 sato #endif /* SINGLE_VRIP_BASE */ 167 1.1 takemura 168 1.2 sato /* 169 1.2 sato * ICU interrupt level 170 1.2 sato */ 171 1.2 sato /* reserved 62-31 */ 172 1.2 sato #define VRIP_INTR_BCU 25 173 1.2 sato #define VRIP_INTR_CSI 24 174 1.2 sato #define VRIP_INTR_SCU 23 175 1.2 sato #define VRIP_INTR_PCI 22 176 1.1 takemura #define VRIP_INTR_DSIU 21 177 1.1 takemura #define VRIP_INTR_FIR 20 178 1.1 takemura #define VRIP_INTR_TCLK 19 179 1.1 takemura #define VRIP_INTR_HSP 18 180 1.1 takemura #define VRIP_INTR_LED 17 181 1.1 takemura #define VRIP_INTR_RTCL2 16 182 1.1 takemura /* reserved 15,14 */ 183 1.1 takemura #define VRIP_INTR_DOZEPIU 13 184 1.2 sato #define VRIP_INTR_CLKRUN 12 185 1.1 takemura #define VRIP_INTR_SOFT 11 186 1.1 takemura #define VRIP_INTR_WRBERR 10 187 1.1 takemura #define VRIP_INTR_SIU 9 188 1.1 takemura #define VRIP_INTR_GIU 8 189 1.1 takemura #define VRIP_INTR_KIU 7 190 1.1 takemura #define VRIP_INTR_AIU 6 191 1.1 takemura #define VRIP_INTR_PIU 5 192 1.1 takemura /* reserved 4 VRC4171 use this ??? */ 193 1.1 takemura #define VRIP_INTR_ETIMER 3 194 1.1 takemura #define VRIP_INTR_RTCL1 2 195 1.1 takemura #define VRIP_INTR_POWER 1 196 1.1 takemura #define VRIP_INTR_BAT 0 197
Indexes created Mon Sep 29 21:09:56 GMT 2025