vrpciu.c revision 1.1 1 1.1 enami /* $NetBSD: vrpciu.c,v 1.1 2001/06/13 07:32:48 enami Exp $ */
2 1.1 enami
3 1.1 enami /*-
4 1.1 enami * Copyright (c) 2001 Enami Tsugutomo.
5 1.1 enami * All rights reserved.
6 1.1 enami *
7 1.1 enami * Redistribution and use in source and binary forms, with or without
8 1.1 enami * modification, are permitted provided that the following conditions
9 1.1 enami * are met:
10 1.1 enami * 1. Redistributions of source code must retain the above copyright
11 1.1 enami * notice, this list of conditions and the following disclaimer.
12 1.1 enami * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 enami * notice, this list of conditions and the following disclaimer in the
14 1.1 enami * documentation and/or other materials provided with the distribution.
15 1.1 enami *
16 1.1 enami * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 1.1 enami * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.1 enami * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.1 enami * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 1.1 enami * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.1 enami * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.1 enami * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.1 enami * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.1 enami * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 enami * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 enami * SUCH DAMAGE.
27 1.1 enami */
28 1.1 enami
29 1.1 enami #include <sys/param.h>
30 1.1 enami #include <sys/systm.h>
31 1.1 enami #include <sys/device.h>
32 1.1 enami
33 1.1 enami #define _HPCMIPS_BUS_DMA_PRIVATE /* XXX */
34 1.1 enami #include <machine/bus.h>
35 1.1 enami
36 1.1 enami #include <dev/pci/pcivar.h>
37 1.1 enami
38 1.1 enami #include <hpcmips/vr/icureg.h>
39 1.1 enami #include <hpcmips/vr/vripvar.h>
40 1.1 enami #include <hpcmips/vr/vrpciureg.h>
41 1.1 enami #include <hpcmips/vr/vrc4173bcuvar.h>
42 1.1 enami
43 1.1 enami #include "pci.h"
44 1.1 enami
45 1.1 enami #ifdef DEBUG
46 1.1 enami #define DPRINTF(args) printf args
47 1.1 enami #else
48 1.1 enami #define DPRINTF(args)
49 1.1 enami #endif
50 1.1 enami
51 1.1 enami struct vrpciu_softc {
52 1.1 enami struct device sc_dev;
53 1.1 enami
54 1.1 enami vrip_chipset_tag_t sc_vc;
55 1.1 enami bus_space_tag_t sc_iot;
56 1.1 enami bus_space_handle_t sc_ioh;
57 1.1 enami void *sc_ih;
58 1.1 enami
59 1.1 enami struct vrc4173bcu_softc *sc_bcu; /* vrc4173bcu */
60 1.1 enami
61 1.1 enami struct hpcmips_pci_chipset sc_pc;
62 1.1 enami };
63 1.1 enami
64 1.1 enami static void vrpciu_write(struct vrpciu_softc *, int, u_int32_t);
65 1.1 enami static u_int32_t
66 1.1 enami vrpciu_read(struct vrpciu_softc *, int);
67 1.1 enami #ifdef DEBUG
68 1.1 enami static void vrpciu_write_2(struct vrpciu_softc *, int, u_int16_t)
69 1.1 enami __attribute__((unused));
70 1.1 enami static u_int16_t
71 1.1 enami vrpciu_read_2(struct vrpciu_softc *, int);
72 1.1 enami #endif
73 1.1 enami static int vrpciu_match(struct device *, struct cfdata *, void *);
74 1.1 enami static void vrpciu_attach(struct device *, struct device *, void *);
75 1.1 enami #if NPCI > 0
76 1.1 enami static int vrpciu_print(void *, const char *);
77 1.1 enami #endif
78 1.1 enami static int vrpciu_intr(void *);
79 1.1 enami static void vrpciu_attach_hook(struct device *, struct device *,
80 1.1 enami struct pcibus_attach_args *);
81 1.1 enami static int vrpciu_bus_maxdevs(pci_chipset_tag_t, int);
82 1.1 enami static pcitag_t vrpciu_make_tag(pci_chipset_tag_t, int, int, int);
83 1.1 enami static void vrpciu_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *,
84 1.1 enami int *);
85 1.1 enami static pcireg_t vrpciu_conf_read(pci_chipset_tag_t, pcitag_t, int);
86 1.1 enami static void vrpciu_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
87 1.1 enami static void *vrpciu_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
88 1.1 enami int, int (*)(void *), void *);
89 1.1 enami static void vrpciu_intr_disestablish(pci_chipset_tag_t, void *);
90 1.1 enami static void *vrpciu_vrcintr_establish(pci_chipset_tag_t, int,
91 1.1 enami int (*)(void *), void *);
92 1.1 enami static void vrpciu_vrcintr_disestablish(pci_chipset_tag_t, void *);
93 1.1 enami
94 1.1 enami struct cfattach vrpciu_ca = {
95 1.1 enami sizeof(struct vrpciu_softc), vrpciu_match, vrpciu_attach
96 1.1 enami };
97 1.1 enami
98 1.1 enami static void
99 1.1 enami vrpciu_write(struct vrpciu_softc *sc, int offset, u_int32_t val)
100 1.1 enami {
101 1.1 enami
102 1.1 enami bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);
103 1.1 enami }
104 1.1 enami
105 1.1 enami static u_int32_t
106 1.1 enami vrpciu_read(struct vrpciu_softc *sc, int offset)
107 1.1 enami {
108 1.1 enami
109 1.1 enami return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset));
110 1.1 enami }
111 1.1 enami
112 1.1 enami #ifdef DEBUG
113 1.1 enami static void
114 1.1 enami vrpciu_write_2(struct vrpciu_softc *sc, int offset, u_int16_t val)
115 1.1 enami {
116 1.1 enami
117 1.1 enami bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, val);
118 1.1 enami }
119 1.1 enami
120 1.1 enami static u_int16_t
121 1.1 enami vrpciu_read_2(struct vrpciu_softc *sc, int offset)
122 1.1 enami {
123 1.1 enami
124 1.1 enami return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset));
125 1.1 enami }
126 1.1 enami #endif
127 1.1 enami
128 1.1 enami static int
129 1.1 enami vrpciu_match(struct device *parent, struct cfdata *match, void *aux)
130 1.1 enami {
131 1.1 enami
132 1.1 enami return (1);
133 1.1 enami }
134 1.1 enami
135 1.1 enami static void
136 1.1 enami vrpciu_attach(struct device *parent, struct device *self, void *aux)
137 1.1 enami {
138 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)self;
139 1.1 enami pci_chipset_tag_t pc = &sc->sc_pc;
140 1.1 enami struct vrip_attach_args *va = aux;
141 1.1 enami bus_space_tag_t iot;
142 1.1 enami u_int32_t reg;
143 1.1 enami #if NPCI > 0
144 1.1 enami struct pcibus_attach_args pba;
145 1.1 enami #endif
146 1.1 enami
147 1.1 enami sc->sc_vc = va->va_vc;
148 1.1 enami sc->sc_iot = va->va_iot;
149 1.1 enami if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0,
150 1.1 enami &sc->sc_ioh)) {
151 1.1 enami printf(": couldn't map io space\n");
152 1.1 enami return;
153 1.1 enami }
154 1.1 enami
155 1.1 enami sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_intr, IPL_TTY,
156 1.1 enami vrpciu_intr, sc);
157 1.1 enami if (sc->sc_ih == NULL) {
158 1.1 enami printf(": couldn't establish interrupt\n");
159 1.1 enami return;
160 1.1 enami }
161 1.1 enami
162 1.1 enami /* Enable level 2 interrupt */
163 1.1 enami vrip_intr_setmask2(va->va_vc, sc->sc_ih, PCIINT_INT0, 1);
164 1.1 enami
165 1.1 enami printf("\n");
166 1.1 enami
167 1.1 enami #ifdef DEBUG
168 1.1 enami #define DUMP_MAW(sc, name, reg) do { \
169 1.1 enami printf("%s: %s =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
170 1.1 enami (name), (reg)); \
171 1.1 enami printf("%s:\tIBA/MASK =\t0x%08x/0x%08x (0x%08x - 0x%08x)\n", \
172 1.1 enami (sc)->sc_dev.dv_xname, \
173 1.1 enami reg & VRPCIU_MAW_IBAMASK, VRPCIU_MAW_ADDRMASK(reg), \
174 1.1 enami VRPCIU_MAW_ADDR(reg), \
175 1.1 enami VRPCIU_MAW_ADDR(reg) + VRPCIU_MAW_SIZE(reg)); \
176 1.1 enami printf("%s:\tWINEN =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
177 1.1 enami reg & VRPCIU_MAW_WINEN); \
178 1.1 enami printf("%s:\tPCIADR =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
179 1.1 enami VRPCIU_MAW_PCIADDR(reg)); \
180 1.1 enami } while (0)
181 1.1 enami #define DUMP_TAW(sc, name, reg) do { \
182 1.1 enami printf("%s: %s =\t\t0x%08x\n", (sc)->sc_dev.dv_xname, \
183 1.1 enami (name), (reg)); \
184 1.1 enami printf("%s:\tMASK =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
185 1.1 enami VRPCIU_TAW_ADDRMASK(reg)); \
186 1.1 enami printf("%s:\tWINEN =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
187 1.1 enami reg & VRPCIU_TAW_WINEN); \
188 1.1 enami printf("%s:\tIBA =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
189 1.1 enami VRPCIU_TAW_IBA(reg)); \
190 1.1 enami } while (0)
191 1.1 enami reg = vrpciu_read(sc, VRPCIU_MMAW1REG);
192 1.1 enami DUMP_MAW(sc, "MMAW1", reg);
193 1.1 enami reg = vrpciu_read(sc, VRPCIU_MMAW2REG);
194 1.1 enami DUMP_MAW(sc, "MMAW2", reg);
195 1.1 enami reg = vrpciu_read(sc, VRPCIU_TAW1REG);
196 1.1 enami DUMP_TAW(sc, "TAW1", reg);
197 1.1 enami reg = vrpciu_read(sc, VRPCIU_TAW2REG);
198 1.1 enami DUMP_TAW(sc, "TAW2", reg);
199 1.1 enami reg = vrpciu_read(sc, VRPCIU_MIOAWREG);
200 1.1 enami DUMP_MAW(sc, "MIOAW", reg);
201 1.1 enami printf("%s: BUSERRAD =\t0x%08x\n", sc->sc_dev.dv_xname,
202 1.1 enami vrpciu_read(sc, VRPCIU_BUSERRADREG));
203 1.1 enami printf("%s: INTCNTSTA =\t0x%08x\n", sc->sc_dev.dv_xname,
204 1.1 enami vrpciu_read(sc, VRPCIU_INTCNTSTAREG));
205 1.1 enami printf("%s: EXACC =\t0x%08x\n", sc->sc_dev.dv_xname,
206 1.1 enami vrpciu_read(sc, VRPCIU_EXACCREG));
207 1.1 enami printf("%s: RECONT =\t0x%08x\n", sc->sc_dev.dv_xname,
208 1.1 enami vrpciu_read(sc, VRPCIU_RECONTREG));
209 1.1 enami printf("%s: PCIEN =\t0x%08x\n", sc->sc_dev.dv_xname,
210 1.1 enami vrpciu_read(sc, VRPCIU_ENREG));
211 1.1 enami printf("%s: CLOCKSEL =\t0x%08x\n", sc->sc_dev.dv_xname,
212 1.1 enami vrpciu_read(sc, VRPCIU_CLKSELREG));
213 1.1 enami printf("%s: TRDYV =\t0x%08x\n", sc->sc_dev.dv_xname,
214 1.1 enami vrpciu_read(sc, VRPCIU_TRDYVREG));
215 1.1 enami printf("%s: CLKRUN =\t0x%08x\n", sc->sc_dev.dv_xname,
216 1.1 enami vrpciu_read_2(sc, VRPCIU_CLKRUNREG));
217 1.1 enami printf("%s: IDREG =\t0x%08x\n", sc->sc_dev.dv_xname,
218 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_ID_REG));
219 1.1 enami reg = vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG);
220 1.1 enami printf("%s: CSR =\t\t0x%08x\n", sc->sc_dev.dv_xname, reg);
221 1.1 enami vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG, reg);
222 1.1 enami printf("%s: CSR =\t\t0x%08x\n", sc->sc_dev.dv_xname,
223 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG));
224 1.1 enami printf("%s: CLASS =\t0x%08x\n", sc->sc_dev.dv_xname,
225 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_CLASS_REG));
226 1.1 enami printf("%s: BHLC =\t\t0x%08x\n", sc->sc_dev.dv_xname,
227 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_BHLC_REG));
228 1.1 enami printf("%s: MAIL =\t\t0x%08x\n", sc->sc_dev.dv_xname,
229 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MAILREG));
230 1.1 enami printf("%s: MBA1 =\t\t0x%08x\n", sc->sc_dev.dv_xname,
231 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA1REG));
232 1.1 enami printf("%s: MBA2 =\t\t0x%08x\n", sc->sc_dev.dv_xname,
233 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA2REG));
234 1.1 enami printf("%s: INTR =\t\t0x%08x\n", sc->sc_dev.dv_xname,
235 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG));
236 1.1 enami #if 0
237 1.1 enami vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG,
238 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG) | 0x01);
239 1.1 enami printf("%s: INTR =\t\t0x%08x\n", sc->sc_dev.dv_xname,
240 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG));
241 1.1 enami #endif
242 1.1 enami #endif
243 1.1 enami
244 1.1 enami pc->pc_dev = &sc->sc_dev;
245 1.1 enami pc->pc_attach_hook = vrpciu_attach_hook;
246 1.1 enami pc->pc_bus_maxdevs = vrpciu_bus_maxdevs;
247 1.1 enami pc->pc_bus_devorder = vrc4173bcu_pci_bus_devorder;
248 1.1 enami pc->pc_make_tag = vrpciu_make_tag;
249 1.1 enami pc->pc_decompose_tag = vrpciu_decompose_tag;
250 1.1 enami pc->pc_conf_read = vrpciu_conf_read;
251 1.1 enami pc->pc_conf_write = vrpciu_conf_write;
252 1.1 enami pc->pc_intr_map = vrc4173bcu_pci_intr_map;
253 1.1 enami pc->pc_intr_string = vrc4173bcu_pci_intr_string;
254 1.1 enami pc->pc_intr_evcnt = vrc4173bcu_pci_intr_evcnt;
255 1.1 enami pc->pc_intr_establish = vrpciu_intr_establish;
256 1.1 enami pc->pc_intr_disestablish = vrpciu_intr_disestablish;
257 1.1 enami pc->pc_vrcintr_establish = vrpciu_vrcintr_establish;
258 1.1 enami pc->pc_vrcintr_disestablish = vrpciu_vrcintr_disestablish;
259 1.1 enami
260 1.1 enami #if 0
261 1.1 enami {
262 1.1 enami int i;
263 1.1 enami
264 1.1 enami for (i = 0; i < 8; i++)
265 1.1 enami printf("%s: ID_REG(0, 0, %d) = 0x%08x\n",
266 1.1 enami sc->sc_dev.dv_xname, i,
267 1.1 enami pci_conf_read(pc, pci_make_tag(pc, 0, 0, i),
268 1.1 enami PCI_ID_REG));
269 1.1 enami }
270 1.1 enami #endif
271 1.1 enami
272 1.1 enami #if NPCI > 0
273 1.1 enami memset(&pba, 0, sizeof(pba));
274 1.1 enami pba.pba_busname = "pci";
275 1.1 enami
276 1.1 enami /* For now, just inherit window mappings set by WinCE. XXX. */
277 1.1 enami
278 1.1 enami pba.pba_iot = iot = hpcmips_alloc_bus_space_tag();
279 1.1 enami reg = vrpciu_read(sc, VRPCIU_MIOAWREG);
280 1.1 enami iot->t_base = VRPCIU_MAW_ADDR(reg);
281 1.1 enami iot->t_size = VRPCIU_MAW_SIZE(reg);
282 1.1 enami snprintf(iot->t_name, sizeof(iot->t_name), "%s/iot",
283 1.1 enami sc->sc_dev.dv_xname);
284 1.1 enami hpcmips_init_bus_space_extent(iot);
285 1.1 enami
286 1.1 enami /*
287 1.1 enami * Just use system bus space tag. It works since WinCE maps
288 1.1 enami * PCI bus space at same offset. But this isn't right thing
289 1.1 enami * of course. XXX.
290 1.1 enami */
291 1.1 enami pba.pba_memt = sc->sc_iot;
292 1.1 enami pba.pba_dmat = &hpcmips_default_bus_dma_tag;
293 1.1 enami pba.pba_bus = 0;
294 1.1 enami pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
295 1.1 enami PCI_FLAGS_MRL_OKAY;
296 1.1 enami pba.pba_pc = pc;
297 1.1 enami
298 1.1 enami config_found(self, &pba, vrpciu_print);
299 1.1 enami #endif
300 1.1 enami }
301 1.1 enami
302 1.1 enami #if NPCI > 0
303 1.1 enami static int
304 1.1 enami vrpciu_print(void *aux, const char *pnp)
305 1.1 enami {
306 1.1 enami struct pcibus_attach_args *pba = aux;
307 1.1 enami
308 1.1 enami if (pnp != NULL)
309 1.1 enami printf("%s at %s", pba->pba_busname, pnp);
310 1.1 enami else
311 1.1 enami printf(" bus %d", pba->pba_bus);
312 1.1 enami
313 1.1 enami return (UNCONF);
314 1.1 enami }
315 1.1 enami #endif
316 1.1 enami
317 1.1 enami /*
318 1.1 enami * Handle PCI error interrupts.
319 1.1 enami */
320 1.1 enami int
321 1.1 enami vrpciu_intr(void *arg)
322 1.1 enami {
323 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)arg;
324 1.1 enami u_int32_t isr;
325 1.1 enami
326 1.1 enami isr = vrpciu_read(sc, VRPCIU_INTCNTSTAREG);
327 1.1 enami printf("%s: vrpciu_intr 0x%08x\n", sc->sc_dev.dv_xname, isr);
328 1.1 enami return ((isr & 0x0f) ? 1 : 0);
329 1.1 enami }
330 1.1 enami
331 1.1 enami void
332 1.1 enami vrpciu_attach_hook(struct device *parent, struct device *self,
333 1.1 enami struct pcibus_attach_args *pba)
334 1.1 enami {
335 1.1 enami
336 1.1 enami return;
337 1.1 enami }
338 1.1 enami
339 1.1 enami int
340 1.1 enami vrpciu_bus_maxdevs(pci_chipset_tag_t pc, int busno)
341 1.1 enami {
342 1.1 enami
343 1.1 enami return (32);
344 1.1 enami }
345 1.1 enami
346 1.1 enami pcitag_t
347 1.1 enami vrpciu_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
348 1.1 enami {
349 1.1 enami
350 1.1 enami return ((bus << 16) | (device << 11) | (function << 8));
351 1.1 enami }
352 1.1 enami
353 1.1 enami void
354 1.1 enami vrpciu_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
355 1.1 enami int *fp)
356 1.1 enami {
357 1.1 enami
358 1.1 enami if (bp != NULL)
359 1.1 enami *bp = (tag >> 16) & 0xff;
360 1.1 enami if (dp != NULL)
361 1.1 enami *dp = (tag >> 11) & 0x1f;
362 1.1 enami if (fp != NULL)
363 1.1 enami *fp = (tag >> 8) & 0x07;
364 1.1 enami }
365 1.1 enami
366 1.1 enami pcireg_t
367 1.1 enami vrpciu_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
368 1.1 enami {
369 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
370 1.1 enami u_int32_t val;
371 1.1 enami int bus, device, function;
372 1.1 enami
373 1.1 enami pci_decompose_tag(pc, tag, &bus, &device, &function);
374 1.1 enami if (bus == 0) {
375 1.1 enami if (device > 21)
376 1.1 enami return ((pcitag_t)-1);
377 1.1 enami tag = (1 << (device + 11)) | (function << 8); /* Type 0 */
378 1.1 enami } else
379 1.1 enami tag |= VRPCIU_CONF_TYPE1;
380 1.1 enami
381 1.1 enami vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg);
382 1.1 enami val = vrpciu_read(sc, VRPCIU_CONFDREG);
383 1.1 enami #if 0
384 1.1 enami printf("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
385 1.1 enami sc->sc_dev.dv_xname, (u_int32_t)tag, reg, val);
386 1.1 enami #endif
387 1.1 enami return (val);
388 1.1 enami }
389 1.1 enami
390 1.1 enami void
391 1.1 enami vrpciu_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
392 1.1 enami pcireg_t data)
393 1.1 enami {
394 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
395 1.1 enami int bus, device, function;
396 1.1 enami
397 1.1 enami #if 0
398 1.1 enami printf("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
399 1.1 enami sc->sc_dev.dv_xname, (u_int32_t)tag, reg, (u_int32_t)data);
400 1.1 enami #endif
401 1.1 enami vrpciu_decompose_tag(pc, tag, &bus, &device, &function);
402 1.1 enami if (bus == 0) {
403 1.1 enami if (device > 21)
404 1.1 enami return;
405 1.1 enami tag = (1 << (device + 11)) | (function << 8); /* Type 0 */
406 1.1 enami } else
407 1.1 enami tag |= VRPCIU_CONF_TYPE1;
408 1.1 enami
409 1.1 enami vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg);
410 1.1 enami vrpciu_write(sc, VRPCIU_CONFDREG, data);
411 1.1 enami }
412 1.1 enami
413 1.1 enami void *
414 1.1 enami vrpciu_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
415 1.1 enami int (*func)(void *), void *arg)
416 1.1 enami {
417 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
418 1.1 enami
419 1.1 enami if (ih == -1)
420 1.1 enami return (NULL);
421 1.1 enami DPRINTF(("vrpciu_intr_establish: %p\n", sc));
422 1.1 enami return (vrc4173bcu_intr_establish(sc->sc_bcu, ih, func, arg));
423 1.1 enami }
424 1.1 enami
425 1.1 enami void
426 1.1 enami vrpciu_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
427 1.1 enami {
428 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
429 1.1 enami
430 1.1 enami DPRINTF(("vrpciu_intr_disestablish: %p\n", sc));
431 1.1 enami vrc4173bcu_intr_disestablish(sc->sc_bcu, cookie);
432 1.1 enami }
433 1.1 enami
434 1.1 enami void *
435 1.1 enami vrpciu_vrcintr_establish(pci_chipset_tag_t pc, int port,
436 1.1 enami int (*func)(void *), void *arg)
437 1.1 enami {
438 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
439 1.1 enami struct vrip_softc *vsc = (struct vrip_softc *)sc->sc_vc;
440 1.1 enami void *ih;
441 1.1 enami
442 1.1 enami sc->sc_bcu = arg;
443 1.1 enami ih = hpcio_intr_establish(vsc->sc_gpio_chips[VRIP_IOCHIP_VRGIU],
444 1.1 enami port, HPCIO_INTR_LEVEL | HPCIO_INTR_LOW | HPCIO_INTR_HOLD,
445 1.1 enami func, arg);
446 1.1 enami
447 1.1 enami return (ih);
448 1.1 enami }
449 1.1 enami
450 1.1 enami void
451 1.1 enami vrpciu_vrcintr_disestablish(pci_chipset_tag_t pc, void *ih)
452 1.1 enami {
453 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
454 1.1 enami struct vrip_softc *vsc = (struct vrip_softc *)sc->sc_vc;
455 1.1 enami
456 1.1 enami return (vrip_intr_disestablish(vsc->sc_gpio_chips[VRIP_IOCHIP_VRGIU],
457 1.1 enami ih));
458 1.1 enami }
459