vrpciu.c revision 1.16 1 1.16 abs /* $NetBSD: vrpciu.c,v 1.16 2004/12/12 21:03:06 abs Exp $ */
2 1.1 enami
3 1.1 enami /*-
4 1.1 enami * Copyright (c) 2001 Enami Tsugutomo.
5 1.1 enami * All rights reserved.
6 1.1 enami *
7 1.1 enami * Redistribution and use in source and binary forms, with or without
8 1.1 enami * modification, are permitted provided that the following conditions
9 1.1 enami * are met:
10 1.1 enami * 1. Redistributions of source code must retain the above copyright
11 1.1 enami * notice, this list of conditions and the following disclaimer.
12 1.1 enami * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 enami * notice, this list of conditions and the following disclaimer in the
14 1.1 enami * documentation and/or other materials provided with the distribution.
15 1.1 enami *
16 1.1 enami * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 1.1 enami * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.1 enami * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.1 enami * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 1.1 enami * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.1 enami * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.1 enami * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.1 enami * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.1 enami * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 enami * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 enami * SUCH DAMAGE.
27 1.1 enami */
28 1.14 lukem
29 1.14 lukem #include <sys/cdefs.h>
30 1.16 abs __KERNEL_RCSID(0, "$NetBSD: vrpciu.c,v 1.16 2004/12/12 21:03:06 abs Exp $");
31 1.1 enami
32 1.1 enami #include <sys/param.h>
33 1.1 enami #include <sys/systm.h>
34 1.1 enami #include <sys/device.h>
35 1.1 enami
36 1.1 enami #include <machine/bus.h>
37 1.2 takemura #include <machine/bus_space_hpcmips.h>
38 1.2 takemura #include <machine/bus_dma_hpcmips.h>
39 1.4 takemura #include <machine/config_hook.h>
40 1.5 shin #include <machine/platid.h>
41 1.5 shin #include <machine/platid_mask.h>
42 1.1 enami
43 1.1 enami #include <dev/pci/pcivar.h>
44 1.3 takemura #include <dev/pci/pcidevs.h>
45 1.5 shin #include <dev/pci/pciidereg.h>
46 1.1 enami
47 1.1 enami #include <hpcmips/vr/icureg.h>
48 1.6 takemura #include <hpcmips/vr/vripif.h>
49 1.1 enami #include <hpcmips/vr/vrpciureg.h>
50 1.1 enami
51 1.1 enami #include "pci.h"
52 1.1 enami
53 1.1 enami #ifdef DEBUG
54 1.1 enami #define DPRINTF(args) printf args
55 1.1 enami #else
56 1.1 enami #define DPRINTF(args)
57 1.1 enami #endif
58 1.1 enami
59 1.1 enami struct vrpciu_softc {
60 1.1 enami struct device sc_dev;
61 1.1 enami
62 1.1 enami vrip_chipset_tag_t sc_vc;
63 1.1 enami bus_space_tag_t sc_iot;
64 1.1 enami bus_space_handle_t sc_ioh;
65 1.1 enami void *sc_ih;
66 1.1 enami
67 1.1 enami struct vrc4173bcu_softc *sc_bcu; /* vrc4173bcu */
68 1.1 enami
69 1.1 enami struct hpcmips_pci_chipset sc_pc;
70 1.1 enami };
71 1.1 enami
72 1.1 enami static void vrpciu_write(struct vrpciu_softc *, int, u_int32_t);
73 1.1 enami static u_int32_t
74 1.1 enami vrpciu_read(struct vrpciu_softc *, int);
75 1.1 enami #ifdef DEBUG
76 1.1 enami static void vrpciu_write_2(struct vrpciu_softc *, int, u_int16_t)
77 1.1 enami __attribute__((unused));
78 1.1 enami static u_int16_t
79 1.1 enami vrpciu_read_2(struct vrpciu_softc *, int);
80 1.1 enami #endif
81 1.1 enami static int vrpciu_match(struct device *, struct cfdata *, void *);
82 1.1 enami static void vrpciu_attach(struct device *, struct device *, void *);
83 1.1 enami static int vrpciu_intr(void *);
84 1.1 enami static void vrpciu_attach_hook(struct device *, struct device *,
85 1.1 enami struct pcibus_attach_args *);
86 1.1 enami static int vrpciu_bus_maxdevs(pci_chipset_tag_t, int);
87 1.3 takemura static int vrpciu_bus_devorder(pci_chipset_tag_t, int, char *);
88 1.1 enami static pcitag_t vrpciu_make_tag(pci_chipset_tag_t, int, int, int);
89 1.1 enami static void vrpciu_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *,
90 1.1 enami int *);
91 1.1 enami static pcireg_t vrpciu_conf_read(pci_chipset_tag_t, pcitag_t, int);
92 1.1 enami static void vrpciu_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
93 1.4 takemura static int vrpciu_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
94 1.4 takemura static const char *vrpciu_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
95 1.4 takemura static const struct evcnt *vrpciu_intr_evcnt(pci_chipset_tag_t,
96 1.4 takemura pci_intr_handle_t);
97 1.1 enami static void *vrpciu_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
98 1.1 enami int, int (*)(void *), void *);
99 1.1 enami static void vrpciu_intr_disestablish(pci_chipset_tag_t, void *);
100 1.1 enami
101 1.11 thorpej CFATTACH_DECL(vrpciu, sizeof(struct vrpciu_softc),
102 1.11 thorpej vrpciu_match, vrpciu_attach, NULL, NULL);
103 1.1 enami
104 1.1 enami static void
105 1.1 enami vrpciu_write(struct vrpciu_softc *sc, int offset, u_int32_t val)
106 1.1 enami {
107 1.1 enami
108 1.1 enami bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);
109 1.1 enami }
110 1.1 enami
111 1.1 enami static u_int32_t
112 1.1 enami vrpciu_read(struct vrpciu_softc *sc, int offset)
113 1.1 enami {
114 1.1 enami
115 1.1 enami return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset));
116 1.1 enami }
117 1.1 enami
118 1.1 enami #ifdef DEBUG
119 1.1 enami static void
120 1.1 enami vrpciu_write_2(struct vrpciu_softc *sc, int offset, u_int16_t val)
121 1.1 enami {
122 1.1 enami
123 1.1 enami bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, val);
124 1.1 enami }
125 1.1 enami
126 1.1 enami static u_int16_t
127 1.1 enami vrpciu_read_2(struct vrpciu_softc *sc, int offset)
128 1.1 enami {
129 1.1 enami
130 1.1 enami return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset));
131 1.1 enami }
132 1.1 enami #endif
133 1.1 enami
134 1.1 enami static int
135 1.1 enami vrpciu_match(struct device *parent, struct cfdata *match, void *aux)
136 1.1 enami {
137 1.1 enami
138 1.1 enami return (1);
139 1.1 enami }
140 1.1 enami
141 1.1 enami static void
142 1.1 enami vrpciu_attach(struct device *parent, struct device *self, void *aux)
143 1.1 enami {
144 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)self;
145 1.1 enami pci_chipset_tag_t pc = &sc->sc_pc;
146 1.1 enami struct vrip_attach_args *va = aux;
147 1.7 takemura #if defined(DEBUG) || NPCI > 0
148 1.7 takemura u_int32_t reg;
149 1.7 takemura #endif
150 1.7 takemura #if NPCI > 0
151 1.2 takemura struct bus_space_tag_hpcmips *iot;
152 1.2 takemura char tmpbuf[16];
153 1.1 enami struct pcibus_attach_args pba;
154 1.1 enami #endif
155 1.1 enami
156 1.1 enami sc->sc_vc = va->va_vc;
157 1.1 enami sc->sc_iot = va->va_iot;
158 1.1 enami if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0,
159 1.1 enami &sc->sc_ioh)) {
160 1.1 enami printf(": couldn't map io space\n");
161 1.1 enami return;
162 1.1 enami }
163 1.1 enami
164 1.6 takemura sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_unit, 0, IPL_TTY,
165 1.1 enami vrpciu_intr, sc);
166 1.1 enami if (sc->sc_ih == NULL) {
167 1.1 enami printf(": couldn't establish interrupt\n");
168 1.1 enami return;
169 1.1 enami }
170 1.1 enami
171 1.1 enami /* Enable level 2 interrupt */
172 1.1 enami vrip_intr_setmask2(va->va_vc, sc->sc_ih, PCIINT_INT0, 1);
173 1.1 enami
174 1.1 enami printf("\n");
175 1.1 enami
176 1.1 enami #ifdef DEBUG
177 1.1 enami #define DUMP_MAW(sc, name, reg) do { \
178 1.1 enami printf("%s: %s =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
179 1.1 enami (name), (reg)); \
180 1.1 enami printf("%s:\tIBA/MASK =\t0x%08x/0x%08x (0x%08x - 0x%08x)\n", \
181 1.1 enami (sc)->sc_dev.dv_xname, \
182 1.1 enami reg & VRPCIU_MAW_IBAMASK, VRPCIU_MAW_ADDRMASK(reg), \
183 1.1 enami VRPCIU_MAW_ADDR(reg), \
184 1.1 enami VRPCIU_MAW_ADDR(reg) + VRPCIU_MAW_SIZE(reg)); \
185 1.1 enami printf("%s:\tWINEN =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
186 1.1 enami reg & VRPCIU_MAW_WINEN); \
187 1.1 enami printf("%s:\tPCIADR =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
188 1.1 enami VRPCIU_MAW_PCIADDR(reg)); \
189 1.1 enami } while (0)
190 1.1 enami #define DUMP_TAW(sc, name, reg) do { \
191 1.1 enami printf("%s: %s =\t\t0x%08x\n", (sc)->sc_dev.dv_xname, \
192 1.1 enami (name), (reg)); \
193 1.1 enami printf("%s:\tMASK =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
194 1.1 enami VRPCIU_TAW_ADDRMASK(reg)); \
195 1.1 enami printf("%s:\tWINEN =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
196 1.1 enami reg & VRPCIU_TAW_WINEN); \
197 1.1 enami printf("%s:\tIBA =\t0x%08x\n", (sc)->sc_dev.dv_xname, \
198 1.1 enami VRPCIU_TAW_IBA(reg)); \
199 1.1 enami } while (0)
200 1.1 enami reg = vrpciu_read(sc, VRPCIU_MMAW1REG);
201 1.1 enami DUMP_MAW(sc, "MMAW1", reg);
202 1.1 enami reg = vrpciu_read(sc, VRPCIU_MMAW2REG);
203 1.1 enami DUMP_MAW(sc, "MMAW2", reg);
204 1.1 enami reg = vrpciu_read(sc, VRPCIU_TAW1REG);
205 1.1 enami DUMP_TAW(sc, "TAW1", reg);
206 1.1 enami reg = vrpciu_read(sc, VRPCIU_TAW2REG);
207 1.1 enami DUMP_TAW(sc, "TAW2", reg);
208 1.1 enami reg = vrpciu_read(sc, VRPCIU_MIOAWREG);
209 1.1 enami DUMP_MAW(sc, "MIOAW", reg);
210 1.1 enami printf("%s: BUSERRAD =\t0x%08x\n", sc->sc_dev.dv_xname,
211 1.1 enami vrpciu_read(sc, VRPCIU_BUSERRADREG));
212 1.1 enami printf("%s: INTCNTSTA =\t0x%08x\n", sc->sc_dev.dv_xname,
213 1.1 enami vrpciu_read(sc, VRPCIU_INTCNTSTAREG));
214 1.1 enami printf("%s: EXACC =\t0x%08x\n", sc->sc_dev.dv_xname,
215 1.1 enami vrpciu_read(sc, VRPCIU_EXACCREG));
216 1.1 enami printf("%s: RECONT =\t0x%08x\n", sc->sc_dev.dv_xname,
217 1.1 enami vrpciu_read(sc, VRPCIU_RECONTREG));
218 1.1 enami printf("%s: PCIEN =\t0x%08x\n", sc->sc_dev.dv_xname,
219 1.1 enami vrpciu_read(sc, VRPCIU_ENREG));
220 1.1 enami printf("%s: CLOCKSEL =\t0x%08x\n", sc->sc_dev.dv_xname,
221 1.1 enami vrpciu_read(sc, VRPCIU_CLKSELREG));
222 1.1 enami printf("%s: TRDYV =\t0x%08x\n", sc->sc_dev.dv_xname,
223 1.1 enami vrpciu_read(sc, VRPCIU_TRDYVREG));
224 1.1 enami printf("%s: CLKRUN =\t0x%08x\n", sc->sc_dev.dv_xname,
225 1.1 enami vrpciu_read_2(sc, VRPCIU_CLKRUNREG));
226 1.1 enami printf("%s: IDREG =\t0x%08x\n", sc->sc_dev.dv_xname,
227 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_ID_REG));
228 1.1 enami reg = vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG);
229 1.1 enami printf("%s: CSR =\t\t0x%08x\n", sc->sc_dev.dv_xname, reg);
230 1.1 enami vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG, reg);
231 1.1 enami printf("%s: CSR =\t\t0x%08x\n", sc->sc_dev.dv_xname,
232 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG));
233 1.1 enami printf("%s: CLASS =\t0x%08x\n", sc->sc_dev.dv_xname,
234 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_CLASS_REG));
235 1.1 enami printf("%s: BHLC =\t\t0x%08x\n", sc->sc_dev.dv_xname,
236 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_BHLC_REG));
237 1.1 enami printf("%s: MAIL =\t\t0x%08x\n", sc->sc_dev.dv_xname,
238 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MAILREG));
239 1.1 enami printf("%s: MBA1 =\t\t0x%08x\n", sc->sc_dev.dv_xname,
240 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA1REG));
241 1.1 enami printf("%s: MBA2 =\t\t0x%08x\n", sc->sc_dev.dv_xname,
242 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA2REG));
243 1.1 enami printf("%s: INTR =\t\t0x%08x\n", sc->sc_dev.dv_xname,
244 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG));
245 1.1 enami #if 0
246 1.1 enami vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG,
247 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG) | 0x01);
248 1.1 enami printf("%s: INTR =\t\t0x%08x\n", sc->sc_dev.dv_xname,
249 1.1 enami vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG));
250 1.1 enami #endif
251 1.1 enami #endif
252 1.1 enami
253 1.1 enami pc->pc_dev = &sc->sc_dev;
254 1.1 enami pc->pc_attach_hook = vrpciu_attach_hook;
255 1.1 enami pc->pc_bus_maxdevs = vrpciu_bus_maxdevs;
256 1.3 takemura pc->pc_bus_devorder = vrpciu_bus_devorder;
257 1.1 enami pc->pc_make_tag = vrpciu_make_tag;
258 1.1 enami pc->pc_decompose_tag = vrpciu_decompose_tag;
259 1.1 enami pc->pc_conf_read = vrpciu_conf_read;
260 1.1 enami pc->pc_conf_write = vrpciu_conf_write;
261 1.4 takemura pc->pc_intr_map = vrpciu_intr_map;
262 1.4 takemura pc->pc_intr_string = vrpciu_intr_string;
263 1.4 takemura pc->pc_intr_evcnt = vrpciu_intr_evcnt;
264 1.1 enami pc->pc_intr_establish = vrpciu_intr_establish;
265 1.1 enami pc->pc_intr_disestablish = vrpciu_intr_disestablish;
266 1.1 enami
267 1.1 enami #if 0
268 1.1 enami {
269 1.1 enami int i;
270 1.1 enami
271 1.1 enami for (i = 0; i < 8; i++)
272 1.1 enami printf("%s: ID_REG(0, 0, %d) = 0x%08x\n",
273 1.1 enami sc->sc_dev.dv_xname, i,
274 1.1 enami pci_conf_read(pc, pci_make_tag(pc, 0, 0, i),
275 1.1 enami PCI_ID_REG));
276 1.1 enami }
277 1.1 enami #endif
278 1.1 enami
279 1.1 enami #if NPCI > 0
280 1.1 enami memset(&pba, 0, sizeof(pba));
281 1.1 enami
282 1.1 enami /* For now, just inherit window mappings set by WinCE. XXX. */
283 1.1 enami
284 1.2 takemura iot = hpcmips_alloc_bus_space_tag();
285 1.1 enami reg = vrpciu_read(sc, VRPCIU_MIOAWREG);
286 1.2 takemura snprintf(tmpbuf, sizeof(tmpbuf), "%s/iot",
287 1.1 enami sc->sc_dev.dv_xname);
288 1.2 takemura hpcmips_init_bus_space(iot, (struct bus_space_tag_hpcmips *)sc->sc_iot,
289 1.2 takemura tmpbuf, VRPCIU_MAW_ADDR(reg), VRPCIU_MAW_SIZE(reg));
290 1.2 takemura pba.pba_iot = &iot->bst;
291 1.1 enami
292 1.1 enami /*
293 1.1 enami * Just use system bus space tag. It works since WinCE maps
294 1.1 enami * PCI bus space at same offset. But this isn't right thing
295 1.1 enami * of course. XXX.
296 1.1 enami */
297 1.1 enami pba.pba_memt = sc->sc_iot;
298 1.2 takemura pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt;
299 1.13 fvdl pba.pba_dmat64 = NULL;
300 1.1 enami pba.pba_bus = 0;
301 1.9 thorpej pba.pba_bridgetag = NULL;
302 1.5 shin
303 1.5 shin if (platid_match(&platid, &platid_mask_MACH_LASER5_L_BOARD)) {
304 1.5 shin /*
305 1.16 abs * fix PCI device configuration for L-Router.
306 1.5 shin */
307 1.5 shin /* change IDE controller to native mode */
308 1.5 shin reg = pci_conf_read(pc, pci_make_tag(pc, 0, 16, 0),
309 1.5 shin PCI_CLASS_REG);
310 1.5 shin reg |= PCIIDE_INTERFACE_PCI(0) << PCI_INTERFACE_SHIFT;
311 1.5 shin reg |= PCIIDE_INTERFACE_PCI(1) << PCI_INTERFACE_SHIFT;
312 1.5 shin pci_conf_write(pc, pci_make_tag(pc, 0, 16, 0), PCI_CLASS_REG,
313 1.5 shin reg);
314 1.5 shin /* fix broken BAR setting of fxp0, fxp1 */
315 1.5 shin pci_conf_write(pc, pci_make_tag(pc, 0, 0, 0), PCI_MAPREG_START,
316 1.5 shin 0x11100000);
317 1.5 shin pci_conf_write(pc, pci_make_tag(pc, 0, 1, 0), PCI_MAPREG_START,
318 1.5 shin 0x11200000);
319 1.5 shin }
320 1.5 shin
321 1.1 enami pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
322 1.1 enami PCI_FLAGS_MRL_OKAY;
323 1.1 enami pba.pba_pc = pc;
324 1.1 enami
325 1.15 drochner config_found_ia(self, "pcibus", &pba, pcibusprint);
326 1.1 enami #endif
327 1.1 enami }
328 1.1 enami
329 1.1 enami /*
330 1.1 enami * Handle PCI error interrupts.
331 1.1 enami */
332 1.1 enami int
333 1.1 enami vrpciu_intr(void *arg)
334 1.1 enami {
335 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)arg;
336 1.8 takemura u_int32_t isr, baddr;
337 1.1 enami
338 1.1 enami isr = vrpciu_read(sc, VRPCIU_INTCNTSTAREG);
339 1.8 takemura baddr = vrpciu_read(sc, VRPCIU_BUSERRADREG);
340 1.8 takemura printf("%s: status=0x%08x bad addr=0x%08x\n",
341 1.8 takemura sc->sc_dev.dv_xname, isr, baddr);
342 1.1 enami return ((isr & 0x0f) ? 1 : 0);
343 1.1 enami }
344 1.1 enami
345 1.1 enami void
346 1.1 enami vrpciu_attach_hook(struct device *parent, struct device *self,
347 1.1 enami struct pcibus_attach_args *pba)
348 1.1 enami {
349 1.1 enami
350 1.1 enami return;
351 1.1 enami }
352 1.1 enami
353 1.1 enami int
354 1.1 enami vrpciu_bus_maxdevs(pci_chipset_tag_t pc, int busno)
355 1.1 enami {
356 1.1 enami
357 1.1 enami return (32);
358 1.1 enami }
359 1.1 enami
360 1.3 takemura int
361 1.3 takemura vrpciu_bus_devorder(pci_chipset_tag_t pc, int busno, char *devs)
362 1.3 takemura {
363 1.3 takemura int i, dev;
364 1.3 takemura char priorities[32];
365 1.3 takemura static pcireg_t ids[] = {
366 1.3 takemura /* these devices should be attached first */
367 1.3 takemura PCI_ID_CODE(PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VRC4173_BCU),
368 1.3 takemura };
369 1.3 takemura
370 1.3 takemura /* scan PCI devices and check the id table */
371 1.3 takemura memset(priorities, 0, sizeof(priorities));
372 1.3 takemura for (dev = 0; dev < 32; dev++) {
373 1.3 takemura pcireg_t id;
374 1.3 takemura id = pci_conf_read(pc, pci_make_tag(pc, 0, dev, 0),PCI_ID_REG);
375 1.3 takemura for (i = 0; i < sizeof(ids)/sizeof(*ids); i++)
376 1.3 takemura if (id == ids[i])
377 1.3 takemura priorities[dev] = 1;
378 1.3 takemura }
379 1.3 takemura
380 1.3 takemura /* fill order array */
381 1.3 takemura for (i = 1; 0 <= i; i--)
382 1.3 takemura for (dev = 0; dev < 32; dev++)
383 1.3 takemura if (priorities[dev] == i)
384 1.3 takemura *devs++ = dev;
385 1.3 takemura
386 1.3 takemura return (32);
387 1.3 takemura }
388 1.3 takemura
389 1.1 enami pcitag_t
390 1.1 enami vrpciu_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
391 1.1 enami {
392 1.1 enami
393 1.1 enami return ((bus << 16) | (device << 11) | (function << 8));
394 1.1 enami }
395 1.1 enami
396 1.1 enami void
397 1.1 enami vrpciu_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
398 1.1 enami int *fp)
399 1.1 enami {
400 1.1 enami
401 1.1 enami if (bp != NULL)
402 1.1 enami *bp = (tag >> 16) & 0xff;
403 1.1 enami if (dp != NULL)
404 1.1 enami *dp = (tag >> 11) & 0x1f;
405 1.1 enami if (fp != NULL)
406 1.1 enami *fp = (tag >> 8) & 0x07;
407 1.1 enami }
408 1.1 enami
409 1.1 enami pcireg_t
410 1.1 enami vrpciu_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
411 1.1 enami {
412 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
413 1.1 enami u_int32_t val;
414 1.1 enami int bus, device, function;
415 1.1 enami
416 1.1 enami pci_decompose_tag(pc, tag, &bus, &device, &function);
417 1.1 enami if (bus == 0) {
418 1.1 enami if (device > 21)
419 1.1 enami return ((pcitag_t)-1);
420 1.1 enami tag = (1 << (device + 11)) | (function << 8); /* Type 0 */
421 1.1 enami } else
422 1.1 enami tag |= VRPCIU_CONF_TYPE1;
423 1.1 enami
424 1.1 enami vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg);
425 1.1 enami val = vrpciu_read(sc, VRPCIU_CONFDREG);
426 1.1 enami #if 0
427 1.1 enami printf("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
428 1.1 enami sc->sc_dev.dv_xname, (u_int32_t)tag, reg, val);
429 1.1 enami #endif
430 1.1 enami return (val);
431 1.1 enami }
432 1.1 enami
433 1.1 enami void
434 1.1 enami vrpciu_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
435 1.1 enami pcireg_t data)
436 1.1 enami {
437 1.1 enami struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev;
438 1.1 enami int bus, device, function;
439 1.1 enami
440 1.1 enami #if 0
441 1.1 enami printf("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
442 1.1 enami sc->sc_dev.dv_xname, (u_int32_t)tag, reg, (u_int32_t)data);
443 1.1 enami #endif
444 1.1 enami vrpciu_decompose_tag(pc, tag, &bus, &device, &function);
445 1.1 enami if (bus == 0) {
446 1.1 enami if (device > 21)
447 1.1 enami return;
448 1.1 enami tag = (1 << (device + 11)) | (function << 8); /* Type 0 */
449 1.1 enami } else
450 1.1 enami tag |= VRPCIU_CONF_TYPE1;
451 1.1 enami
452 1.1 enami vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg);
453 1.1 enami vrpciu_write(sc, VRPCIU_CONFDREG, data);
454 1.1 enami }
455 1.1 enami
456 1.4 takemura int
457 1.4 takemura vrpciu_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
458 1.4 takemura {
459 1.4 takemura pci_chipset_tag_t pc = pa->pa_pc;
460 1.4 takemura pcitag_t intrtag = pa->pa_intrtag;
461 1.4 takemura int bus, dev, func;
462 1.4 takemura #ifdef DEBUG
463 1.4 takemura int line = pa->pa_intrline;
464 1.4 takemura int pin = pa->pa_intrpin;
465 1.4 takemura #endif
466 1.4 takemura
467 1.4 takemura pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
468 1.4 takemura DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", pc->pc_dev->dv_xname,
469 1.4 takemura bus, dev, func, line, pin));
470 1.4 takemura
471 1.4 takemura *ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func);
472 1.4 takemura
473 1.4 takemura return (0);
474 1.4 takemura }
475 1.4 takemura
476 1.4 takemura const char *
477 1.4 takemura vrpciu_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
478 1.1 enami {
479 1.4 takemura static char irqstr[sizeof("pciintr") + 16];
480 1.4 takemura
481 1.4 takemura snprintf(irqstr, sizeof(irqstr), "pciintr %d:%d:%d",
482 1.4 takemura CONFIG_HOOK_PCIINTR_BUS((int)ih),
483 1.4 takemura CONFIG_HOOK_PCIINTR_DEVICE((int)ih),
484 1.4 takemura CONFIG_HOOK_PCIINTR_FUNCTION((int)ih));
485 1.1 enami
486 1.4 takemura return (irqstr);
487 1.1 enami }
488 1.1 enami
489 1.4 takemura const struct evcnt *
490 1.4 takemura vrpciu_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
491 1.1 enami {
492 1.1 enami
493 1.4 takemura /* XXX for now, no evcnt parent reported */
494 1.4 takemura
495 1.4 takemura return (NULL);
496 1.1 enami }
497 1.1 enami
498 1.1 enami void *
499 1.4 takemura vrpciu_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
500 1.1 enami int (*func)(void *), void *arg)
501 1.1 enami {
502 1.1 enami
503 1.4 takemura if (ih == -1)
504 1.4 takemura return (NULL);
505 1.7 takemura DPRINTF(("vrpciu_intr_establish: %lx\n", ih));
506 1.3 takemura
507 1.4 takemura return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE,
508 1.4 takemura (int (*)(void *, int, long, void *))func, arg));
509 1.1 enami }
510 1.1 enami
511 1.1 enami void
512 1.4 takemura vrpciu_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
513 1.1 enami {
514 1.1 enami
515 1.7 takemura DPRINTF(("vrpciu_intr_disestablish: %p\n", cookie));
516 1.4 takemura config_unhook(cookie);
517 1.1 enami }
518