vrpciu.c revision 1.20
1 /* $NetBSD: vrpciu.c,v 1.20 2012/10/27 17:17:56 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 Enami Tsugutomo. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: vrpciu.c,v 1.20 2012/10/27 17:17:56 chs Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 36 #include <machine/bus.h> 37 #include <machine/bus_space_hpcmips.h> 38 #include <machine/bus_dma_hpcmips.h> 39 #include <machine/config_hook.h> 40 #include <machine/platid.h> 41 #include <machine/platid_mask.h> 42 43 #include <dev/pci/pcivar.h> 44 #include <dev/pci/pcidevs.h> 45 #include <dev/pci/pciidereg.h> 46 47 #include <hpcmips/vr/icureg.h> 48 #include <hpcmips/vr/vripif.h> 49 #include <hpcmips/vr/vrpciureg.h> 50 51 #include "pci.h" 52 53 #ifdef DEBUG 54 #define DPRINTF(args) printf args 55 #else 56 #define DPRINTF(args) 57 #endif 58 59 struct vrpciu_softc { 60 device_t sc_dev; 61 62 vrip_chipset_tag_t sc_vc; 63 bus_space_tag_t sc_iot; 64 bus_space_handle_t sc_ioh; 65 void *sc_ih; 66 67 struct vrc4173bcu_softc *sc_bcu; /* vrc4173bcu */ 68 69 struct hpcmips_pci_chipset sc_pc; 70 }; 71 72 static void vrpciu_write(struct vrpciu_softc *, int, u_int32_t); 73 static u_int32_t 74 vrpciu_read(struct vrpciu_softc *, int); 75 #ifdef DEBUG 76 static void vrpciu_write_2(struct vrpciu_softc *, int, u_int16_t) 77 __attribute__((unused)); 78 static u_int16_t 79 vrpciu_read_2(struct vrpciu_softc *, int); 80 #endif 81 static int vrpciu_match(device_t, cfdata_t, void *); 82 static void vrpciu_attach(device_t, device_t, void *); 83 static int vrpciu_intr(void *); 84 static void vrpciu_attach_hook(device_t, device_t, 85 struct pcibus_attach_args *); 86 static int vrpciu_bus_maxdevs(pci_chipset_tag_t, int); 87 static int vrpciu_bus_devorder(pci_chipset_tag_t, int, uint8_t *, int); 88 static pcitag_t vrpciu_make_tag(pci_chipset_tag_t, int, int, int); 89 static void vrpciu_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *, 90 int *); 91 static pcireg_t vrpciu_conf_read(pci_chipset_tag_t, pcitag_t, int); 92 static void vrpciu_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 93 static int vrpciu_intr_map(const struct pci_attach_args *, pci_intr_handle_t *); 94 static const char *vrpciu_intr_string(pci_chipset_tag_t, pci_intr_handle_t); 95 static const struct evcnt *vrpciu_intr_evcnt(pci_chipset_tag_t, 96 pci_intr_handle_t); 97 static void *vrpciu_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, 98 int, int (*)(void *), void *); 99 static void vrpciu_intr_disestablish(pci_chipset_tag_t, void *); 100 101 CFATTACH_DECL_NEW(vrpciu, sizeof(struct vrpciu_softc), 102 vrpciu_match, vrpciu_attach, NULL, NULL); 103 104 static void 105 vrpciu_write(struct vrpciu_softc *sc, int offset, u_int32_t val) 106 { 107 108 bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val); 109 } 110 111 static u_int32_t 112 vrpciu_read(struct vrpciu_softc *sc, int offset) 113 { 114 115 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset)); 116 } 117 118 #ifdef DEBUG 119 static void 120 vrpciu_write_2(struct vrpciu_softc *sc, int offset, u_int16_t val) 121 { 122 123 bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, val); 124 } 125 126 static u_int16_t 127 vrpciu_read_2(struct vrpciu_softc *sc, int offset) 128 { 129 130 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset)); 131 } 132 #endif 133 134 static int 135 vrpciu_match(device_t parent, cfdata_t match, void *aux) 136 { 137 138 return (1); 139 } 140 141 static void 142 vrpciu_attach(device_t parent, device_t self, void *aux) 143 { 144 struct vrpciu_softc *sc = device_private(self); 145 pci_chipset_tag_t pc = &sc->sc_pc; 146 struct vrip_attach_args *va = aux; 147 #if defined(DEBUG) || NPCI > 0 148 u_int32_t reg; 149 #endif 150 #if NPCI > 0 151 struct bus_space_tag_hpcmips *iot; 152 char tmpbuf[16]; 153 struct pcibus_attach_args pba; 154 #endif 155 156 sc->sc_dev = self; 157 sc->sc_vc = va->va_vc; 158 sc->sc_iot = va->va_iot; 159 if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0, 160 &sc->sc_ioh)) { 161 printf(": couldn't map io space\n"); 162 return; 163 } 164 165 sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_unit, 0, IPL_TTY, 166 vrpciu_intr, sc); 167 if (sc->sc_ih == NULL) { 168 printf(": couldn't establish interrupt\n"); 169 return; 170 } 171 172 /* Enable level 2 interrupt */ 173 vrip_intr_setmask2(va->va_vc, sc->sc_ih, PCIINT_INT0, 1); 174 175 printf("\n"); 176 177 #ifdef DEBUG 178 #define DUMP_MAW(sc, name, reg) do { \ 179 printf("%s: %s =\t0x%08x\n", device_xname((sc)->sc_dev), \ 180 (name), (reg)); \ 181 printf("%s:\tIBA/MASK =\t0x%08x/0x%08x (0x%08x - 0x%08x)\n", \ 182 device_xname((sc)->sc_dev), \ 183 reg & VRPCIU_MAW_IBAMASK, VRPCIU_MAW_ADDRMASK(reg), \ 184 VRPCIU_MAW_ADDR(reg), \ 185 VRPCIU_MAW_ADDR(reg) + VRPCIU_MAW_SIZE(reg)); \ 186 printf("%s:\tWINEN =\t0x%08x\n", device_xname((sc)->sc_dev), \ 187 reg & VRPCIU_MAW_WINEN); \ 188 printf("%s:\tPCIADR =\t0x%08x\n", device_xname((sc)->sc_dev), \ 189 VRPCIU_MAW_PCIADDR(reg)); \ 190 } while (0) 191 #define DUMP_TAW(sc, name, reg) do { \ 192 printf("%s: %s =\t\t0x%08x\n", device_xname((sc)->sc_dev), \ 193 (name), (reg)); \ 194 printf("%s:\tMASK =\t0x%08x\n", device_xname((sc)->sc_dev), \ 195 VRPCIU_TAW_ADDRMASK(reg)); \ 196 printf("%s:\tWINEN =\t0x%08x\n", device_xname((sc)->sc_dev), \ 197 reg & VRPCIU_TAW_WINEN); \ 198 printf("%s:\tIBA =\t0x%08x\n", device_xname((sc)->sc_dev), \ 199 VRPCIU_TAW_IBA(reg)); \ 200 } while (0) 201 reg = vrpciu_read(sc, VRPCIU_MMAW1REG); 202 DUMP_MAW(sc, "MMAW1", reg); 203 reg = vrpciu_read(sc, VRPCIU_MMAW2REG); 204 DUMP_MAW(sc, "MMAW2", reg); 205 reg = vrpciu_read(sc, VRPCIU_TAW1REG); 206 DUMP_TAW(sc, "TAW1", reg); 207 reg = vrpciu_read(sc, VRPCIU_TAW2REG); 208 DUMP_TAW(sc, "TAW2", reg); 209 reg = vrpciu_read(sc, VRPCIU_MIOAWREG); 210 DUMP_MAW(sc, "MIOAW", reg); 211 printf("%s: BUSERRAD =\t0x%08x\n", device_xname(sc->sc_dev), 212 vrpciu_read(sc, VRPCIU_BUSERRADREG)); 213 printf("%s: INTCNTSTA =\t0x%08x\n", device_xname(sc->sc_dev), 214 vrpciu_read(sc, VRPCIU_INTCNTSTAREG)); 215 printf("%s: EXACC =\t0x%08x\n", device_xname(sc->sc_dev), 216 vrpciu_read(sc, VRPCIU_EXACCREG)); 217 printf("%s: RECONT =\t0x%08x\n", device_xname(sc->sc_dev), 218 vrpciu_read(sc, VRPCIU_RECONTREG)); 219 printf("%s: PCIEN =\t0x%08x\n", device_xname(sc->sc_dev), 220 vrpciu_read(sc, VRPCIU_ENREG)); 221 printf("%s: CLOCKSEL =\t0x%08x\n", device_xname(sc->sc_dev), 222 vrpciu_read(sc, VRPCIU_CLKSELREG)); 223 printf("%s: TRDYV =\t0x%08x\n", device_xname(sc->sc_dev), 224 vrpciu_read(sc, VRPCIU_TRDYVREG)); 225 printf("%s: CLKRUN =\t0x%08x\n", device_xname(sc->sc_dev), 226 vrpciu_read_2(sc, VRPCIU_CLKRUNREG)); 227 printf("%s: IDREG =\t0x%08x\n", device_xname(sc->sc_dev), 228 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_ID_REG)); 229 reg = vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG); 230 printf("%s: CSR =\t\t0x%08x\n", device_xname(sc->sc_dev), reg); 231 vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG, reg); 232 printf("%s: CSR =\t\t0x%08x\n", device_xname(sc->sc_dev), 233 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG)); 234 printf("%s: CLASS =\t0x%08x\n", device_xname(sc->sc_dev), 235 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_CLASS_REG)); 236 printf("%s: BHLC =\t\t0x%08x\n", device_xname(sc->sc_dev), 237 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_BHLC_REG)); 238 printf("%s: MAIL =\t\t0x%08x\n", device_xname(sc->sc_dev), 239 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MAILREG)); 240 printf("%s: MBA1 =\t\t0x%08x\n", device_xname(sc->sc_dev), 241 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA1REG)); 242 printf("%s: MBA2 =\t\t0x%08x\n", device_xname(sc->sc_dev), 243 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA2REG)); 244 printf("%s: INTR =\t\t0x%08x\n", device_xname(sc->sc_dev), 245 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG)); 246 #if 0 247 vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG, 248 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG) | 0x01); 249 printf("%s: INTR =\t\t0x%08x\n", device_xname(sc->sc_dev), 250 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG)); 251 #endif 252 #endif 253 254 pc->pc_dev = sc->sc_dev; 255 pc->pc_attach_hook = vrpciu_attach_hook; 256 pc->pc_bus_maxdevs = vrpciu_bus_maxdevs; 257 pc->pc_bus_devorder = vrpciu_bus_devorder; 258 pc->pc_make_tag = vrpciu_make_tag; 259 pc->pc_decompose_tag = vrpciu_decompose_tag; 260 pc->pc_conf_read = vrpciu_conf_read; 261 pc->pc_conf_write = vrpciu_conf_write; 262 pc->pc_intr_map = vrpciu_intr_map; 263 pc->pc_intr_string = vrpciu_intr_string; 264 pc->pc_intr_evcnt = vrpciu_intr_evcnt; 265 pc->pc_intr_establish = vrpciu_intr_establish; 266 pc->pc_intr_disestablish = vrpciu_intr_disestablish; 267 268 #if 0 269 { 270 int i; 271 272 for (i = 0; i < 8; i++) 273 printf("%s: ID_REG(0, 0, %d) = 0x%08x\n", 274 device_xname(sc->sc_dev), i, 275 pci_conf_read(pc, pci_make_tag(pc, 0, 0, i), 276 PCI_ID_REG)); 277 } 278 #endif 279 280 #if NPCI > 0 281 memset(&pba, 0, sizeof(pba)); 282 283 /* For now, just inherit window mappings set by WinCE. XXX. */ 284 285 iot = hpcmips_alloc_bus_space_tag(); 286 reg = vrpciu_read(sc, VRPCIU_MIOAWREG); 287 snprintf(tmpbuf, sizeof(tmpbuf), "%s/iot", 288 device_xname(sc->sc_dev)); 289 hpcmips_init_bus_space(iot, (struct bus_space_tag_hpcmips *)sc->sc_iot, 290 tmpbuf, VRPCIU_MAW_ADDR(reg), VRPCIU_MAW_SIZE(reg)); 291 pba.pba_iot = &iot->bst; 292 293 /* 294 * Just use system bus space tag. It works since WinCE maps 295 * PCI bus space at same offset. But this isn't right thing 296 * of course. XXX. 297 */ 298 pba.pba_memt = sc->sc_iot; 299 pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt; 300 pba.pba_dmat64 = NULL; 301 pba.pba_bus = 0; 302 pba.pba_bridgetag = NULL; 303 304 if (platid_match(&platid, &platid_mask_MACH_LASER5_L_BOARD)) { 305 /* 306 * fix PCI device configuration for L-Router. 307 */ 308 /* change IDE controller to native mode */ 309 reg = pci_conf_read(pc, pci_make_tag(pc, 0, 16, 0), 310 PCI_CLASS_REG); 311 reg |= PCIIDE_INTERFACE_PCI(0) << PCI_INTERFACE_SHIFT; 312 reg |= PCIIDE_INTERFACE_PCI(1) << PCI_INTERFACE_SHIFT; 313 pci_conf_write(pc, pci_make_tag(pc, 0, 16, 0), PCI_CLASS_REG, 314 reg); 315 /* fix broken BAR setting of fxp0, fxp1 */ 316 pci_conf_write(pc, pci_make_tag(pc, 0, 0, 0), PCI_MAPREG_START, 317 0x11100000); 318 pci_conf_write(pc, pci_make_tag(pc, 0, 1, 0), PCI_MAPREG_START, 319 0x11200000); 320 } 321 322 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY | 323 PCI_FLAGS_MRL_OKAY; 324 pba.pba_pc = pc; 325 326 config_found_ia(self, "pcibus", &pba, pcibusprint); 327 #endif 328 } 329 330 /* 331 * Handle PCI error interrupts. 332 */ 333 int 334 vrpciu_intr(void *arg) 335 { 336 struct vrpciu_softc *sc = (struct vrpciu_softc *)arg; 337 u_int32_t isr, baddr; 338 339 isr = vrpciu_read(sc, VRPCIU_INTCNTSTAREG); 340 baddr = vrpciu_read(sc, VRPCIU_BUSERRADREG); 341 printf("%s: status=0x%08x bad addr=0x%08x\n", 342 device_xname(sc->sc_dev), isr, baddr); 343 return ((isr & 0x0f) ? 1 : 0); 344 } 345 346 void 347 vrpciu_attach_hook(device_t parent, device_t self, 348 struct pcibus_attach_args *pba) 349 { 350 351 return; 352 } 353 354 int 355 vrpciu_bus_maxdevs(pci_chipset_tag_t pc, int busno) 356 { 357 358 return (32); 359 } 360 361 int 362 vrpciu_bus_devorder(pci_chipset_tag_t pc, int busno, uint8_t *devs, int maxdevs) 363 { 364 int dev, i, n; 365 uint8_t *devn; 366 char priorities[32]; 367 static pcireg_t ids[] = { 368 /* these devices should be attached first */ 369 PCI_ID_CODE(PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VRC4173_BCU), 370 }; 371 372 n = MIN(32, maxdevs); 373 if (n <= 0) 374 return 0; 375 376 devn = devs + n; 377 378 /* scan PCI devices and check the id table */ 379 memset(priorities, 0, sizeof(priorities)); 380 for (dev = 0; dev < 32; dev++) { 381 pcireg_t id; 382 id = pci_conf_read(pc, pci_make_tag(pc, 0, dev, 0), PCI_ID_REG); 383 for (i = 0; i < __arraycount(ids); i++) 384 if (id == ids[i]) 385 priorities[dev] = 1; 386 } 387 388 /* fill order array */ 389 for (i = 1; 0 <= i; i--) { 390 for (dev = 0; dev < 32; dev++) { 391 if (priorities[dev] == i && devs != devn) 392 *devs++ = dev; 393 } 394 } 395 396 return n; 397 } 398 399 pcitag_t 400 vrpciu_make_tag(pci_chipset_tag_t pc, int bus, int device, int function) 401 { 402 403 return ((bus << 16) | (device << 11) | (function << 8)); 404 } 405 406 void 407 vrpciu_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, 408 int *fp) 409 { 410 411 if (bp != NULL) 412 *bp = (tag >> 16) & 0xff; 413 if (dp != NULL) 414 *dp = (tag >> 11) & 0x1f; 415 if (fp != NULL) 416 *fp = (tag >> 8) & 0x07; 417 } 418 419 pcireg_t 420 vrpciu_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 421 { 422 struct vrpciu_softc *sc = device_private(pc->pc_dev); 423 u_int32_t val; 424 int bus, device, function; 425 426 pci_decompose_tag(pc, tag, &bus, &device, &function); 427 if (bus == 0) { 428 if (device > 21) 429 return ((pcitag_t)-1); 430 tag = (1 << (device + 11)) | (function << 8); /* Type 0 */ 431 } else 432 tag |= VRPCIU_CONF_TYPE1; 433 434 vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg); 435 val = vrpciu_read(sc, VRPCIU_CONFDREG); 436 #if 0 437 printf("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n", 438 device_xname(sc->sc_dev), (u_int32_t)tag, reg, val); 439 #endif 440 return (val); 441 } 442 443 void 444 vrpciu_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, 445 pcireg_t data) 446 { 447 struct vrpciu_softc *sc = device_private(pc->pc_dev); 448 int bus, device, function; 449 450 #if 0 451 printf("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n", 452 device_xname(sc->sc_dev), (u_int32_t)tag, reg, (u_int32_t)data); 453 #endif 454 vrpciu_decompose_tag(pc, tag, &bus, &device, &function); 455 if (bus == 0) { 456 if (device > 21) 457 return; 458 tag = (1 << (device + 11)) | (function << 8); /* Type 0 */ 459 } else 460 tag |= VRPCIU_CONF_TYPE1; 461 462 vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg); 463 vrpciu_write(sc, VRPCIU_CONFDREG, data); 464 } 465 466 int 467 vrpciu_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 468 { 469 pci_chipset_tag_t pc = pa->pa_pc; 470 pcitag_t intrtag = pa->pa_intrtag; 471 int bus, dev, func; 472 #ifdef DEBUG 473 int line = pa->pa_intrline; 474 int pin = pa->pa_intrpin; 475 #endif 476 477 pci_decompose_tag(pc, intrtag, &bus, &dev, &func); 478 DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", device_xname(pc->pc_dev), 479 bus, dev, func, line, pin)); 480 481 *ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func); 482 483 return (0); 484 } 485 486 const char * 487 vrpciu_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 488 { 489 static char irqstr[sizeof("pciintr") + 16]; 490 491 snprintf(irqstr, sizeof(irqstr), "pciintr %d:%d:%d", 492 CONFIG_HOOK_PCIINTR_BUS((int)ih), 493 CONFIG_HOOK_PCIINTR_DEVICE((int)ih), 494 CONFIG_HOOK_PCIINTR_FUNCTION((int)ih)); 495 496 return (irqstr); 497 } 498 499 const struct evcnt * 500 vrpciu_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 501 { 502 503 /* XXX for now, no evcnt parent reported */ 504 505 return (NULL); 506 } 507 508 void * 509 vrpciu_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 510 int (*func)(void *), void *arg) 511 { 512 513 if (ih == -1) 514 return (NULL); 515 DPRINTF(("vrpciu_intr_establish: %lx\n", ih)); 516 517 return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE, 518 (int (*)(void *, int, long, void *))func, arg)); 519 } 520 521 void 522 vrpciu_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 523 { 524 525 DPRINTF(("vrpciu_intr_disestablish: %p\n", cookie)); 526 config_unhook(cookie); 527 } 528
Indexes created Wed Oct 01 19:09:53 GMT 2025