vrpciu.c revision 1.3
1 /* $NetBSD: vrpciu.c,v 1.3 2002/01/05 06:45:32 takemura Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 Enami Tsugutomo. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/device.h> 32 33 #include <machine/bus.h> 34 #include <machine/bus_space_hpcmips.h> 35 #include <machine/bus_dma_hpcmips.h> 36 #include <machine/platid.h> 37 #include <machine/platid_mask.h> 38 39 #include <dev/pci/pcivar.h> 40 #include <dev/pci/pcidevs.h> 41 42 #include <hpcmips/vr/icureg.h> 43 #include <hpcmips/vr/vripvar.h> 44 #include <hpcmips/vr/vrpciureg.h> 45 #include <hpcmips/vr/vrc4173bcuvar.h> 46 47 #include "pci.h" 48 49 #ifdef DEBUG 50 #define DPRINTF(args) printf args 51 #else 52 #define DPRINTF(args) 53 #endif 54 55 struct vrpciu_softc { 56 struct device sc_dev; 57 58 vrip_chipset_tag_t sc_vc; 59 bus_space_tag_t sc_iot; 60 bus_space_handle_t sc_ioh; 61 void *sc_ih; 62 63 struct vrc4173bcu_softc *sc_bcu; /* vrc4173bcu */ 64 65 struct hpcmips_pci_chipset sc_pc; 66 }; 67 68 static void vrpciu_write(struct vrpciu_softc *, int, u_int32_t); 69 static u_int32_t 70 vrpciu_read(struct vrpciu_softc *, int); 71 #ifdef DEBUG 72 static void vrpciu_write_2(struct vrpciu_softc *, int, u_int16_t) 73 __attribute__((unused)); 74 static u_int16_t 75 vrpciu_read_2(struct vrpciu_softc *, int); 76 #endif 77 static int vrpciu_match(struct device *, struct cfdata *, void *); 78 static void vrpciu_attach(struct device *, struct device *, void *); 79 #if NPCI > 0 80 static int vrpciu_print(void *, const char *); 81 #endif 82 static int vrpciu_intr(void *); 83 static void vrpciu_attach_hook(struct device *, struct device *, 84 struct pcibus_attach_args *); 85 static int vrpciu_bus_maxdevs(pci_chipset_tag_t, int); 86 static int vrpciu_bus_devorder(pci_chipset_tag_t, int, char *); 87 static pcitag_t vrpciu_make_tag(pci_chipset_tag_t, int, int, int); 88 static void vrpciu_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *, 89 int *); 90 static pcireg_t vrpciu_conf_read(pci_chipset_tag_t, pcitag_t, int); 91 static void vrpciu_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 92 static void *vrpciu_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, 93 int, int (*)(void *), void *); 94 static void vrpciu_intr_disestablish(pci_chipset_tag_t, void *); 95 static void *vrpciu_vrcintr_establish(pci_chipset_tag_t, int, 96 int (*)(void *), void *); 97 static void vrpciu_vrcintr_disestablish(pci_chipset_tag_t, void *); 98 99 struct cfattach vrpciu_ca = { 100 sizeof(struct vrpciu_softc), vrpciu_match, vrpciu_attach 101 }; 102 103 static void 104 vrpciu_write(struct vrpciu_softc *sc, int offset, u_int32_t val) 105 { 106 107 bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val); 108 } 109 110 static u_int32_t 111 vrpciu_read(struct vrpciu_softc *sc, int offset) 112 { 113 114 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset)); 115 } 116 117 #ifdef DEBUG 118 static void 119 vrpciu_write_2(struct vrpciu_softc *sc, int offset, u_int16_t val) 120 { 121 122 bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, val); 123 } 124 125 static u_int16_t 126 vrpciu_read_2(struct vrpciu_softc *sc, int offset) 127 { 128 129 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset)); 130 } 131 #endif 132 133 static int 134 vrpciu_match(struct device *parent, struct cfdata *match, void *aux) 135 { 136 137 return (1); 138 } 139 140 static void 141 vrpciu_attach(struct device *parent, struct device *self, void *aux) 142 { 143 struct vrpciu_softc *sc = (struct vrpciu_softc *)self; 144 pci_chipset_tag_t pc = &sc->sc_pc; 145 struct vrip_attach_args *va = aux; 146 struct bus_space_tag_hpcmips *iot; 147 u_int32_t reg; 148 char tmpbuf[16]; 149 #if NPCI > 0 150 struct pcibus_attach_args pba; 151 #endif 152 153 sc->sc_vc = va->va_vc; 154 sc->sc_iot = va->va_iot; 155 if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0, 156 &sc->sc_ioh)) { 157 printf(": couldn't map io space\n"); 158 return; 159 } 160 161 sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_intr, IPL_TTY, 162 vrpciu_intr, sc); 163 if (sc->sc_ih == NULL) { 164 printf(": couldn't establish interrupt\n"); 165 return; 166 } 167 168 /* Enable level 2 interrupt */ 169 vrip_intr_setmask2(va->va_vc, sc->sc_ih, PCIINT_INT0, 1); 170 171 printf("\n"); 172 173 #ifdef DEBUG 174 #define DUMP_MAW(sc, name, reg) do { \ 175 printf("%s: %s =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 176 (name), (reg)); \ 177 printf("%s:\tIBA/MASK =\t0x%08x/0x%08x (0x%08x - 0x%08x)\n", \ 178 (sc)->sc_dev.dv_xname, \ 179 reg & VRPCIU_MAW_IBAMASK, VRPCIU_MAW_ADDRMASK(reg), \ 180 VRPCIU_MAW_ADDR(reg), \ 181 VRPCIU_MAW_ADDR(reg) + VRPCIU_MAW_SIZE(reg)); \ 182 printf("%s:\tWINEN =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 183 reg & VRPCIU_MAW_WINEN); \ 184 printf("%s:\tPCIADR =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 185 VRPCIU_MAW_PCIADDR(reg)); \ 186 } while (0) 187 #define DUMP_TAW(sc, name, reg) do { \ 188 printf("%s: %s =\t\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 189 (name), (reg)); \ 190 printf("%s:\tMASK =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 191 VRPCIU_TAW_ADDRMASK(reg)); \ 192 printf("%s:\tWINEN =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 193 reg & VRPCIU_TAW_WINEN); \ 194 printf("%s:\tIBA =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 195 VRPCIU_TAW_IBA(reg)); \ 196 } while (0) 197 reg = vrpciu_read(sc, VRPCIU_MMAW1REG); 198 DUMP_MAW(sc, "MMAW1", reg); 199 reg = vrpciu_read(sc, VRPCIU_MMAW2REG); 200 DUMP_MAW(sc, "MMAW2", reg); 201 reg = vrpciu_read(sc, VRPCIU_TAW1REG); 202 DUMP_TAW(sc, "TAW1", reg); 203 reg = vrpciu_read(sc, VRPCIU_TAW2REG); 204 DUMP_TAW(sc, "TAW2", reg); 205 reg = vrpciu_read(sc, VRPCIU_MIOAWREG); 206 DUMP_MAW(sc, "MIOAW", reg); 207 printf("%s: BUSERRAD =\t0x%08x\n", sc->sc_dev.dv_xname, 208 vrpciu_read(sc, VRPCIU_BUSERRADREG)); 209 printf("%s: INTCNTSTA =\t0x%08x\n", sc->sc_dev.dv_xname, 210 vrpciu_read(sc, VRPCIU_INTCNTSTAREG)); 211 printf("%s: EXACC =\t0x%08x\n", sc->sc_dev.dv_xname, 212 vrpciu_read(sc, VRPCIU_EXACCREG)); 213 printf("%s: RECONT =\t0x%08x\n", sc->sc_dev.dv_xname, 214 vrpciu_read(sc, VRPCIU_RECONTREG)); 215 printf("%s: PCIEN =\t0x%08x\n", sc->sc_dev.dv_xname, 216 vrpciu_read(sc, VRPCIU_ENREG)); 217 printf("%s: CLOCKSEL =\t0x%08x\n", sc->sc_dev.dv_xname, 218 vrpciu_read(sc, VRPCIU_CLKSELREG)); 219 printf("%s: TRDYV =\t0x%08x\n", sc->sc_dev.dv_xname, 220 vrpciu_read(sc, VRPCIU_TRDYVREG)); 221 printf("%s: CLKRUN =\t0x%08x\n", sc->sc_dev.dv_xname, 222 vrpciu_read_2(sc, VRPCIU_CLKRUNREG)); 223 printf("%s: IDREG =\t0x%08x\n", sc->sc_dev.dv_xname, 224 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_ID_REG)); 225 reg = vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG); 226 printf("%s: CSR =\t\t0x%08x\n", sc->sc_dev.dv_xname, reg); 227 vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG, reg); 228 printf("%s: CSR =\t\t0x%08x\n", sc->sc_dev.dv_xname, 229 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG)); 230 printf("%s: CLASS =\t0x%08x\n", sc->sc_dev.dv_xname, 231 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_CLASS_REG)); 232 printf("%s: BHLC =\t\t0x%08x\n", sc->sc_dev.dv_xname, 233 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_BHLC_REG)); 234 printf("%s: MAIL =\t\t0x%08x\n", sc->sc_dev.dv_xname, 235 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MAILREG)); 236 printf("%s: MBA1 =\t\t0x%08x\n", sc->sc_dev.dv_xname, 237 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA1REG)); 238 printf("%s: MBA2 =\t\t0x%08x\n", sc->sc_dev.dv_xname, 239 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA2REG)); 240 printf("%s: INTR =\t\t0x%08x\n", sc->sc_dev.dv_xname, 241 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG)); 242 #if 0 243 vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG, 244 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG) | 0x01); 245 printf("%s: INTR =\t\t0x%08x\n", sc->sc_dev.dv_xname, 246 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG)); 247 #endif 248 #endif 249 250 pc->pc_dev = &sc->sc_dev; 251 pc->pc_attach_hook = vrpciu_attach_hook; 252 pc->pc_bus_maxdevs = vrpciu_bus_maxdevs; 253 pc->pc_bus_devorder = vrpciu_bus_devorder; 254 pc->pc_make_tag = vrpciu_make_tag; 255 pc->pc_decompose_tag = vrpciu_decompose_tag; 256 pc->pc_conf_read = vrpciu_conf_read; 257 pc->pc_conf_write = vrpciu_conf_write; 258 pc->pc_intr_map = vrc4173bcu_pci_intr_map; 259 pc->pc_intr_string = vrc4173bcu_pci_intr_string; 260 pc->pc_intr_evcnt = vrc4173bcu_pci_intr_evcnt; 261 pc->pc_intr_establish = vrpciu_intr_establish; 262 pc->pc_intr_disestablish = vrpciu_intr_disestablish; 263 pc->pc_vrcintr_establish = vrpciu_vrcintr_establish; 264 pc->pc_vrcintr_disestablish = vrpciu_vrcintr_disestablish; 265 266 #if 0 267 { 268 int i; 269 270 for (i = 0; i < 8; i++) 271 printf("%s: ID_REG(0, 0, %d) = 0x%08x\n", 272 sc->sc_dev.dv_xname, i, 273 pci_conf_read(pc, pci_make_tag(pc, 0, 0, i), 274 PCI_ID_REG)); 275 } 276 #endif 277 278 #if NPCI > 0 279 memset(&pba, 0, sizeof(pba)); 280 pba.pba_busname = "pci"; 281 282 /* For now, just inherit window mappings set by WinCE. XXX. */ 283 284 iot = hpcmips_alloc_bus_space_tag(); 285 reg = vrpciu_read(sc, VRPCIU_MIOAWREG); 286 snprintf(tmpbuf, sizeof(tmpbuf), "%s/iot", 287 sc->sc_dev.dv_xname); 288 hpcmips_init_bus_space(iot, (struct bus_space_tag_hpcmips *)sc->sc_iot, 289 tmpbuf, VRPCIU_MAW_ADDR(reg), VRPCIU_MAW_SIZE(reg)); 290 pba.pba_iot = &iot->bst; 291 292 /* 293 * Just use system bus space tag. It works since WinCE maps 294 * PCI bus space at same offset. But this isn't right thing 295 * of course. XXX. 296 */ 297 pba.pba_memt = sc->sc_iot; 298 pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt; 299 pba.pba_bus = 0; 300 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 301 PCI_FLAGS_MRL_OKAY; 302 pba.pba_pc = pc; 303 304 config_found(self, &pba, vrpciu_print); 305 #endif 306 } 307 308 #if NPCI > 0 309 static int 310 vrpciu_print(void *aux, const char *pnp) 311 { 312 struct pcibus_attach_args *pba = aux; 313 314 if (pnp != NULL) 315 printf("%s at %s", pba->pba_busname, pnp); 316 else 317 printf(" bus %d", pba->pba_bus); 318 319 return (UNCONF); 320 } 321 #endif 322 323 /* 324 * Handle PCI error interrupts. 325 */ 326 int 327 vrpciu_intr(void *arg) 328 { 329 struct vrpciu_softc *sc = (struct vrpciu_softc *)arg; 330 u_int32_t isr; 331 332 isr = vrpciu_read(sc, VRPCIU_INTCNTSTAREG); 333 printf("%s: vrpciu_intr 0x%08x\n", sc->sc_dev.dv_xname, isr); 334 return ((isr & 0x0f) ? 1 : 0); 335 } 336 337 void 338 vrpciu_attach_hook(struct device *parent, struct device *self, 339 struct pcibus_attach_args *pba) 340 { 341 342 return; 343 } 344 345 int 346 vrpciu_bus_maxdevs(pci_chipset_tag_t pc, int busno) 347 { 348 349 return (32); 350 } 351 352 int 353 vrpciu_bus_devorder(pci_chipset_tag_t pc, int busno, char *devs) 354 { 355 int i, dev; 356 char priorities[32]; 357 static pcireg_t ids[] = { 358 /* these devices should be attached first */ 359 PCI_ID_CODE(PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VRC4173_BCU), 360 }; 361 362 /* scan PCI devices and check the id table */ 363 memset(priorities, 0, sizeof(priorities)); 364 for (dev = 0; dev < 32; dev++) { 365 pcireg_t id; 366 id = pci_conf_read(pc, pci_make_tag(pc, 0, dev, 0),PCI_ID_REG); 367 for (i = 0; i < sizeof(ids)/sizeof(*ids); i++) 368 if (id == ids[i]) 369 priorities[dev] = 1; 370 } 371 372 /* fill order array */ 373 for (i = 1; 0 <= i; i--) 374 for (dev = 0; dev < 32; dev++) 375 if (priorities[dev] == i) 376 *devs++ = dev; 377 378 return (32); 379 } 380 381 pcitag_t 382 vrpciu_make_tag(pci_chipset_tag_t pc, int bus, int device, int function) 383 { 384 385 return ((bus << 16) | (device << 11) | (function << 8)); 386 } 387 388 void 389 vrpciu_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, 390 int *fp) 391 { 392 393 if (bp != NULL) 394 *bp = (tag >> 16) & 0xff; 395 if (dp != NULL) 396 *dp = (tag >> 11) & 0x1f; 397 if (fp != NULL) 398 *fp = (tag >> 8) & 0x07; 399 } 400 401 pcireg_t 402 vrpciu_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 403 { 404 struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev; 405 u_int32_t val; 406 int bus, device, function; 407 408 pci_decompose_tag(pc, tag, &bus, &device, &function); 409 if (bus == 0) { 410 if (device > 21) 411 return ((pcitag_t)-1); 412 tag = (1 << (device + 11)) | (function << 8); /* Type 0 */ 413 } else 414 tag |= VRPCIU_CONF_TYPE1; 415 416 vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg); 417 val = vrpciu_read(sc, VRPCIU_CONFDREG); 418 #if 0 419 printf("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n", 420 sc->sc_dev.dv_xname, (u_int32_t)tag, reg, val); 421 #endif 422 return (val); 423 } 424 425 void 426 vrpciu_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, 427 pcireg_t data) 428 { 429 struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev; 430 int bus, device, function; 431 432 #if 0 433 printf("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n", 434 sc->sc_dev.dv_xname, (u_int32_t)tag, reg, (u_int32_t)data); 435 #endif 436 vrpciu_decompose_tag(pc, tag, &bus, &device, &function); 437 if (bus == 0) { 438 if (device > 21) 439 return; 440 tag = (1 << (device + 11)) | (function << 8); /* Type 0 */ 441 } else 442 tag |= VRPCIU_CONF_TYPE1; 443 444 vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg); 445 vrpciu_write(sc, VRPCIU_CONFDREG, data); 446 } 447 448 void * 449 vrpciu_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 450 int (*func)(void *), void *arg) 451 { 452 struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev; 453 454 if (ih == -1) 455 return (NULL); 456 DPRINTF(("vrpciu_intr_establish: %p\n", sc)); 457 return (vrc4173bcu_intr_establish(sc->sc_bcu, ih, func, arg)); 458 } 459 460 void 461 vrpciu_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 462 { 463 struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev; 464 465 DPRINTF(("vrpciu_intr_disestablish: %p\n", sc)); 466 vrc4173bcu_intr_disestablish(sc->sc_bcu, cookie); 467 } 468 469 void * 470 vrpciu_vrcintr_establish(pci_chipset_tag_t pc, int port, 471 int (*func)(void *), void *arg) 472 { 473 struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev; 474 struct vrip_softc *vsc = (struct vrip_softc *)sc->sc_vc; 475 void *ih; 476 int mode; 477 478 sc->sc_bcu = arg; 479 480 if (platid_match(&platid, &platid_mask_MACH_NEC_MCR_SIGMARION2)) 481 mode = HPCIO_INTR_LEVEL | HPCIO_INTR_HIGH | HPCIO_INTR_THROUGH; 482 else 483 mode = HPCIO_INTR_LEVEL | HPCIO_INTR_LOW | HPCIO_INTR_HOLD; 484 485 ih = hpcio_intr_establish(vsc->sc_gpio_chips[VRIP_IOCHIP_VRGIU], 486 port, mode, func, arg); 487 488 return (ih); 489 } 490 491 void 492 vrpciu_vrcintr_disestablish(pci_chipset_tag_t pc, void *ih) 493 { 494 struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev; 495 struct vrip_softc *vsc = (struct vrip_softc *)sc->sc_vc; 496 497 return (vrip_intr_disestablish(vsc->sc_gpio_chips[VRIP_IOCHIP_VRGIU], 498 ih)); 499 } 500
Indexes created Wed Oct 01 18:09:54 GMT 2025