hd64461.c revision 1.5
1 /* $NetBSD: hd64461.c,v 1.5 2002/02/17 21:01:16 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/device.h> 42 #include <sys/malloc.h> 43 #include <sys/boot_flag.h> 44 45 #include <machine/bus.h> 46 #include <machine/intr.h> 47 #include <sh3/shbvar.h> 48 49 #include <machine/debug.h> 50 51 #include <hpcsh/dev/hd64461/hd64461var.h> 52 #include <hpcsh/dev/hd64461/hd64461reg.h> 53 #include <hpcsh/dev/hd64461/hd64461intcreg.h> 54 #include <hpcsh/dev/hd64461/hd64461intcvar.h> 55 56 /* HD64461 modules. INTC, TIMER, POWER modules are included in hd64461if */ 57 STATIC struct hd64461_module { 58 const char *name; 59 } hd64461_modules[] = { 60 [HD64461_MODULE_VIDEO] = { "hd64461video" }, 61 [HD64461_MODULE_PCMCIA] = { "hd64461pcmcia" }, 62 [HD64461_MODULE_GPIO] = { "hd64461gpio" }, 63 [HD64461_MODULE_AFE] = { "hd64461afe" }, 64 [HD64461_MODULE_UART] = { "hd64461uart" }, 65 [HD64461_MODULE_FIR] = { "hd64461fir" }, 66 }; 67 #define HD64461_NMODULE \ 68 (sizeof hd64461_modules / sizeof(struct hd64461_module)) 69 70 struct hd64461_intr_entry { 71 int (*func)(void *); 72 void *arg; 73 int priority; 74 const u_int16_t mask; 75 } hd64461_intr_entry[] = { 76 #define IRQ_ENTRY(x) [HD64461_IRQ_##x] = { 0, 0, 0, HD64461_INTC_##x } 77 IRQ_ENTRY(PCC0), 78 IRQ_ENTRY(PCC1), 79 IRQ_ENTRY(AFE), 80 IRQ_ENTRY(GPIO), 81 IRQ_ENTRY(TMU0), 82 IRQ_ENTRY(TMU1), 83 IRQ_ENTRY(IRDA), 84 IRQ_ENTRY(UART) 85 #undef IRQ_ENTRY 86 }; 87 88 struct hd64461_softc { 89 struct device sc_dev; 90 }; 91 92 STATIC int hd64461_match(struct device *, struct cfdata *, void *); 93 STATIC void hd64461_attach(struct device *, struct device *, void *); 94 STATIC int hd64461_print(void *, const char *); 95 96 struct cfattach hd64461if_ca = { 97 sizeof(struct hd64461_softc), hd64461_match, hd64461_attach 98 }; 99 100 STATIC void hd64461_module_attach(struct hd64461_softc *); 101 STATIC int hd64461_intr(void *); 102 #ifdef DEBUG 103 STATIC void hd64461_info(struct hd64461_softc *); 104 #endif 105 106 int 107 hd64461_match(struct device *parent, struct cfdata *cf, void *aux) 108 { 109 static int match; 110 struct shb_attach_args *ia = aux; 111 112 switch (cpu_product) { 113 default: 114 /* HD64461 only supports SH7709 interface */ 115 return (0); 116 case CPU_PRODUCT_7709: 117 break; 118 case CPU_PRODUCT_7709A: 119 break; 120 } 121 122 if (match++) 123 return (0); /* only one instance */ 124 125 if (strcmp("hd64461if", cf->cf_driver->cd_name)) 126 return (0); 127 128 ia->ia_iobase = 0; 129 ia->ia_iosize = 0; 130 ia->ia_maddr = 0; 131 ia->ia_msize = 0; 132 133 return (1); 134 } 135 136 void 137 hd64461_attach(struct device *parent, struct device *self, void *aux) 138 { 139 struct shb_attach_args *ia = aux; 140 struct hd64461_softc *sc = (struct hd64461_softc *)self; 141 142 printf("\n"); 143 #ifdef DEBUG 144 if (bootverbose) 145 hd64461_info(sc); 146 #endif 147 /* mask all interrupt */ 148 hd64461_reg_write_2(HD64461_INTCNIMR_REG16, 0xffff); 149 150 shb_intr_establish(ia->ia_irq, IST_EDGE, IPL_TTY, hd64461_intr, sc); 151 152 hd64461_module_attach(sc); 153 } 154 155 void 156 hd64461_module_attach(struct hd64461_softc *sc) 157 { 158 struct hd64461_attach_args ha; 159 struct hd64461_module *module; 160 int i; 161 162 /* attach all sub modules */ 163 for (i = 0, module = hd64461_modules; i < HD64461_NMODULE; 164 i++, module++) { 165 if (module->name == 0) 166 continue; 167 ha.ha_module_id = i; 168 config_found(&sc->sc_dev, &ha, hd64461_print); 169 } 170 } 171 172 int 173 hd64461_print(void *aux, const char *pnp) 174 { 175 struct hd64461_attach_args *ha = aux; 176 177 if (pnp) 178 printf("%s at %s", 179 hd64461_modules[ha->ha_module_id].name, pnp); 180 181 return (UNCONF); 182 } 183 184 void * 185 hd64461_intr_establish(enum hd64461_irq irq, int mode, int level, 186 int (*func)(void *), void *arg) 187 { 188 struct hd64461_intr_entry *entry = &hd64461_intr_entry[irq]; 189 u_int16_t r; 190 int s; 191 192 s = splhigh(); 193 194 entry->func = func; 195 entry->arg = arg; 196 entry->priority = level; 197 198 /* enable interrupt */ 199 r = hd64461_reg_read_2(HD64461_INTCNIMR_REG16); 200 r &= ~entry->mask; 201 hd64461_reg_write_2(HD64461_INTCNIMR_REG16, r); 202 203 splx(s); 204 205 return (void *)irq; 206 } 207 208 void 209 hd64461_intr_disestablish(void *handle) 210 { 211 int irq = (int)handle; 212 struct hd64461_intr_entry *entry = &hd64461_intr_entry[irq]; 213 u_int16_t r; 214 int s; 215 216 s = splhigh(); 217 218 /* disable interrupt */ 219 r = hd64461_reg_read_2(HD64461_INTCNIMR_REG16); 220 r |= entry->mask; 221 hd64461_reg_write_2(HD64461_INTCNIMR_REG16, r); 222 223 entry->func = 0; 224 225 splx(s); 226 } 227 228 int 229 hd64461_intr(void *arg) 230 { 231 struct hd64461_intr_entry *entry = hd64461_intr_entry; 232 u_int16_t r, m, cause; 233 int i; 234 235 r = hd64461_reg_read_2(HD64461_INTCNIRR_REG16); 236 m = hd64461_reg_read_2(HD64461_INTCNIMR_REG16); 237 cause = r & ~m; 238 239 /* XXX priority */ 240 hd64461_reg_write_2(HD64461_INTCNIMR_REG16, 0xffff); 241 242 /* XXX priority */ 243 for (i = 0; i < HD64461_IRQ_MAX; i++, entry++) { 244 if (entry->func == 0) 245 continue; 246 if (cause & entry->mask) { 247 (*entry->func)(entry->arg); 248 } 249 } 250 251 hd64461_reg_write_2(HD64461_INTCNIMR_REG16, m); 252 253 return 0; 254 } 255 256 #ifdef DEBUG 257 void 258 hd64461_info(struct hd64461_softc *sc) 259 { 260 u_int16_t r16; 261 262 dbg_banner_function(); 263 264 /* 265 * System 266 */ 267 printf("STBCR (System Control Register)\n"); 268 r16 = hd64461_reg_read_2(HD64461_SYSSTBCR_REG16); 269 #define DBG_BITMASK_PRINT(r, m) dbg_bitmask_print(r, HD64461_SYSSTBCR_##m, #m) 270 DBG_BITMASK_PRINT(r16, CKIO_STBY); 271 DBG_BITMASK_PRINT(r16, SAFECKE_IST); 272 DBG_BITMASK_PRINT(r16, SLCKE_IST); 273 DBG_BITMASK_PRINT(r16, SAFECKE_OST); 274 DBG_BITMASK_PRINT(r16, SLCKE_OST); 275 DBG_BITMASK_PRINT(r16, SMIAST); 276 DBG_BITMASK_PRINT(r16, SLCDST); 277 DBG_BITMASK_PRINT(r16, SPC0ST); 278 DBG_BITMASK_PRINT(r16, SPC1ST); 279 DBG_BITMASK_PRINT(r16, SAFEST); 280 DBG_BITMASK_PRINT(r16, STM0ST); 281 DBG_BITMASK_PRINT(r16, STM1ST); 282 DBG_BITMASK_PRINT(r16, SIRST); 283 DBG_BITMASK_PRINT(r16, SURTSD); 284 #undef DBG_BITMASK_PRINT 285 printf("\n"); 286 287 printf("SYSCR (System Configuration Register)\n"); 288 r16 = hd64461_reg_read_2(HD64461_SYSSYSCR_REG16); 289 #define DBG_BITMASK_PRINT(r, m) dbg_bitmask_print(r, HD64461_SYSSYSCR_##m, #m) 290 DBG_BITMASK_PRINT(r16, SCPU_BUS_IGAT); 291 DBG_BITMASK_PRINT(r16, SPTA_IR); 292 DBG_BITMASK_PRINT(r16, SPTA_TM); 293 DBG_BITMASK_PRINT(r16, SPTB_UR); 294 DBG_BITMASK_PRINT(r16, WAIT_CTL_SEL); 295 DBG_BITMASK_PRINT(r16, SMODE1); 296 DBG_BITMASK_PRINT(r16, SMODE0); 297 #undef DBG_BITMASK_PRINT 298 printf("\n"); 299 300 printf("SCPUCR (CPU Data Bus Control Register)\n"); 301 r16 = hd64461_reg_read_2(HD64461_SYSSCPUCR_REG16); 302 #define DBG_BITMASK_PRINT(r, m) dbg_bitmask_print(r, HD64461_SYSSCPUCR_##m, #m) 303 DBG_BITMASK_PRINT(r16, SPDSTOF); 304 DBG_BITMASK_PRINT(r16, SPDSTIG); 305 DBG_BITMASK_PRINT(r16, SPCSTOF); 306 DBG_BITMASK_PRINT(r16, SPCSTIG); 307 DBG_BITMASK_PRINT(r16, SPBSTOF); 308 DBG_BITMASK_PRINT(r16, SPBSTIG); 309 DBG_BITMASK_PRINT(r16, SPASTOF); 310 DBG_BITMASK_PRINT(r16, SPASTIG); 311 DBG_BITMASK_PRINT(r16, SLCDSTIG); 312 DBG_BITMASK_PRINT(r16, SCPU_CS56_EP); 313 DBG_BITMASK_PRINT(r16, SCPU_CMD_EP); 314 DBG_BITMASK_PRINT(r16, SCPU_ADDR_EP); 315 DBG_BITMASK_PRINT(r16, SCPDPU); 316 DBG_BITMASK_PRINT(r16, SCPU_A2319_EP); 317 #undef DBG_BITMASK_PRINT 318 printf("\n"); 319 320 printf("\n"); 321 /* 322 * INTC 323 */ 324 printf("NIRR (Interrupt Request Register)\n"); 325 r16 = hd64461_reg_read_2(HD64461_INTCNIRR_REG16); 326 #define DBG_BITMASK_PRINT(r, m) dbg_bitmask_print(r, HD64461_INTCNIRR_##m, #m) 327 DBG_BITMASK_PRINT(r16, PCC0R); 328 DBG_BITMASK_PRINT(r16, PCC1R); 329 DBG_BITMASK_PRINT(r16, AFER); 330 DBG_BITMASK_PRINT(r16, GPIOR); 331 DBG_BITMASK_PRINT(r16, TMU0R); 332 DBG_BITMASK_PRINT(r16, TMU1R); 333 DBG_BITMASK_PRINT(r16, IRDAR); 334 DBG_BITMASK_PRINT(r16, UARTR); 335 #undef DBG_BITMASK_PRINT 336 printf("\n"); 337 338 printf("NIMR (Interrupt Mask Register)\n"); 339 r16 = hd64461_reg_read_2(HD64461_INTCNIMR_REG16); 340 #define DBG_BITMASK_PRINT(r, m) dbg_bitmask_print(r, HD64461_INTCNIMR_##m, #m) 341 DBG_BITMASK_PRINT(r16, PCC0M); 342 DBG_BITMASK_PRINT(r16, PCC1M); 343 DBG_BITMASK_PRINT(r16, AFEM); 344 DBG_BITMASK_PRINT(r16, GPIOM); 345 DBG_BITMASK_PRINT(r16, TMU0M); 346 DBG_BITMASK_PRINT(r16, TMU1M); 347 DBG_BITMASK_PRINT(r16, IRDAM); 348 DBG_BITMASK_PRINT(r16, UARTM); 349 #undef DBG_BITMASK_PRINT 350 printf("\n"); 351 352 dbg_banner_line(); 353 } 354 #endif /* DEBUG */ 355
Indexes created Fri Sep 26 20:09:58 GMT 2025