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hd64465.c revision 1.1
      1  1.1  uch /*	$NetBSD: hd64465.c,v 1.1 2002/02/11 17:27:15 uch Exp $	*/
      2  1.1  uch 
      3  1.1  uch /*-
      4  1.1  uch  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5  1.1  uch  * All rights reserved.
      6  1.1  uch  *
      7  1.1  uch  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  uch  * by UCHIYAMA Yasushi.
      9  1.1  uch  *
     10  1.1  uch  * Redistribution and use in source and binary forms, with or without
     11  1.1  uch  * modification, are permitted provided that the following conditions
     12  1.1  uch  * are met:
     13  1.1  uch  * 1. Redistributions of source code must retain the above copyright
     14  1.1  uch  *    notice, this list of conditions and the following disclaimer.
     15  1.1  uch  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  uch  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  uch  *    documentation and/or other materials provided with the distribution.
     18  1.1  uch  * 3. All advertising materials mentioning features or use of this software
     19  1.1  uch  *    must display the following acknowledgement:
     20  1.1  uch  *        This product includes software developed by the NetBSD
     21  1.1  uch  *        Foundation, Inc. and its contributors.
     22  1.1  uch  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1  uch  *    contributors may be used to endorse or promote products derived
     24  1.1  uch  *    from this software without specific prior written permission.
     25  1.1  uch  *
     26  1.1  uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1  uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1  uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1  uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1  uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1  uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1  uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1  uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1  uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1  uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1  uch  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1  uch  */
     38  1.1  uch 
     39  1.1  uch #include <sys/param.h>
     40  1.1  uch #include <sys/systm.h>
     41  1.1  uch #include <sys/device.h>
     42  1.1  uch #include <sys/malloc.h>
     43  1.1  uch #include <sys/boot_flag.h>
     44  1.1  uch 
     45  1.1  uch #include <machine/bus.h>
     46  1.1  uch #include <machine/intr.h>
     47  1.1  uch #include <sh3/shbvar.h>
     48  1.1  uch 
     49  1.1  uch #include <machine/debug.h>
     50  1.1  uch 
     51  1.1  uch #include <hpcsh/dev/hd64465/hd64465var.h>
     52  1.1  uch #include <hpcsh/dev/hd64465/hd64465reg.h>
     53  1.1  uch #include <hpcsh/dev/hd64465/hd64465intcreg.h>
     54  1.1  uch 
     55  1.1  uch /* HD64465 modules. */
     56  1.1  uch STATIC const struct hd64465_module {
     57  1.1  uch 	const char *name;
     58  1.1  uch } hd64465_modules[] = {
     59  1.1  uch 	[HD64465_MODULE_PS2IF]		= { "hd64465ps2if" },
     60  1.1  uch 	[HD64465_MODULE_PCMCIA]		= { "hd64465pcmcia" },
     61  1.1  uch 	[HD64465_MODULE_AFE]		= { "hd64465afe" },
     62  1.1  uch 	[HD64465_MODULE_GPIO]		= { "hd64465gpio" },
     63  1.1  uch 	[HD64465_MODULE_KBC]		= { "hd64465kbc" },
     64  1.1  uch 	[HD64465_MODULE_IRDA]		= { "hd64465irda" },
     65  1.1  uch 	[HD64465_MODULE_UART]		= { "hd64465uart" },
     66  1.1  uch 	[HD64465_MODULE_PARALEL]	= { "hd64465paralel" },
     67  1.1  uch 	[HD64465_MODULE_CODEC]		= { "hd64465codec" },
     68  1.1  uch 	[HD64465_MODULE_OHCI]		= { "hd64465ohci" },
     69  1.1  uch 	[HD64465_MODULE_ADC]		= { "hd64465adc" }
     70  1.1  uch };
     71  1.1  uch #define HD64465_NMODULE							\
     72  1.1  uch 	(sizeof hd64465_modules / sizeof(struct hd64465_module))
     73  1.1  uch 
     74  1.1  uch STATIC struct hd64465_intr_entry {
     75  1.1  uch 	int (*func)(void *);
     76  1.1  uch 	void *arg;
     77  1.1  uch 	int priority;
     78  1.1  uch 	const u_int16_t bit;
     79  1.1  uch } hd64465_intr_entry[] = {
     80  1.1  uch #define IRQ_ENTRY(x)	[HD64465_IRQ_ ## x] = { 0, 0, 0, HD64465_ ## x }
     81  1.1  uch 	IRQ_ENTRY(PS2KB),
     82  1.1  uch 	IRQ_ENTRY(PCC0),
     83  1.1  uch 	IRQ_ENTRY(PCC1),
     84  1.1  uch 	IRQ_ENTRY(AFE),
     85  1.1  uch 	IRQ_ENTRY(GPIO),
     86  1.1  uch 	IRQ_ENTRY(TMU0),
     87  1.1  uch 	IRQ_ENTRY(TMU1),
     88  1.1  uch 	IRQ_ENTRY(KBC),
     89  1.1  uch 	IRQ_ENTRY(PS2MS),
     90  1.1  uch 	IRQ_ENTRY(IRDA),
     91  1.1  uch 	IRQ_ENTRY(UART),
     92  1.1  uch 	IRQ_ENTRY(PPR),
     93  1.1  uch 	IRQ_ENTRY(SCDI),
     94  1.1  uch 	IRQ_ENTRY(OHCI),
     95  1.1  uch 	IRQ_ENTRY(ADC)
     96  1.1  uch #undef IRQ_ENTRY
     97  1.1  uch };
     98  1.1  uch #define HD64465_IRQ_MAX							\
     99  1.1  uch 	(sizeof hd64465_intr_entry / sizeof(struct hd64465_intr_entry))
    100  1.1  uch 
    101  1.1  uch STATIC struct hd64465 {
    102  1.1  uch 	int attached;
    103  1.1  uch 	u_int16_t imask;
    104  1.1  uch } hd64465;
    105  1.1  uch 
    106  1.1  uch STATIC int hd64465_match(struct device *, struct cfdata *, void *);
    107  1.1  uch STATIC void hd64465_attach(struct device *, struct device *, void *);
    108  1.1  uch STATIC int hd64465_print(void *, const char *);
    109  1.1  uch STATIC int hd64465_intr(void *);
    110  1.1  uch 
    111  1.1  uch struct cfattach hd64465if_ca = {
    112  1.1  uch 	sizeof(struct device), hd64465_match, hd64465_attach
    113  1.1  uch };
    114  1.1  uch 
    115  1.1  uch int
    116  1.1  uch hd64465_match(struct device *parent, struct cfdata *cf, void *aux)
    117  1.1  uch {
    118  1.1  uch 
    119  1.1  uch 	if (hd64465.attached++)
    120  1.1  uch 		return (0);	/* only one instance */
    121  1.1  uch 
    122  1.1  uch 	if (strcmp("hd64465if", cf->cf_driver->cd_name))
    123  1.1  uch 		return (0);
    124  1.1  uch 
    125  1.1  uch 	if (hd64465_reg_read_2(HD64465_SDIDR) != 0x8122) {
    126  1.1  uch 		/* not HD64465 */
    127  1.1  uch 		return (0);
    128  1.1  uch 	}
    129  1.1  uch 
    130  1.1  uch 	return (1);
    131  1.1  uch }
    132  1.1  uch 
    133  1.1  uch void
    134  1.1  uch hd64465_attach(struct device *parent, struct device *self, void *aux)
    135  1.1  uch {
    136  1.1  uch 	struct shb_attach_args *ia = aux;
    137  1.1  uch 	const struct hd64465_module *module;
    138  1.1  uch 	struct hd64465_attach_args ha;
    139  1.1  uch 	u_int16_t r;
    140  1.1  uch 	int i;
    141  1.1  uch 
    142  1.1  uch 	printf("\n");
    143  1.1  uch 
    144  1.1  uch 	r = hd64465_reg_read_2(HD64465_SRR);
    145  1.1  uch 	printf("%s: HITACHI HD64465 rev. %d.%d\n", self->dv_xname,
    146  1.1  uch 	    (r >> 8) & 0xff, r & 0xff);
    147  1.1  uch 
    148  1.1  uch 	hd64465_intr_disable();
    149  1.1  uch 
    150  1.1  uch 	/* Attach all sub modules */
    151  1.1  uch 	for (i = 0, module = hd64465_modules; i < HD64465_NMODULE;
    152  1.1  uch 	    i++, module++) {
    153  1.1  uch 		if (module->name == 0)
    154  1.1  uch 			continue;
    155  1.1  uch 		ha.ha_module_id = i;
    156  1.1  uch 		config_found(self, &ha, hd64465_print);
    157  1.1  uch 	}
    158  1.1  uch 
    159  1.1  uch 	shb_intr_establish(ia->ia_irq, IST_EDGE, IPL_TTY, hd64465_intr, self);
    160  1.1  uch }
    161  1.1  uch 
    162  1.1  uch int
    163  1.1  uch hd64465_print(void *aux, const char *pnp)
    164  1.1  uch {
    165  1.1  uch 	struct hd64465_attach_args *ha = aux;
    166  1.1  uch 
    167  1.1  uch 	if (pnp)
    168  1.1  uch 		printf("%s at %s", hd64465_modules[ha->ha_module_id].name, pnp);
    169  1.1  uch 
    170  1.1  uch 	return (UNCONF);
    171  1.1  uch }
    172  1.1  uch 
    173  1.1  uch void *
    174  1.1  uch hd64465_intr_establish(enum hd64465_irq irq, int mode, int level,
    175  1.1  uch     int (*func)(void *), void *arg)
    176  1.1  uch {
    177  1.1  uch 	struct hd64465_intr_entry *entry = &hd64465_intr_entry[irq];
    178  1.1  uch 	u_int16_t r, bit;
    179  1.1  uch 	int s;
    180  1.1  uch 
    181  1.1  uch 	s = splhigh();
    182  1.1  uch 
    183  1.1  uch 	entry->func = func;
    184  1.1  uch 	entry->arg = arg;
    185  1.1  uch 	entry->priority = level;
    186  1.1  uch 
    187  1.1  uch 	bit = entry->bit;
    188  1.1  uch 
    189  1.1  uch 	/* Trigger type */
    190  1.1  uch 	r = hd64465_reg_read_2(HD64465_NITR);
    191  1.1  uch 	switch (mode) {
    192  1.1  uch 	case IST_PULSE:
    193  1.1  uch 		/* FALLTHROUGH */
    194  1.1  uch 	case IST_EDGE:
    195  1.1  uch 		r |= bit;
    196  1.1  uch 		break;
    197  1.1  uch 	case IST_LEVEL:
    198  1.1  uch 		r &= ~bit;
    199  1.1  uch 		break;
    200  1.1  uch 	}
    201  1.1  uch 	hd64465_reg_write_2(HD64465_NITR, r);
    202  1.1  uch 
    203  1.1  uch 	/* Enable interrupt */
    204  1.1  uch 	hd64465.imask &= ~bit;
    205  1.1  uch 	hd64465_reg_write_2(HD64465_NIMR, hd64465.imask);
    206  1.1  uch 
    207  1.1  uch 	splx(s);
    208  1.1  uch 
    209  1.1  uch 	return (void *)irq;
    210  1.1  uch }
    211  1.1  uch 
    212  1.1  uch void
    213  1.1  uch hd64465_intr_disestablish(void *handle)
    214  1.1  uch {
    215  1.1  uch 	int irq = (int)handle;
    216  1.1  uch 	struct hd64465_intr_entry *entry = &hd64465_intr_entry[irq];
    217  1.1  uch 	int s;
    218  1.1  uch 
    219  1.1  uch 	s = splhigh();
    220  1.1  uch 
    221  1.1  uch 	/* disable interrupt */
    222  1.1  uch 	hd64465.imask |= entry->bit;
    223  1.1  uch 	hd64465_reg_write_2(HD64465_NIMR, hd64465.imask);
    224  1.1  uch 
    225  1.1  uch 	entry->func = 0;
    226  1.1  uch 
    227  1.1  uch 	splx(s);
    228  1.1  uch }
    229  1.1  uch 
    230  1.1  uch int
    231  1.1  uch hd64465_intr(void *arg)
    232  1.1  uch {
    233  1.1  uch 	struct hd64465_intr_entry *entry = hd64465_intr_entry;
    234  1.1  uch 	u_int16_t cause;
    235  1.1  uch 	int i;
    236  1.1  uch 
    237  1.1  uch 	cause = hd64465_reg_read_2(HD64465_NIRR) & ~hd64465.imask;
    238  1.1  uch 	hd64465_reg_write_2(HD64465_NIRR, 0);
    239  1.1  uch 
    240  1.1  uch 	for (i = 0; i < HD64465_IRQ_MAX; i++, entry++) {
    241  1.1  uch 		if (entry->func == 0)
    242  1.1  uch 			continue;
    243  1.1  uch 		if (cause & entry->bit)
    244  1.1  uch 			(*entry->func)(entry->arg);
    245  1.1  uch 	}
    246  1.1  uch 
    247  1.1  uch 	__dbg_heart_beat(HEART_BEAT_BLUE);
    248  1.1  uch 
    249  1.1  uch 	return (0);
    250  1.1  uch }
    251  1.1  uch 
    252  1.1  uch void
    253  1.1  uch hd64465_intr_disable()
    254  1.1  uch {
    255  1.1  uch 
    256  1.1  uch 	/* Mask all interrupt */
    257  1.1  uch 	hd64465.imask = 0xffff;
    258  1.1  uch 	hd64465_reg_write_2(HD64465_NIMR, 0xffff);
    259  1.1  uch 
    260  1.1  uch 	/* Edge trigger mode */
    261  1.1  uch 	hd64465_reg_write_2(HD64465_NITR, 0xffff);
    262  1.1  uch 	/* Clear pending interrupt */
    263  1.1  uch 	hd64465_reg_write_2(HD64465_NIRR, 0x0000);
    264  1.1  uch }
    265  1.1  uch 
    266  1.1  uch void
    267  1.1  uch hd64465_intr_mask()
    268  1.1  uch {
    269  1.1  uch 
    270  1.1  uch 	hd64465_reg_write_2(HD64465_NIMR, 0xffff);
    271  1.1  uch }
    272  1.1  uch 
    273  1.1  uch void
    274  1.1  uch hd64465_intr_unmask()
    275  1.1  uch {
    276  1.1  uch 
    277  1.1  uch 	hd64465_reg_write_2(HD64465_NIMR, hd64465.imask);
    278  1.1  uch }
    279  1.1  uch 
    280  1.1  uch /* For the sake of Windows CE reboot clearly. */
    281  1.1  uch void
    282  1.1  uch hd64465_intr_reboot()
    283  1.1  uch {
    284  1.1  uch 
    285  1.1  uch 	/* Enable all interrupt */
    286  1.1  uch 	hd64465_reg_write_2(HD64465_NIMR, 0x0000);
    287  1.1  uch 
    288  1.1  uch 	/* Level trigger mode */
    289  1.1  uch 	hd64465_reg_write_2(HD64465_NITR, 0x0000);
    290  1.1  uch }
    291