hd6446xintc.c revision 1.2 1 /* $NetBSD: hd6446xintc.c,v 1.2 2003/07/15 02:29:38 lukem Exp $ */
2
3 /*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: hd6446xintc.c,v 1.2 2003/07/15 02:29:38 lukem Exp $");
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44
45 #include <sh3/devreg.h>
46 #include <hpcsh/dev/hd6446x/hd6446xintcvar.h>
47 #include <hpcsh/dev/hd6446x/hd6446xintcreg.h>
48
49 struct hd6446x_intrhand hd6446x_intrhand[_HD6446X_INTR_N];
50 u_int16_t hd6446x_imask[_IPL_N];
51 u_int16_t hd6446x_ienable;
52 void hd6446x_intr_priority_update(void);
53
54 void
55 hd6446x_intr_init()
56 {
57
58 /* Initialize interrupt priority masks. */
59 hd6446x_intr_priority_update();
60 }
61
62 void *
63 hd6446x_intr_establish(int irq, int mode, int level,
64 int (*func)(void *), void *arg)
65 {
66 struct hd6446x_intrhand *hh = &hd6446x_intrhand[ffs(irq) - 1];
67 u_int16_t r;
68 int s;
69
70 s = splhigh();
71
72 /* Register interrupt handler */
73 hh->hh_func = func;
74 hh->hh_arg = arg;
75 hh->hh_ipl = level << 4;
76 hh->hh_imask = irq;
77 hd6446x_ienable |= hh->hh_imask;
78
79 /* Update interrupt priority masks. */
80 hd6446x_intr_priority_update();
81
82 /* Enable interrupt */
83 r = _reg_read_2(HD6446X_NIMR);
84 r &= ~hh->hh_imask;
85 _reg_write_2(HD6446X_NIMR, r);
86
87 splx(s);
88
89 return (hh);
90 }
91
92 void
93 hd6446x_intr_disestablish(void *handle)
94 {
95 struct hd6446x_intrhand *hh = handle;
96 u_int16_t r;
97 int s;
98
99 s = splhigh();
100
101 /* Disable interrupt */
102 r = _reg_read_2(HD6446X_NIMR);
103 r |= hh->hh_imask;
104 _reg_write_2(HD6446X_NIMR, r);
105
106 /* Update interrupt priority masks */
107 hd6446x_ienable &= ~hh->hh_imask;
108 memset(hh, 0, sizeof(*hh));
109 hd6446x_intr_priority_update();
110
111 splx(s);
112 }
113
114 void
115 hd6446x_intr_priority(int irq, int level)
116 {
117 struct hd6446x_intrhand *hh = &hd6446x_intrhand[ffs(irq) - 1];
118 int s;
119
120 KDASSERT(hh->hh_func != NULL);
121 s = splhigh();
122 hh->hh_ipl = level << 4;
123 hd6446x_intr_priority_update();
124 splx(s);
125 }
126
127 void
128 hd6446x_intr_priority_update()
129 {
130 struct hd6446x_intrhand *hh;
131 int irq, ipl;
132 u_int16_t mask;
133
134 /* I assume interrupt level is splhigh */
135 for (ipl = 0; ipl < _IPL_N; ipl++) {
136 hh = hd6446x_intrhand;
137 mask = 0;
138 for (irq = 0; irq < _HD6446X_INTR_N; irq++, hh++) {
139 if (hh->hh_func == NULL)
140 continue;
141 if (hh->hh_ipl == (ipl << 4))
142 mask |= 1 << irq;
143 }
144 hd6446x_imask[ipl] = mask | ~hd6446x_ienable;
145 }
146
147 for (ipl = 1; ipl < _IPL_N; ipl++)
148 hd6446x_imask[ipl] |= hd6446x_imask[ipl - 1];
149 }
150