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astro.c revision 1.1
      1 /*	$NetBSD: astro.c,v 1.1 2014/02/24 07:23:42 skrll Exp $	*/
      2 
      3 /*	$OpenBSD: astro.c,v 1.8 2007/10/06 23:50:54 krw Exp $	*/
      4 
      5 /*
      6  * Copyright (c) 2007 Mark Kettenis
      7  *
      8  * Permission to use, copy, modify, and distribute this software for any
      9  * purpose with or without fee is hereby granted, provided that the above
     10  * copyright notice and this permission notice appear in all copies.
     11  *
     12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     13  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     14  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     15  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     16  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     17  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     18  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     19  */
     20 
     21 #include <sys/param.h>
     22 #include <sys/systm.h>
     23 #include <sys/device.h>
     24 #include <sys/extent.h>
     25 #include <sys/malloc.h>
     26 #include <sys/reboot.h>
     27 #include <sys/tree.h>
     28 
     29 #include <uvm/uvm.h>
     30 
     31 #include <machine/iomod.h>
     32 #include <machine/autoconf.h>
     33 #include <machine/pdc.h>
     34 #include <machine/endian.h>
     35 
     36 #include <hppa/dev/cpudevs.h>
     37 #include <hppa/hppa/machdep.h>
     38 
     39 struct astro_regs {
     40 	uint32_t	rid;
     41 	uint32_t	pad0000;
     42 	uint32_t	ioc_ctrl;
     43 	uint32_t	pad0008;
     44 	uint8_t		resv1[0x0300 - 0x0010];
     45 	uint64_t	lmmio_direct0_base;
     46 	uint64_t	lmmio_direct0_mask;
     47 	uint64_t	lmmio_direct0_route;
     48 	uint64_t	lmmio_direct1_base;
     49 	uint64_t	lmmio_direct1_mask;
     50 	uint64_t	lmmio_direct1_route;
     51 	uint64_t	lmmio_direct2_base;
     52 	uint64_t	lmmio_direct2_mask;
     53 	uint64_t	lmmio_direct2_route;
     54 	uint64_t	lmmio_direct3_base;
     55 	uint64_t	lmmio_direct3_mask;
     56 	uint64_t	lmmio_direct3_route;
     57 	uint64_t	lmmio_dist_base;
     58 	uint64_t	lmmio_dist_mask;
     59 	uint64_t	lmmio_dist_route;
     60 	uint64_t	gmmio_dist_base;
     61 	uint64_t	gmmio_dist_mask;
     62 	uint64_t	gmmio_dist_route;
     63 	uint64_t	ios_dist_base;
     64 	uint64_t	ios_dist_mask;
     65 	uint64_t	ios_dist_route;
     66 	uint8_t		resv2[0x03c0 - 0x03a8];
     67 	uint64_t	ios_direct_base;
     68 	uint64_t	ios_direct_mask;
     69 	uint64_t	ios_direct_route;
     70 	uint8_t		resv3[0x22000 - 0x03d8];
     71 	uint64_t	func_id;
     72 	uint64_t	func_class;
     73 	uint8_t		resv4[0x22040 - 0x22010];
     74 	uint64_t	rope_config;
     75 	uint8_t		resv5[0x22050 - 0x22048];
     76 	uint64_t	rope_debug;
     77 	uint8_t		resv6[0x22200 - 0x22058];
     78 	uint64_t	rope0_control;
     79 	uint64_t	rope1_control;
     80 	uint64_t	rope2_control;
     81 	uint64_t	rope3_control;
     82 	uint64_t	rope4_control;
     83 	uint64_t	rope5_control;
     84 	uint64_t	rope6_control;
     85 	uint64_t	rope7_control;
     86 	uint8_t		resv7[0x22300 - 0x22240];
     87 	uint32_t	tlb_ibase;
     88 	uint32_t	pad22300;
     89 	uint32_t	tlb_imask;
     90 	uint32_t	pad22308;
     91 	uint32_t	tlb_pcom;
     92 	uint32_t	pad22310;
     93 	uint32_t	tlb_tcnfg;
     94 	uint32_t	pad22318;
     95 	uint64_t	tlb_pdir_base;
     96 };
     97 
     98 #define ASTRO_IOC_CTRL_TE	0x0001	/* TOC Enable */
     99 #define ASTRO_IOC_CTRL_CE	0x0002	/* Coalesce Enable */
    100 #define ASTRO_IOC_CTRL_DE	0x0004	/* Dillon Enable */
    101 #define ASTRO_IOC_CTRL_IE	0x0008	/* IOS Enable */
    102 #define ASTRO_IOC_CTRL_OS	0x0010	/* Outbound Synchronous */
    103 #define ASTRO_IOC_CTRL_IS	0x0020	/* Inbound Synchronous */
    104 #define ASTRO_IOC_CTRL_RC	0x0040	/* Read Current Enable */
    105 #define ASTRO_IOC_CTRL_L0	0x0080	/* 0-length Read Enable */
    106 #define ASTRO_IOC_CTRL_RM	0x0100	/* Real Mode */
    107 #define ASTRO_IOC_CTRL_NC	0x0200	/* Non-coherent Mode */
    108 #define ASTRO_IOC_CTRL_ID	0x0400	/* Interrupt Disable */
    109 #define ASTRO_IOC_CTRL_D4	0x0800	/* Disable 4-byte Coalescing */
    110 #define ASTRO_IOC_CTRL_CC	0x1000	/* Increase Coalescing counter value */
    111 #define ASTRO_IOC_CTRL_DD	0x2000	/* Disable distr. range coalescing */
    112 #define ASTRO_IOC_CTRL_DC	0x4000	/* Disable the coalescing counter */
    113 
    114 #define IOTTE_V		0x8000000000000000LL	/* Entry valid */
    115 #define IOTTE_PAMASK	0x000000fffffff000LL
    116 #define IOTTE_CI	0x00000000000000ffLL	/* Coherent index */
    117 
    118 struct astro_softc {
    119 	device_t sc_dv;
    120 
    121 	bus_dma_tag_t sc_dmat;
    122 	struct astro_regs volatile *sc_regs;
    123 	uint64_t *sc_pdir;
    124 
    125 	char sc_dvmamapname[20];
    126 	struct extent *sc_dvmamap;
    127 	struct hppa_bus_dma_tag sc_dmatag;
    128 };
    129 
    130 /*
    131  * per-map DVMA page table
    132  */
    133 struct iommu_page_entry {
    134 	SPLAY_ENTRY(iommu_page_entry) ipe_node;
    135 	paddr_t	ipe_pa;
    136 	vaddr_t	ipe_va;
    137 	bus_addr_t ipe_dva;
    138 };
    139 
    140 struct iommu_page_map {
    141 	SPLAY_HEAD(iommu_page_tree, iommu_page_entry) ipm_tree;
    142 	int ipm_maxpage;	/* Size of allocated page map */
    143 	int ipm_pagecnt;	/* Number of entries in use */
    144 	struct iommu_page_entry	ipm_map[1];
    145 };
    146 
    147 /*
    148  * per-map IOMMU state
    149  */
    150 struct iommu_map_state {
    151 	struct astro_softc *ims_sc;
    152 	bus_addr_t ims_dvmastart;
    153 	bus_size_t ims_dvmasize;
    154 	struct iommu_page_map ims_map;	/* map must be last (array at end) */
    155 };
    156 
    157 int	astro_match(device_t, cfdata_t, void *);
    158 void	astro_attach(device_t, device_t, void *);
    159 static device_t astro_callback(device_t self, struct confargs *ca);
    160 
    161 CFATTACH_DECL_NEW(astro, sizeof(struct astro_softc),
    162     astro_match, astro_attach, NULL, NULL);
    163 
    164 extern struct cfdriver astro_cd;
    165 
    166 int	iommu_dvmamap_create(void *, bus_size_t, int, bus_size_t, bus_size_t,
    167 	    int, bus_dmamap_t *);
    168 void	iommu_dvmamap_destroy(void *, bus_dmamap_t);
    169 int	iommu_dvmamap_load(void *, bus_dmamap_t, void *, bus_size_t,
    170 	    struct proc *, int);
    171 int	iommu_dvmamap_load_mbuf(void *, bus_dmamap_t, struct mbuf *, int);
    172 int	iommu_dvmamap_load_uio(void *, bus_dmamap_t, struct uio *, int);
    173 int	iommu_dvmamap_load_raw(void *, bus_dmamap_t, bus_dma_segment_t *,
    174 	    int, bus_size_t, int);
    175 void	iommu_dvmamap_unload(void *, bus_dmamap_t);
    176 void	iommu_dvmamap_sync(void *, bus_dmamap_t, bus_addr_t, bus_size_t, int);
    177 int	iommu_dvmamem_alloc(void *, bus_size_t, bus_size_t, bus_size_t,
    178 	    bus_dma_segment_t *, int, int *, int);
    179 void	iommu_dvmamem_free(void *, bus_dma_segment_t *, int);
    180 int	iommu_dvmamem_map(void *, bus_dma_segment_t *, int, size_t,
    181 	    void **, int);
    182 void	iommu_dvmamem_unmap(void *, void *, size_t);
    183 paddr_t	iommu_dvmamem_mmap(void *, bus_dma_segment_t *, int, off_t, int, int);
    184 
    185 void	iommu_enter(struct astro_softc *, bus_addr_t, paddr_t, vaddr_t, int);
    186 void	iommu_remove(struct astro_softc *, bus_addr_t);
    187 
    188 struct iommu_map_state *iommu_iomap_create(int);
    189 void	iommu_iomap_destroy(struct iommu_map_state *);
    190 int	iommu_iomap_insert_page(struct iommu_map_state *, vaddr_t, paddr_t);
    191 bus_addr_t iommu_iomap_translate(struct iommu_map_state *, paddr_t);
    192 void	iommu_iomap_clear_pages(struct iommu_map_state *);
    193 
    194 static int iommu_iomap_load_map(struct astro_softc *, bus_dmamap_t, int);
    195 
    196 const struct hppa_bus_dma_tag astro_dmat = {
    197 	NULL,
    198 	iommu_dvmamap_create, iommu_dvmamap_destroy,
    199 	iommu_dvmamap_load, iommu_dvmamap_load_mbuf,
    200 	iommu_dvmamap_load_uio, iommu_dvmamap_load_raw,
    201 	iommu_dvmamap_unload, iommu_dvmamap_sync,
    202 
    203 	iommu_dvmamem_alloc, iommu_dvmamem_free, iommu_dvmamem_map,
    204 	iommu_dvmamem_unmap, iommu_dvmamem_mmap
    205 };
    206 
    207 int
    208 astro_match(device_t parent, cfdata_t cf, void *aux)
    209 {
    210 	struct confargs *ca = aux;
    211 
    212 	/* Astro is a U-Turn variant. */
    213 	if (ca->ca_type.iodc_type != HPPA_TYPE_IOA ||
    214 	    ca->ca_type.iodc_sv_model != HPPA_IOA_UTURN)
    215 		return 0;
    216 
    217 	if (ca->ca_type.iodc_model == 0x58 &&
    218 	    ca->ca_type.iodc_revision >= 0x20)
    219 		return 1;
    220 
    221 	return 0;
    222 }
    223 
    224 void
    225 astro_attach(device_t parent, device_t self, void *aux)
    226 {
    227 	struct confargs *ca = aux, nca;
    228 	struct astro_softc *sc = device_private(self);
    229 	volatile struct astro_regs *r;
    230 	bus_space_handle_t ioh;
    231 	uint32_t rid, ioc_ctrl;
    232 	psize_t size;
    233 	vaddr_t va;
    234 	paddr_t pa;
    235 	void *p;
    236 	struct vm_page *m;
    237 	struct pglist mlist;
    238 	int iova_bits;
    239 	int pagezero_cookie;
    240 
    241 	sc->sc_dv = self;
    242 	sc->sc_dmat = ca->ca_dmatag;
    243 	if (bus_space_map(ca->ca_iot, ca->ca_hpa, sizeof(struct astro_regs),
    244 	    0, &ioh)) {
    245 		aprint_error(": can't map IO space\n");
    246 		return;
    247 	}
    248 	p = bus_space_vaddr(ca->ca_iot, ioh);
    249 	sc->sc_regs = r = p;
    250 	rid = le32toh(r->rid);
    251 	aprint_normal(": Astro rev %d.%d\n", (rid & 7) + 1, (rid >> 3) & 3);
    252 
    253 	ioc_ctrl = le32toh(r->ioc_ctrl);
    254 	ioc_ctrl &= ~ASTRO_IOC_CTRL_CE;
    255 	ioc_ctrl &= ~ASTRO_IOC_CTRL_RM;
    256 	ioc_ctrl &= ~ASTRO_IOC_CTRL_NC;
    257 	r->ioc_ctrl = htole32(ioc_ctrl);
    258 
    259 	/*
    260 	 * Setup the iommu.
    261 	 */
    262 
    263 	/* XXX This gives us 256MB of iova space. */
    264 	iova_bits = 28;
    265 
    266 	r->tlb_ibase = htole32(0);
    267 	r->tlb_imask = htole32(0xffffffff << iova_bits);
    268 
    269 	/* Page size is 4K. */
    270 	r->tlb_tcnfg = htole32(0);
    271 
    272 	/* Flush TLB. */
    273 	r->tlb_pcom = htole32(31);
    274 
    275 	/*
    276 	 * Allocate memory for I/O pagetables.  They need to be physically
    277 	 * contiguous.
    278 	 */
    279 
    280 	size = (1 << (iova_bits - PAGE_SHIFT)) * sizeof(uint64_t);
    281 	TAILQ_INIT(&mlist);
    282 	if (uvm_pglistalloc(size, 0, -1, PAGE_SIZE, 0, &mlist, 1, 0) != 0) {
    283 		aprint_error(": can't allocate PDIR\n");
    284 		return;
    285 	}
    286 
    287 	va = uvm_km_alloc(kernel_map, size, 0, UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
    288 
    289 	if (va == 0) {
    290 		aprint_error(": can't map PDIR\n");
    291 		return;
    292 	}
    293 	sc->sc_pdir = (uint64_t *)va;
    294 
    295 	m = TAILQ_FIRST(&mlist);
    296 	r->tlb_pdir_base = htole64(VM_PAGE_TO_PHYS(m));
    297 
    298 	/* Map the pages. */
    299 	for (; m != NULL; m = TAILQ_NEXT(m, pageq.queue)) {
    300 		pa = VM_PAGE_TO_PHYS(m);
    301 		pmap_enter(pmap_kernel(), va, pa,
    302 		    VM_PROT_READ|VM_PROT_WRITE, PMAP_WIRED);
    303 		va += PAGE_SIZE;
    304 	}
    305 	pmap_update(pmap_kernel());
    306 	memset(sc->sc_pdir, 0, size);
    307 
    308 	/*
    309 	 * The PDC might have set up some devices to do DMA.  It will do
    310 	 * this for the onboard USB controller if an USB keyboard is used
    311 	 * for console input.  In that case, bad things will happen if we
    312 	 * enable iova space.  So reset the PDC devices before we do that.
    313 	 * Don't do this if we're using a serial console though, since it
    314 	 * will stop working if we do.  This is fine since the serial port
    315 	 * doesn't do DMA.
    316 	 */
    317 	pagezero_cookie = hppa_pagezero_map();
    318 	if (PAGE0->mem_cons.pz_class != PCL_DUPLEX)
    319 		pdcproc_ioreset();
    320 	hppa_pagezero_unmap(pagezero_cookie);
    321 
    322 	/* Enable iova space. */
    323 	r->tlb_ibase = htole32(1);
    324 
    325 	/*
    326 	 * Now all the hardware's working we need to allocate a dvma map.
    327 	 */
    328 	snprintf(sc->sc_dvmamapname, sizeof(sc->sc_dvmamapname),
    329 	    "%s_dvma", device_xname(sc->sc_dv));
    330 	sc->sc_dvmamap = extent_create(sc->sc_dvmamapname, 0, (1 << iova_bits),
    331 	    0, 0, EX_NOWAIT);
    332 
    333 	sc->sc_dmatag = astro_dmat;
    334 	sc->sc_dmatag._cookie = sc;
    335 
    336 	nca = *ca;	/* clone from us */
    337 	nca.ca_dmatag = &sc->sc_dmatag;
    338 	nca.ca_hpabase = IOMOD_IO_IO_LOW(p);
    339 	nca.ca_nmodules = MAXMODBUS;
    340 	pdc_scanbus(self, &nca, astro_callback);
    341 }
    342 
    343 static device_t
    344 astro_callback(device_t self, struct confargs *ca)
    345 {
    346 
    347 	return config_found_sm_loc(self, "gedoens", NULL, ca, mbprint, mbsubmatch);
    348 }
    349 
    350 int
    351 iommu_dvmamap_create(void *v, bus_size_t size, int nsegments,
    352     bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamap)
    353 {
    354 	struct astro_softc *sc = v;
    355 	bus_dmamap_t map;
    356 	struct iommu_map_state *ims;
    357 	int error;
    358 
    359 	error = bus_dmamap_create(sc->sc_dmat, size, nsegments, maxsegsz,
    360 	    boundary, flags, &map);
    361 	if (error)
    362 		return (error);
    363 
    364 	ims = iommu_iomap_create(atop(round_page(size)));
    365 	if (ims == NULL) {
    366 		bus_dmamap_destroy(sc->sc_dmat, map);
    367 		return (ENOMEM);
    368 	}
    369 
    370 	ims->ims_sc = sc;
    371 	map->_dm_cookie = ims;
    372 	*dmamap = map;
    373 
    374 	return (0);
    375 }
    376 
    377 void
    378 iommu_dvmamap_destroy(void *v, bus_dmamap_t map)
    379 {
    380 	struct astro_softc *sc = v;
    381 
    382 	/*
    383 	 * The specification (man page) requires a loaded
    384 	 * map to be unloaded before it is destroyed.
    385 	 */
    386 	if (map->dm_nsegs)
    387 		iommu_dvmamap_unload(sc, map);
    388 
    389 	if (map->_dm_cookie)
    390 		iommu_iomap_destroy(map->_dm_cookie);
    391 	map->_dm_cookie = NULL;
    392 
    393 	bus_dmamap_destroy(sc->sc_dmat, map);
    394 }
    395 
    396 static int
    397 iommu_iomap_load_map(struct astro_softc *sc, bus_dmamap_t map, int flags)
    398 {
    399 	struct iommu_map_state *ims = map->_dm_cookie;
    400 	struct iommu_page_map *ipm = &ims->ims_map;
    401 	struct iommu_page_entry *e;
    402 	int err, seg, s;
    403 	paddr_t pa, paend;
    404 	vaddr_t va;
    405 	bus_size_t sgsize;
    406 	bus_size_t align, boundary;
    407 	u_long dvmaddr;
    408 	bus_addr_t dva;
    409 	int i;
    410 
    411 	/* XXX */
    412 	boundary = map->_dm_boundary;
    413 	align = PAGE_SIZE;
    414 
    415 	iommu_iomap_clear_pages(ims);
    416 
    417 	for (seg = 0; seg < map->dm_nsegs; seg++) {
    418 		struct hppa_bus_dma_segment *ds = &map->dm_segs[seg];
    419 
    420 		paend = round_page(ds->ds_addr + ds->ds_len);
    421 		for (pa = trunc_page(ds->ds_addr), va = trunc_page(ds->_ds_va);
    422 		     pa < paend; pa += PAGE_SIZE, va += PAGE_SIZE) {
    423 			err = iommu_iomap_insert_page(ims, va, pa);
    424 			if (err) {
    425 				printf("iomap insert error: %d for "
    426 				    "va 0x%lx pa 0x%lx\n", err, va, pa);
    427 				bus_dmamap_unload(sc->sc_dmat, map);
    428 				iommu_iomap_clear_pages(ims);
    429 			}
    430 		}
    431 	}
    432 
    433 	sgsize = ims->ims_map.ipm_pagecnt * PAGE_SIZE;
    434 	/* XXXNH */
    435 	s = splhigh();
    436 	err = extent_alloc(sc->sc_dvmamap, sgsize, align, boundary,
    437 	    EX_NOWAIT | EX_BOUNDZERO, &dvmaddr);
    438 	splx(s);
    439 	if (err)
    440 		return (err);
    441 
    442 	ims->ims_dvmastart = dvmaddr;
    443 	ims->ims_dvmasize = sgsize;
    444 
    445 	dva = dvmaddr;
    446 	for (i = 0, e = ipm->ipm_map; i < ipm->ipm_pagecnt; ++i, ++e) {
    447 		e->ipe_dva = dva;
    448 		iommu_enter(sc, e->ipe_dva, e->ipe_pa, e->ipe_va, flags);
    449 		dva += PAGE_SIZE;
    450 	}
    451 
    452 	for (seg = 0; seg < map->dm_nsegs; seg++) {
    453 		struct hppa_bus_dma_segment *ds = &map->dm_segs[seg];
    454 		ds->ds_addr = iommu_iomap_translate(ims, ds->ds_addr);
    455 	}
    456 
    457 	return (0);
    458 }
    459 
    460 int
    461 iommu_dvmamap_load(void *v, bus_dmamap_t map, void *addr, bus_size_t size,
    462     struct proc *p, int flags)
    463 {
    464 	struct astro_softc *sc = v;
    465 	int err;
    466 
    467 	err = bus_dmamap_load(sc->sc_dmat, map, addr, size, p, flags);
    468 	if (err)
    469 		return (err);
    470 
    471 	return iommu_iomap_load_map(sc, map, flags);
    472 }
    473 
    474 int
    475 iommu_dvmamap_load_mbuf(void *v, bus_dmamap_t map, struct mbuf *m, int flags)
    476 {
    477 	struct astro_softc *sc = v;
    478 	int err;
    479 
    480 	err = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, flags);
    481 	if (err)
    482 		return (err);
    483 
    484 	return iommu_iomap_load_map(sc, map, flags);
    485 }
    486 
    487 int
    488 iommu_dvmamap_load_uio(void *v, bus_dmamap_t map, struct uio *uio, int flags)
    489 {
    490 	struct astro_softc *sc = v;
    491 
    492 	printf("load_uio\n");
    493 
    494 	return (bus_dmamap_load_uio(sc->sc_dmat, map, uio, flags));
    495 }
    496 
    497 int
    498 iommu_dvmamap_load_raw(void *v, bus_dmamap_t map, bus_dma_segment_t *segs,
    499     int nsegs, bus_size_t size, int flags)
    500 {
    501 	struct astro_softc *sc = v;
    502 
    503 	printf("load_raw\n");
    504 
    505 	return (bus_dmamap_load_raw(sc->sc_dmat, map, segs, nsegs, size, flags));
    506 }
    507 
    508 void
    509 iommu_dvmamap_unload(void *v, bus_dmamap_t map)
    510 {
    511 	struct astro_softc *sc = v;
    512 	struct iommu_map_state *ims = map->_dm_cookie;
    513 	struct iommu_page_map *ipm = &ims->ims_map;
    514 	struct iommu_page_entry *e;
    515 	int err, i, s;
    516 
    517 	/* Remove the IOMMU entries. */
    518 	for (i = 0, e = ipm->ipm_map; i < ipm->ipm_pagecnt; ++i, ++e)
    519 		iommu_remove(sc, e->ipe_dva);
    520 
    521 	/* Clear the iomap. */
    522 	iommu_iomap_clear_pages(ims);
    523 
    524 	bus_dmamap_unload(sc->sc_dmat, map);
    525 
    526 	s = splhigh();
    527 	err = extent_free(sc->sc_dvmamap, ims->ims_dvmastart,
    528 	    ims->ims_dvmasize, EX_NOWAIT);
    529 	ims->ims_dvmastart = 0;
    530 	ims->ims_dvmasize = 0;
    531 	splx(s);
    532 	if (err)
    533 		printf("warning: %ld of DVMA space lost\n", ims->ims_dvmasize);
    534 }
    535 
    536 void
    537 iommu_dvmamap_sync(void *v, bus_dmamap_t map, bus_addr_t off,
    538     bus_size_t len, int ops)
    539 {
    540 	/* Nothing to do; DMA is cache-coherent. */
    541 }
    542 
    543 int
    544 iommu_dvmamem_alloc(void *v, bus_size_t size, bus_size_t alignment,
    545     bus_size_t boundary, bus_dma_segment_t *segs,
    546     int nsegs, int *rsegs, int flags)
    547 {
    548 	struct astro_softc *sc = v;
    549 
    550 	return (bus_dmamem_alloc(sc->sc_dmat, size, alignment, boundary,
    551 	    segs, nsegs, rsegs, flags));
    552 }
    553 
    554 void
    555 iommu_dvmamem_free(void *v, bus_dma_segment_t *segs, int nsegs)
    556 {
    557 	struct astro_softc *sc = v;
    558 
    559 	bus_dmamem_free(sc->sc_dmat, segs, nsegs);
    560 }
    561 
    562 int
    563 iommu_dvmamem_map(void *v, bus_dma_segment_t *segs, int nsegs, size_t size,
    564     void **kvap, int flags)
    565 {
    566 	struct astro_softc *sc = v;
    567 
    568 	return (bus_dmamem_map(sc->sc_dmat, segs, nsegs, size, kvap, flags));
    569 }
    570 
    571 void
    572 iommu_dvmamem_unmap(void *v, void *kva, size_t size)
    573 {
    574 	struct astro_softc *sc = v;
    575 
    576 	bus_dmamem_unmap(sc->sc_dmat, kva, size);
    577 }
    578 
    579 paddr_t
    580 iommu_dvmamem_mmap(void *v, bus_dma_segment_t *segs, int nsegs, off_t off,
    581     int prot, int flags)
    582 {
    583 	struct astro_softc *sc = v;
    584 
    585 	return (bus_dmamem_mmap(sc->sc_dmat, segs, nsegs, off, prot, flags));
    586 }
    587 
    588 /*
    589  * Utility function used by splay tree to order page entries by pa.
    590  */
    591 static inline int
    592 iomap_compare(struct iommu_page_entry *a, struct iommu_page_entry *b)
    593 {
    594 	return ((a->ipe_pa > b->ipe_pa) ? 1 :
    595 		(a->ipe_pa < b->ipe_pa) ? -1 : 0);
    596 }
    597 
    598 SPLAY_PROTOTYPE(iommu_page_tree, iommu_page_entry, ipe_node, iomap_compare);
    599 
    600 SPLAY_GENERATE(iommu_page_tree, iommu_page_entry, ipe_node, iomap_compare);
    601 
    602 /*
    603  * Create a new iomap.
    604  */
    605 struct iommu_map_state *
    606 iommu_iomap_create(int n)
    607 {
    608 	struct iommu_map_state *ims;
    609 
    610 	/* Safety for heavily fragmented data, such as mbufs */
    611 	n += 4;
    612 	if (n < 16)
    613 		n = 16;
    614 
    615 	ims = malloc(sizeof(*ims) + (n - 1) * sizeof(ims->ims_map.ipm_map[0]),
    616 	    M_DEVBUF, M_NOWAIT | M_ZERO);
    617 	if (ims == NULL)
    618 		return (NULL);
    619 
    620 	/* Initialize the map. */
    621 	ims->ims_map.ipm_maxpage = n;
    622 	SPLAY_INIT(&ims->ims_map.ipm_tree);
    623 
    624 	return (ims);
    625 }
    626 
    627 /*
    628  * Destroy an iomap.
    629  */
    630 void
    631 iommu_iomap_destroy(struct iommu_map_state *ims)
    632 {
    633 #ifdef DIAGNOSTIC
    634 	if (ims->ims_map.ipm_pagecnt > 0)
    635 		printf("iommu_iomap_destroy: %d page entries in use\n",
    636 		    ims->ims_map.ipm_pagecnt);
    637 #endif
    638 
    639 	free(ims, M_DEVBUF);
    640 }
    641 
    642 /*
    643  * Insert a pa entry in the iomap.
    644  */
    645 int
    646 iommu_iomap_insert_page(struct iommu_map_state *ims, vaddr_t va, paddr_t pa)
    647 {
    648 	struct iommu_page_map *ipm = &ims->ims_map;
    649 	struct iommu_page_entry *e;
    650 
    651 	if (ipm->ipm_pagecnt >= ipm->ipm_maxpage) {
    652 		struct iommu_page_entry ipe;
    653 
    654 		ipe.ipe_pa = pa;
    655 		if (SPLAY_FIND(iommu_page_tree, &ipm->ipm_tree, &ipe))
    656 			return (0);
    657 
    658 		return (ENOMEM);
    659 	}
    660 
    661 	e = &ipm->ipm_map[ipm->ipm_pagecnt];
    662 
    663 	e->ipe_pa = pa;
    664 	e->ipe_va = va;
    665 	e->ipe_dva = 0;
    666 
    667 	e = SPLAY_INSERT(iommu_page_tree, &ipm->ipm_tree, e);
    668 
    669 	/* Duplicates are okay, but only count them once. */
    670 	if (e)
    671 		return (0);
    672 
    673 	++ipm->ipm_pagecnt;
    674 
    675 	return (0);
    676 }
    677 
    678 /*
    679  * Translate a physical address (pa) into a DVMA address.
    680  */
    681 bus_addr_t
    682 iommu_iomap_translate(struct iommu_map_state *ims, paddr_t pa)
    683 {
    684 	struct iommu_page_map *ipm = &ims->ims_map;
    685 	struct iommu_page_entry *e;
    686 	struct iommu_page_entry pe;
    687 	paddr_t offset = pa & PAGE_MASK;
    688 
    689 	pe.ipe_pa = trunc_page(pa);
    690 
    691 	e = SPLAY_FIND(iommu_page_tree, &ipm->ipm_tree, &pe);
    692 
    693 	if (e == NULL) {
    694 		panic("couldn't find pa %lx\n", pa);
    695 		return 0;
    696 	}
    697 
    698 	return (e->ipe_dva | offset);
    699 }
    700 
    701 /*
    702  * Clear the iomap table and tree.
    703  */
    704 void
    705 iommu_iomap_clear_pages(struct iommu_map_state *ims)
    706 {
    707 	ims->ims_map.ipm_pagecnt = 0;
    708 	SPLAY_INIT(&ims->ims_map.ipm_tree);
    709 }
    710 
    711 /*
    712  * Add an entry to the IOMMU table.
    713  */
    714 void
    715 iommu_enter(struct astro_softc *sc, bus_addr_t dva, paddr_t pa, vaddr_t va,
    716     int flags)
    717 {
    718 	volatile uint64_t *tte_ptr = &sc->sc_pdir[dva >> PAGE_SHIFT];
    719 	uint64_t tte;
    720 	uint32_t ci;
    721 
    722 #ifdef ASTRODEBUG
    723 	printf("iommu_enter dva %lx, pa %lx, va %lx\n", dva, pa, va);
    724 #endif
    725 
    726 #ifdef DIAGNOSTIC
    727 	tte = le64toh(*tte_ptr);
    728 
    729 	if (tte & IOTTE_V) {
    730 		printf("Overwriting valid tte entry (dva %lx pa %lx "
    731 		    "&tte %p tte %llx)\n", dva, pa, tte_ptr, tte);
    732 		extent_print(sc->sc_dvmamap);
    733 		panic("IOMMU overwrite");
    734 	}
    735 #endif
    736 
    737 	ci = lci(HPPA_SID_KERNEL, va);
    738 
    739 	tte = (pa & IOTTE_PAMASK) | ((ci >> 12) & IOTTE_CI);
    740 	tte |= IOTTE_V;
    741 
    742 	*tte_ptr = htole64(tte);
    743 	fdcache(HPPA_SID_KERNEL, (vaddr_t)tte_ptr, sizeof(*tte_ptr));
    744 }
    745 
    746 /*
    747  * Remove an entry from the IOMMU table.
    748  */
    749 void
    750 iommu_remove(struct astro_softc *sc, bus_addr_t dva)
    751 {
    752 	volatile struct astro_regs *r = sc->sc_regs;
    753 	uint64_t *tte_ptr = &sc->sc_pdir[dva >> PAGE_SHIFT];
    754 	uint64_t tte;
    755 
    756 #ifdef DIAGNOSTIC
    757 	if (dva != trunc_page(dva)) {
    758 		printf("iommu_remove: unaligned dva: %lx\n", dva);
    759 		dva = trunc_page(dva);
    760 	}
    761 #endif
    762 
    763 	tte = le64toh(*tte_ptr);
    764 
    765 #ifdef DIAGNOSTIC
    766 	if ((tte & IOTTE_V) == 0) {
    767 		printf("Removing invalid tte entry (dva %lx &tte %p "
    768 		    "tte %llx)\n", dva, tte_ptr, tte);
    769 		extent_print(sc->sc_dvmamap);
    770 		panic("IOMMU remove overwrite");
    771 	}
    772 #endif
    773 
    774 	*tte_ptr = htole64(tte & ~IOTTE_V);
    775 
    776 	/* Flush IOMMU. */
    777 	r->tlb_pcom = htole32(dva | PAGE_SHIFT);
    778 }
    779