1 1.9 skrll /* $NetBSD: elroy.c,v 1.9 2024/12/29 07:51:25 skrll Exp $ */ 2 1.1 skrll 3 1.1 skrll /* $OpenBSD: elroy.c,v 1.5 2009/03/30 21:24:57 kettenis Exp $ */ 4 1.1 skrll 5 1.1 skrll /* 6 1.1 skrll * Copyright (c) 2005 Michael Shalayeff 7 1.1 skrll * All rights reserved. 8 1.1 skrll * 9 1.1 skrll * Permission to use, copy, modify, and distribute this software for any 10 1.1 skrll * purpose with or without fee is hereby granted, provided that the above 11 1.1 skrll * copyright notice and this permission notice appear in all copies. 12 1.1 skrll * 13 1.1 skrll * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 1.1 skrll * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 1.1 skrll * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 1.1 skrll * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 1.1 skrll * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN 18 1.1 skrll * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT 19 1.1 skrll * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 1.1 skrll */ 21 1.1 skrll 22 1.1 skrll /* #include "cardbus.h" */ 23 1.1 skrll 24 1.1 skrll #include <sys/param.h> 25 1.1 skrll #include <sys/systm.h> 26 1.1 skrll #include <sys/device.h> 27 1.1 skrll #include <sys/reboot.h> 28 1.1 skrll #include <sys/extent.h> 29 1.1 skrll 30 1.1 skrll #include <machine/iomod.h> 31 1.1 skrll #include <machine/autoconf.h> 32 1.1 skrll 33 1.1 skrll #include <hppa/dev/cpudevs.h> 34 1.1 skrll 35 1.1 skrll #if NCARDBUS > 0 36 1.1 skrll #include <dev/cardbus/rbus.h> 37 1.1 skrll #endif 38 1.1 skrll 39 1.1 skrll #include <dev/pci/pcireg.h> 40 1.1 skrll #include <dev/pci/pcivar.h> 41 1.1 skrll #include <dev/pci/pcidevs.h> 42 1.1 skrll 43 1.1 skrll #include <hppa/dev/elroyreg.h> 44 1.1 skrll #include <hppa/dev/elroyvar.h> 45 1.1 skrll 46 1.1 skrll #define ELROY_MEM_CHUNK 0x800000 47 1.1 skrll #define ELROY_MEM_WINDOW (2 * ELROY_MEM_CHUNK) 48 1.1 skrll 49 1.1 skrll int elroy_match(device_t, cfdata_t, void *); 50 1.1 skrll void elroy_attach(device_t, device_t, void *); 51 1.1 skrll 52 1.1 skrll CFATTACH_DECL_NEW(elroy, sizeof(struct elroy_softc), elroy_match, elroy_attach, 53 1.1 skrll NULL, NULL); 54 1.1 skrll 55 1.1 skrll extern struct cfdriver elroy_cd; 56 1.1 skrll 57 1.1 skrll void elroy_write32(volatile uint32_t *, uint32_t); 58 1.1 skrll uint32_t elroy_read32(volatile uint32_t *); 59 1.1 skrll void elroy_attach_hook(device_t, device_t, struct pcibus_attach_args *); 60 1.1 skrll int elroy_maxdevs(void *, int); 61 1.1 skrll pcitag_t elroy_make_tag(void *, int, int, int); 62 1.1 skrll void elroy_decompose_tag(void *, pcitag_t, int *, int *, int *); 63 1.1 skrll pcireg_t elroy_conf_read(void *, pcitag_t, int); 64 1.1 skrll void elroy_conf_write(void *, pcitag_t, int, pcireg_t); 65 1.1 skrll 66 1.1 skrll int elroy_iomap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *); 67 1.1 skrll int elroy_memmap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *); 68 1.1 skrll int elroy_subregion(void *, bus_space_handle_t, bus_size_t, bus_size_t, 69 1.1 skrll bus_space_handle_t *); 70 1.1 skrll int elroy_ioalloc(void *, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, 71 1.1 skrll bus_size_t, int, bus_addr_t *, bus_space_handle_t *); 72 1.1 skrll int elroy_memalloc(void *, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, 73 1.1 skrll bus_size_t, int, bus_addr_t *, bus_space_handle_t *); 74 1.1 skrll void elroy_unmap(void *, bus_space_handle_t, bus_size_t); 75 1.1 skrll void elroy_free(void *, bus_space_handle_t, bus_size_t); 76 1.1 skrll void elroy_barrier(void *, bus_space_handle_t, bus_size_t, bus_size_t, int); 77 1.1 skrll void *elroy_alloc_parent(device_t, struct pci_attach_args *, int); 78 1.1 skrll void *elroy_vaddr(void *, bus_space_handle_t); 79 1.1 skrll paddr_t elroy_mmap(void *, bus_addr_t, off_t, int, int); 80 1.1 skrll 81 1.1 skrll uint8_t elroy_r1(void *, bus_space_handle_t, bus_size_t); 82 1.1 skrll uint16_t elroy_r2(void *, bus_space_handle_t, bus_size_t); 83 1.1 skrll uint32_t elroy_r4(void *, bus_space_handle_t, bus_size_t); 84 1.1 skrll uint64_t elroy_r8(void *, bus_space_handle_t, bus_size_t); 85 1.7 macallan uint16_t elroy_rs2(void *, bus_space_handle_t, bus_size_t); 86 1.7 macallan uint32_t elroy_rs4(void *, bus_space_handle_t, bus_size_t); 87 1.7 macallan uint64_t elroy_rs8(void *, bus_space_handle_t, bus_size_t); 88 1.1 skrll void elroy_w1(void *, bus_space_handle_t, bus_size_t, uint8_t); 89 1.1 skrll void elroy_w2(void *, bus_space_handle_t, bus_size_t, uint16_t); 90 1.1 skrll void elroy_w4(void *, bus_space_handle_t, bus_size_t, uint32_t); 91 1.1 skrll void elroy_w8(void *, bus_space_handle_t, bus_size_t, uint64_t); 92 1.7 macallan void elroy_ws2(void *, bus_space_handle_t, bus_size_t, uint16_t); 93 1.7 macallan void elroy_ws4(void *, bus_space_handle_t, bus_size_t, uint32_t); 94 1.7 macallan void elroy_ws8(void *, bus_space_handle_t, bus_size_t, uint64_t); 95 1.1 skrll 96 1.1 skrll void elroy_rm_1(void *, bus_space_handle_t, bus_size_t, uint8_t *, 97 1.1 skrll bus_size_t); 98 1.1 skrll void elroy_rm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, 99 1.1 skrll bus_size_t); 100 1.1 skrll void elroy_rm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, 101 1.1 skrll bus_size_t); 102 1.1 skrll void elroy_rm_8(void *, bus_space_handle_t, bus_size_t, uint64_t *, 103 1.1 skrll bus_size_t); 104 1.1 skrll void elroy_wm_1(void *, bus_space_handle_t, bus_size_t, const uint8_t *, 105 1.1 skrll bus_size_t); 106 1.1 skrll void elroy_wm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, 107 1.1 skrll bus_size_t); 108 1.1 skrll void elroy_wm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, 109 1.1 skrll bus_size_t); 110 1.1 skrll void elroy_wm_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *, 111 1.1 skrll bus_size_t); 112 1.1 skrll void elroy_sm_1(void *, bus_space_handle_t, bus_size_t, uint8_t, 113 1.1 skrll bus_size_t); 114 1.1 skrll void elroy_sm_2(void *, bus_space_handle_t, bus_size_t, uint16_t, 115 1.1 skrll bus_size_t); 116 1.1 skrll void elroy_sm_4(void *, bus_space_handle_t, bus_size_t, uint32_t, 117 1.1 skrll bus_size_t); 118 1.1 skrll void elroy_sm_8(void *, bus_space_handle_t, bus_size_t, uint64_t, 119 1.1 skrll bus_size_t); 120 1.1 skrll 121 1.1 skrll void elroy_rrm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, 122 1.1 skrll bus_size_t); 123 1.1 skrll void elroy_rrm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, 124 1.1 skrll bus_size_t); 125 1.1 skrll void elroy_rrm_8(void *, bus_space_handle_t, bus_size_t, uint64_t *, 126 1.1 skrll bus_size_t); 127 1.1 skrll void elroy_wrm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, 128 1.1 skrll bus_size_t); 129 1.1 skrll void elroy_wrm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, 130 1.1 skrll bus_size_t); 131 1.1 skrll void elroy_wrm_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *, 132 1.1 skrll bus_size_t); 133 1.1 skrll void elroy_rr_1(void *, bus_space_handle_t, bus_size_t, uint8_t *, 134 1.1 skrll bus_size_t); 135 1.1 skrll void elroy_rr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, 136 1.1 skrll bus_size_t); 137 1.1 skrll void elroy_rr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, 138 1.1 skrll bus_size_t); 139 1.1 skrll void elroy_rr_8(void *, bus_space_handle_t, bus_size_t, uint64_t *, 140 1.1 skrll bus_size_t); 141 1.1 skrll void elroy_wr_1(void *, bus_space_handle_t, bus_size_t, const uint8_t *, 142 1.1 skrll bus_size_t); 143 1.1 skrll void elroy_wr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, 144 1.1 skrll bus_size_t); 145 1.1 skrll void elroy_wr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, 146 1.1 skrll bus_size_t); 147 1.1 skrll void elroy_wr_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *, 148 1.1 skrll bus_size_t); 149 1.1 skrll 150 1.1 skrll void elroy_rrr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, 151 1.1 skrll bus_size_t); 152 1.1 skrll void elroy_rrr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, 153 1.1 skrll bus_size_t); 154 1.1 skrll void elroy_rrr_8(void *, bus_space_handle_t, bus_size_t, uint64_t *, 155 1.1 skrll bus_size_t); 156 1.1 skrll void elroy_wrr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, 157 1.1 skrll bus_size_t); 158 1.1 skrll void elroy_wrr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, 159 1.1 skrll bus_size_t); 160 1.1 skrll void elroy_wrr_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *, 161 1.1 skrll bus_size_t); 162 1.1 skrll void elroy_sr_1(void *, bus_space_handle_t, bus_size_t, uint8_t, 163 1.1 skrll bus_size_t); 164 1.1 skrll void elroy_sr_2(void *, bus_space_handle_t, bus_size_t, uint16_t, 165 1.1 skrll bus_size_t); 166 1.1 skrll void elroy_sr_4(void *, bus_space_handle_t, bus_size_t, uint32_t, 167 1.1 skrll bus_size_t); 168 1.1 skrll void elroy_sr_8(void *, bus_space_handle_t, bus_size_t, uint64_t, 169 1.1 skrll bus_size_t); 170 1.1 skrll void elroy_cp_1(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, 171 1.1 skrll bus_size_t, bus_size_t); 172 1.1 skrll void elroy_cp_2(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, 173 1.1 skrll bus_size_t, bus_size_t); 174 1.1 skrll void elroy_cp_4(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, 175 1.1 skrll bus_size_t, bus_size_t); 176 1.1 skrll void elroy_cp_8(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, 177 1.1 skrll bus_size_t, bus_size_t); 178 1.1 skrll 179 1.1 skrll int elroy_dmamap_create(void *, bus_size_t, int, bus_size_t, bus_size_t, 180 1.1 skrll int, bus_dmamap_t *); 181 1.1 skrll void elroy_dmamap_destroy(void *, bus_dmamap_t); 182 1.1 skrll int elroy_dmamap_load(void *, bus_dmamap_t, void *, bus_size_t, 183 1.1 skrll struct proc *, int); 184 1.1 skrll int elroy_dmamap_load_mbuf(void *, bus_dmamap_t, struct mbuf *, int); 185 1.1 skrll int elroy_dmamap_load_uio(void *, bus_dmamap_t, struct uio *, int); 186 1.1 skrll int elroy_dmamap_load_raw(void *, bus_dmamap_t, bus_dma_segment_t *, 187 1.1 skrll int, bus_size_t, int); 188 1.1 skrll void elroy_dmamap_unload(void *, bus_dmamap_t); 189 1.1 skrll void elroy_dmamap_sync(void *, bus_dmamap_t, bus_addr_t, bus_size_t, 190 1.1 skrll int); 191 1.1 skrll int elroy_dmamem_alloc(void *, bus_size_t, bus_size_t, bus_size_t, 192 1.1 skrll bus_dma_segment_t *, int, int *, int); 193 1.1 skrll void elroy_dmamem_free(void *, bus_dma_segment_t *, int); 194 1.1 skrll int elroy_dmamem_map(void *, bus_dma_segment_t *, int, size_t, 195 1.1 skrll void **, int); 196 1.1 skrll void elroy_dmamem_unmap(void *, void *, size_t); 197 1.1 skrll paddr_t elroy_dmamem_mmap(void *, bus_dma_segment_t *, int, off_t, 198 1.1 skrll int, int); 199 1.1 skrll 200 1.1 skrll int 201 1.1 skrll elroy_match(device_t parent, cfdata_t cf, void *aux) 202 1.1 skrll { 203 1.1 skrll struct confargs *ca = aux; 204 1.1 skrll 205 1.1 skrll if ((ca->ca_name && !strcmp(ca->ca_name, "lba")) || 206 1.1 skrll (ca->ca_type.iodc_type == HPPA_TYPE_BRIDGE && 207 1.1 skrll ca->ca_type.iodc_sv_model == HPPA_BRIDGE_DINO && 208 1.1 skrll ca->ca_type.iodc_model == 0x78)) 209 1.9 skrll return 1; 210 1.1 skrll 211 1.9 skrll return 0; 212 1.1 skrll } 213 1.1 skrll 214 1.1 skrll void 215 1.1 skrll elroy_write32(volatile uint32_t *p, uint32_t v) 216 1.1 skrll { 217 1.1 skrll *p = v; 218 1.1 skrll } 219 1.1 skrll 220 1.1 skrll uint32_t 221 1.1 skrll elroy_read32(volatile uint32_t *p) 222 1.1 skrll { 223 1.1 skrll return *p; 224 1.1 skrll } 225 1.1 skrll 226 1.1 skrll void 227 1.1 skrll elroy_attach_hook(device_t parent, device_t self, 228 1.1 skrll struct pcibus_attach_args *pba) 229 1.1 skrll { 230 1.1 skrll 231 1.1 skrll } 232 1.1 skrll 233 1.1 skrll int 234 1.1 skrll elroy_maxdevs(void *v, int bus) 235 1.1 skrll { 236 1.9 skrll return 32; 237 1.1 skrll } 238 1.1 skrll 239 1.1 skrll pcitag_t 240 1.1 skrll elroy_make_tag(void *v, int bus, int dev, int func) 241 1.1 skrll { 242 1.1 skrll if (bus > 255 || dev > 31 || func > 7) 243 1.1 skrll panic("elroy_make_tag: bad request"); 244 1.1 skrll 245 1.9 skrll return (bus << 16) | (dev << 11) | (func << 8); 246 1.1 skrll } 247 1.1 skrll 248 1.1 skrll void 249 1.1 skrll elroy_decompose_tag(void *v, pcitag_t tag, int *bus, int *dev, int *func) 250 1.1 skrll { 251 1.1 skrll *bus = (tag >> 16) & 0xff; 252 1.1 skrll *dev = (tag >> 11) & 0x1f; 253 1.1 skrll *func= (tag >> 8) & 0x07; 254 1.1 skrll } 255 1.1 skrll 256 1.1 skrll pcireg_t 257 1.1 skrll elroy_conf_read(void *v, pcitag_t tag, int reg) 258 1.1 skrll { 259 1.1 skrll struct elroy_softc *sc = v; 260 1.1 skrll volatile struct elroy_regs *r = sc->sc_regs; 261 1.1 skrll uint32_t arb_mask, err_cfg, control; 262 1.1 skrll pcireg_t data; 263 1.1 skrll 264 1.1 skrll /* printf("elroy_conf_read(%p, 0x%08x, 0x%x)", v, tag, reg); */ 265 1.2 msaitoh 266 1.2 msaitoh if ((unsigned int)reg >= PCI_CONF_SIZE) 267 1.9 skrll return (pcireg_t) -1; 268 1.2 msaitoh 269 1.1 skrll arb_mask = elroy_read32(&r->arb_mask); 270 1.1 skrll err_cfg = elroy_read32(&r->err_cfg); 271 1.1 skrll control = elroy_read32(&r->control); 272 1.1 skrll if (!arb_mask) 273 1.1 skrll elroy_write32(&r->arb_mask, htole32(ELROY_ARB_ENABLE)); 274 1.1 skrll elroy_write32(&r->err_cfg, err_cfg | 275 1.1 skrll htole32(ELROY_ERRCFG_SMART | ELROY_ERRCFG_CM)); 276 1.1 skrll elroy_write32(&r->control, (control | htole32(ELROY_CONTROL_CE)) & 277 1.1 skrll ~htole32(ELROY_CONTROL_HF)); 278 1.1 skrll 279 1.1 skrll elroy_write32(&r->pci_conf_addr, htole32(tag | reg)); 280 1.1 skrll (void)elroy_read32(&r->pci_conf_addr); 281 1.1 skrll data = elroy_read32(&r->pci_conf_data); 282 1.1 skrll 283 1.1 skrll elroy_write32(&r->control, control | 284 1.1 skrll htole32(ELROY_CONTROL_CE|ELROY_CONTROL_CL)); 285 1.1 skrll elroy_write32(&r->control, control); 286 1.1 skrll elroy_write32(&r->err_cfg, err_cfg); 287 1.1 skrll if (!arb_mask) 288 1.1 skrll elroy_write32(&r->arb_mask, arb_mask); 289 1.1 skrll 290 1.1 skrll data = le32toh(data); 291 1.1 skrll /* printf("=0x%08x (@ 0x%08x)\n", data, le32toh(data1)); */ 292 1.9 skrll return data; 293 1.1 skrll } 294 1.1 skrll 295 1.1 skrll void 296 1.1 skrll elroy_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data) 297 1.1 skrll { 298 1.1 skrll struct elroy_softc *sc = v; 299 1.1 skrll volatile struct elroy_regs *r = sc->sc_regs; 300 1.1 skrll uint32_t arb_mask, err_cfg, control; 301 1.1 skrll 302 1.1 skrll /* printf("elroy_conf_write(%p, 0x%08x, 0x%x, 0x%x)\n", v, tag, reg, data); */ 303 1.2 msaitoh 304 1.2 msaitoh if ((unsigned int)reg >= PCI_CONF_SIZE) 305 1.2 msaitoh return; 306 1.2 msaitoh 307 1.1 skrll arb_mask = elroy_read32(&r->arb_mask); 308 1.1 skrll err_cfg = elroy_read32(&r->err_cfg); 309 1.1 skrll control = elroy_read32(&r->control); 310 1.1 skrll if (!arb_mask) 311 1.1 skrll elroy_write32(&r->arb_mask, htole32(ELROY_ARB_ENABLE)); 312 1.1 skrll elroy_write32(&r->err_cfg, err_cfg | 313 1.1 skrll htole32(ELROY_ERRCFG_SMART | ELROY_ERRCFG_CM)); 314 1.1 skrll elroy_write32(&r->control, (control | htole32(ELROY_CONTROL_CE)) & 315 1.1 skrll ~htole32(ELROY_CONTROL_HF)); 316 1.1 skrll 317 1.1 skrll /* fix coalescing config writes errata by interleaving w/ a read */ 318 1.1 skrll elroy_write32(&r->pci_conf_addr, htole32(tag | PCI_ID_REG)); 319 1.1 skrll (void)elroy_read32(&r->pci_conf_addr); 320 1.1 skrll (void)elroy_read32(&r->pci_conf_data); 321 1.1 skrll 322 1.1 skrll elroy_write32(&r->pci_conf_addr, htole32(tag | reg)); 323 1.1 skrll (void)elroy_read32(&r->pci_conf_addr); 324 1.1 skrll elroy_write32(&r->pci_conf_data, htole32(data)); 325 1.1 skrll (void)elroy_read32(&r->pci_conf_addr); 326 1.1 skrll 327 1.1 skrll elroy_write32(&r->control, control | 328 1.1 skrll htole32(ELROY_CONTROL_CE|ELROY_CONTROL_CL)); 329 1.1 skrll elroy_write32(&r->control, control); 330 1.1 skrll elroy_write32(&r->err_cfg, err_cfg); 331 1.1 skrll if (!arb_mask) 332 1.1 skrll elroy_write32(&r->arb_mask, arb_mask); 333 1.1 skrll } 334 1.1 skrll 335 1.1 skrll int 336 1.1 skrll elroy_iomap(void *v, bus_addr_t bpa, bus_size_t size, 337 1.1 skrll int flags, bus_space_handle_t *bshp) 338 1.1 skrll { 339 1.1 skrll struct elroy_softc *sc = v; 340 1.1 skrll /* volatile struct elroy_regs *r = sc->sc_regs; */ 341 1.1 skrll int error; 342 1.1 skrll 343 1.1 skrll if ((error = bus_space_map(sc->sc_bt, bpa + sc->sc_iobase, size, 344 1.1 skrll flags, bshp))) 345 1.9 skrll return error; 346 1.1 skrll 347 1.9 skrll return 0; 348 1.1 skrll } 349 1.1 skrll 350 1.1 skrll int 351 1.1 skrll elroy_memmap(void *v, bus_addr_t bpa, bus_size_t size, 352 1.1 skrll int flags, bus_space_handle_t *bshp) 353 1.1 skrll { 354 1.1 skrll struct elroy_softc *sc = v; 355 1.1 skrll /* volatile struct elroy_regs *r = sc->sc_regs; */ 356 1.1 skrll int error; 357 1.1 skrll 358 1.1 skrll if ((error = bus_space_map(sc->sc_bt, bpa, size, flags, bshp))) 359 1.9 skrll return error; 360 1.1 skrll 361 1.9 skrll return 0; 362 1.1 skrll } 363 1.1 skrll 364 1.1 skrll int 365 1.1 skrll elroy_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset, 366 1.1 skrll bus_size_t size, bus_space_handle_t *nbshp) 367 1.1 skrll { 368 1.1 skrll *nbshp = bsh + offset; 369 1.9 skrll return 0; 370 1.1 skrll } 371 1.1 skrll 372 1.1 skrll int 373 1.1 skrll elroy_ioalloc(void *v, bus_addr_t rstart, bus_addr_t rend, bus_size_t size, 374 1.1 skrll bus_size_t align, bus_size_t boundary, int flags, bus_addr_t *addrp, 375 1.1 skrll bus_space_handle_t *bshp) 376 1.1 skrll { 377 1.1 skrll struct elroy_softc *sc = v; 378 1.1 skrll volatile struct elroy_regs *r = sc->sc_regs; 379 1.1 skrll bus_addr_t iostart, ioend; 380 1.1 skrll 381 1.1 skrll iostart = r->io_base & ~htole32(ELROY_BASE_RE); 382 1.1 skrll ioend = iostart + ~htole32(r->io_mask) + 1; 383 1.1 skrll if (rstart < iostart || rend > ioend) 384 1.1 skrll panic("elroy_ioalloc: bad region start/end"); 385 1.1 skrll 386 1.1 skrll rstart += sc->sc_iobase; 387 1.1 skrll rend += sc->sc_iobase; 388 1.1 skrll if (bus_space_alloc(sc->sc_bt, rstart, rend, size, 389 1.1 skrll align, boundary, flags, addrp, bshp)) 390 1.9 skrll return ENOMEM; 391 1.1 skrll 392 1.9 skrll return 0; 393 1.1 skrll } 394 1.1 skrll 395 1.1 skrll int 396 1.1 skrll elroy_memalloc(void *v, bus_addr_t rstart, bus_addr_t rend, bus_size_t size, 397 1.1 skrll bus_size_t align, bus_size_t boundary, int flags, bus_addr_t *addrp, 398 1.1 skrll bus_space_handle_t *bshp) 399 1.1 skrll { 400 1.1 skrll struct elroy_softc *sc = v; 401 1.1 skrll /* volatile struct elroy_regs *r = sc->sc_regs; */ 402 1.1 skrll 403 1.1 skrll if (bus_space_alloc(sc->sc_bt, rstart, rend, size, 404 1.1 skrll align, boundary, flags, addrp, bshp)) 405 1.9 skrll return ENOMEM; 406 1.1 skrll 407 1.9 skrll return 0; 408 1.1 skrll } 409 1.1 skrll 410 1.1 skrll void 411 1.1 skrll elroy_unmap(void *v, bus_space_handle_t bsh, bus_size_t size) 412 1.1 skrll { 413 1.1 skrll struct elroy_softc *sc = v; 414 1.1 skrll 415 1.1 skrll bus_space_free(sc->sc_bt, bsh, size); 416 1.1 skrll } 417 1.1 skrll 418 1.1 skrll void 419 1.1 skrll elroy_free(void *v, bus_space_handle_t bh, bus_size_t size) 420 1.1 skrll { 421 1.1 skrll /* should be enough */ 422 1.1 skrll elroy_unmap(v, bh, size); 423 1.1 skrll } 424 1.1 skrll 425 1.1 skrll void 426 1.1 skrll elroy_barrier(void *v, bus_space_handle_t h, bus_size_t o, bus_size_t l, int op) 427 1.1 skrll { 428 1.1 skrll struct elroy_softc *sc = v; 429 1.1 skrll volatile struct elroy_regs *r = sc->sc_regs; 430 1.1 skrll 431 1.1 skrll sync_caches(); 432 1.1 skrll if (op & BUS_SPACE_BARRIER_WRITE) { 433 1.1 skrll (void)r->pci_id; /* flush write fifo */ 434 1.1 skrll sync_caches(); 435 1.1 skrll } 436 1.1 skrll } 437 1.1 skrll 438 1.1 skrll #if NCARDBUS > 0 439 1.1 skrll void * 440 1.1 skrll elroy_alloc_parent(device_t self, struct pci_attach_args *pa, int io) 441 1.1 skrll { 442 1.1 skrll #if 0 /* TODO */ 443 1.1 skrll 444 1.1 skrll struct elroy_softc *sc = pa->pa_pc->_cookie; 445 1.1 skrll struct extent *ex; 446 1.1 skrll bus_space_tag_t tag; 447 1.1 skrll bus_addr_t start; 448 1.1 skrll bus_size_t size; 449 1.1 skrll 450 1.1 skrll if (io) { 451 1.1 skrll ex = sc->sc_ioex; 452 1.1 skrll tag = pa->pa_iot; 453 1.1 skrll start = 0xa000; 454 1.1 skrll size = 0x1000; 455 1.1 skrll } else { 456 1.1 skrll if (!sc->sc_memex) { 457 1.1 skrll bus_space_handle_t memh; 458 1.1 skrll bus_addr_t mem_start; 459 1.1 skrll 460 1.1 skrll if (elroy_memalloc(sc, 0xf0800000, 0xff7fffff, 461 1.1 skrll ELROY_MEM_WINDOW, ELROY_MEM_WINDOW, EX_NOBOUNDARY, 462 1.1 skrll 0, &mem_start, &memh)) 463 1.9 skrll return NULL; 464 1.1 skrll 465 1.1 skrll snprintf(sc->sc_memexname, sizeof(sc->sc_memexname), 466 1.1 skrll "%s_mem", device_xname(sc->sc_dv)); 467 1.1 skrll if ((sc->sc_memex = extent_create(sc->sc_memexname, 468 1.1 skrll mem_start, mem_start + ELROY_MEM_WINDOW, 469 1.1 skrll NULL, 0, EX_NOWAIT | EX_MALLOCOK)) == NULL) { 470 1.1 skrll extent_destroy(sc->sc_ioex); 471 1.1 skrll bus_space_free(sc->sc_bt, memh, 472 1.1 skrll ELROY_MEM_WINDOW); 473 1.9 skrll return NULL; 474 1.1 skrll } 475 1.1 skrll } 476 1.1 skrll ex = sc->sc_memex; 477 1.1 skrll tag = pa->pa_memt; 478 1.1 skrll start = ex->ex_start; 479 1.1 skrll size = ELROY_MEM_CHUNK; 480 1.1 skrll } 481 1.1 skrll 482 1.1 skrll if (extent_alloc_subregion(ex, start, ex->ex_end, size, size, 0, 483 1.1 skrll EX_NOBOUNDARY, EX_NOWAIT, &start)) 484 1.9 skrll return NULL; 485 1.1 skrll 486 1.1 skrll extent_free(ex, start, size, EX_NOWAIT); 487 1.1 skrll return rbus_new_root_share(tag, ex, start, size, 0); 488 1.1 skrll #else 489 1.9 skrll return NULL; 490 1.1 skrll #endif 491 1.1 skrll } 492 1.1 skrll #endif 493 1.1 skrll 494 1.1 skrll void * 495 1.1 skrll elroy_vaddr(void *v, bus_space_handle_t h) 496 1.1 skrll { 497 1.9 skrll return (void *)h; 498 1.1 skrll } 499 1.1 skrll 500 1.1 skrll paddr_t 501 1.1 skrll elroy_mmap(void *v, bus_addr_t addr, off_t off, int prot, int flags) 502 1.1 skrll { 503 1.8 skrll return btop(addr + off); 504 1.1 skrll } 505 1.1 skrll 506 1.1 skrll uint8_t 507 1.1 skrll elroy_r1(void *v, bus_space_handle_t h, bus_size_t o) 508 1.1 skrll { 509 1.1 skrll h += o; 510 1.1 skrll return *(volatile uint8_t *)h; 511 1.1 skrll } 512 1.1 skrll 513 1.1 skrll uint16_t 514 1.1 skrll elroy_r2(void *v, bus_space_handle_t h, bus_size_t o) 515 1.1 skrll { 516 1.1 skrll volatile uint16_t *p; 517 1.1 skrll 518 1.1 skrll h += o; 519 1.1 skrll p = (volatile uint16_t *)h; 520 1.9 skrll return le16toh(*p); 521 1.1 skrll } 522 1.1 skrll 523 1.1 skrll uint32_t 524 1.1 skrll elroy_r4(void *v, bus_space_handle_t h, bus_size_t o) 525 1.1 skrll { 526 1.1 skrll uint32_t data; 527 1.1 skrll 528 1.1 skrll h += o; 529 1.1 skrll data = *(volatile uint32_t *)h; 530 1.9 skrll return le32toh(data); 531 1.1 skrll } 532 1.1 skrll 533 1.1 skrll uint64_t 534 1.1 skrll elroy_r8(void *v, bus_space_handle_t h, bus_size_t o) 535 1.1 skrll { 536 1.1 skrll uint64_t data; 537 1.1 skrll 538 1.1 skrll h += o; 539 1.1 skrll data = *(volatile uint64_t *)h; 540 1.9 skrll return le64toh(data); 541 1.1 skrll } 542 1.1 skrll 543 1.7 macallan uint16_t 544 1.7 macallan elroy_rs2(void *v, bus_space_handle_t h, bus_size_t o) 545 1.7 macallan { 546 1.7 macallan volatile uint16_t *p; 547 1.7 macallan 548 1.7 macallan h += o; 549 1.7 macallan p = (volatile uint16_t *)h; 550 1.9 skrll return *p; 551 1.7 macallan } 552 1.7 macallan 553 1.7 macallan uint32_t 554 1.7 macallan elroy_rs4(void *v, bus_space_handle_t h, bus_size_t o) 555 1.7 macallan { 556 1.7 macallan uint32_t data; 557 1.7 macallan 558 1.7 macallan h += o; 559 1.7 macallan data = *(volatile uint32_t *)h; 560 1.7 macallan return data; 561 1.7 macallan } 562 1.7 macallan 563 1.7 macallan uint64_t 564 1.7 macallan elroy_rs8(void *v, bus_space_handle_t h, bus_size_t o) 565 1.7 macallan { 566 1.7 macallan uint64_t data; 567 1.7 macallan 568 1.7 macallan h += o; 569 1.7 macallan data = *(volatile uint64_t *)h; 570 1.7 macallan return data; 571 1.7 macallan } 572 1.7 macallan 573 1.1 skrll void 574 1.1 skrll elroy_w1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t vv) 575 1.1 skrll { 576 1.1 skrll h += o; 577 1.1 skrll *(volatile uint8_t *)h = vv; 578 1.1 skrll } 579 1.1 skrll 580 1.1 skrll void 581 1.1 skrll elroy_w2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv) 582 1.1 skrll { 583 1.1 skrll volatile uint16_t *p; 584 1.1 skrll 585 1.1 skrll h += o; 586 1.1 skrll p = (volatile uint16_t *)h; 587 1.1 skrll *p = htole16(vv); 588 1.1 skrll } 589 1.1 skrll 590 1.1 skrll void 591 1.1 skrll elroy_w4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv) 592 1.1 skrll { 593 1.1 skrll h += o; 594 1.1 skrll vv = htole32(vv); 595 1.1 skrll *(volatile uint32_t *)h = vv; 596 1.1 skrll } 597 1.1 skrll 598 1.1 skrll void 599 1.1 skrll elroy_w8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t vv) 600 1.1 skrll { 601 1.1 skrll h += o; 602 1.1 skrll *(volatile uint64_t *)h = htole64(vv); 603 1.1 skrll } 604 1.1 skrll 605 1.7 macallan void 606 1.7 macallan elroy_ws2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv) 607 1.7 macallan { 608 1.7 macallan volatile uint16_t *p; 609 1.7 macallan 610 1.7 macallan h += o; 611 1.7 macallan p = (volatile uint16_t *)h; 612 1.7 macallan *p = vv; 613 1.7 macallan } 614 1.7 macallan 615 1.7 macallan void 616 1.7 macallan elroy_ws4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv) 617 1.7 macallan { 618 1.7 macallan h += o; 619 1.7 macallan *(volatile uint32_t *)h = vv; 620 1.7 macallan } 621 1.7 macallan 622 1.7 macallan void 623 1.7 macallan elroy_ws8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t vv) 624 1.7 macallan { 625 1.7 macallan h += o; 626 1.7 macallan *(volatile uint64_t *)h = vv; 627 1.7 macallan } 628 1.1 skrll 629 1.1 skrll void 630 1.1 skrll elroy_rm_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t *a, bus_size_t c) 631 1.1 skrll { 632 1.1 skrll volatile uint8_t *p; 633 1.1 skrll 634 1.1 skrll h += o; 635 1.1 skrll p = (volatile uint8_t *)h; 636 1.1 skrll while (c--) 637 1.1 skrll *a++ = *p; 638 1.1 skrll } 639 1.1 skrll 640 1.1 skrll void 641 1.1 skrll elroy_rm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c) 642 1.1 skrll { 643 1.1 skrll volatile uint16_t *p; 644 1.1 skrll 645 1.1 skrll h += o; 646 1.1 skrll p = (volatile uint16_t *)h; 647 1.1 skrll while (c--) 648 1.1 skrll *a++ = le16toh(*p); 649 1.1 skrll } 650 1.1 skrll 651 1.1 skrll void 652 1.1 skrll elroy_rm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c) 653 1.1 skrll { 654 1.1 skrll volatile uint32_t *p; 655 1.1 skrll 656 1.1 skrll h += o; 657 1.1 skrll p = (volatile uint32_t *)h; 658 1.1 skrll while (c--) 659 1.1 skrll *a++ = le32toh(*p); 660 1.1 skrll } 661 1.1 skrll 662 1.1 skrll void 663 1.1 skrll elroy_rm_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t *a, bus_size_t c) 664 1.1 skrll { 665 1.1 skrll volatile uint64_t *p; 666 1.1 skrll 667 1.1 skrll h += o; 668 1.1 skrll p = (volatile uint64_t *)h; 669 1.1 skrll while (c--) 670 1.1 skrll *a++ = le64toh(*p); 671 1.1 skrll } 672 1.1 skrll 673 1.1 skrll void 674 1.1 skrll elroy_wm_1(void *v, bus_space_handle_t h, bus_size_t o, const uint8_t *a, bus_size_t c) 675 1.1 skrll { 676 1.1 skrll volatile uint8_t *p; 677 1.1 skrll 678 1.1 skrll h += o; 679 1.1 skrll p = (volatile uint8_t *)h; 680 1.1 skrll while (c--) 681 1.1 skrll *p = *a++; 682 1.1 skrll } 683 1.1 skrll 684 1.1 skrll void 685 1.1 skrll elroy_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c) 686 1.1 skrll { 687 1.1 skrll volatile uint16_t *p; 688 1.1 skrll 689 1.1 skrll h += o; 690 1.1 skrll p = (volatile uint16_t *)h; 691 1.1 skrll while (c--) 692 1.1 skrll *p = htole16(*a++); 693 1.1 skrll } 694 1.1 skrll 695 1.1 skrll void 696 1.1 skrll elroy_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c) 697 1.1 skrll { 698 1.1 skrll volatile uint32_t *p; 699 1.1 skrll 700 1.1 skrll h += o; 701 1.1 skrll p = (volatile uint32_t *)h; 702 1.1 skrll while (c--) 703 1.1 skrll *p = htole32(*a++); 704 1.1 skrll } 705 1.1 skrll 706 1.1 skrll void 707 1.1 skrll elroy_wm_8(void *v, bus_space_handle_t h, bus_size_t o, const uint64_t *a, bus_size_t c) 708 1.1 skrll { 709 1.1 skrll volatile uint64_t *p; 710 1.1 skrll 711 1.1 skrll h += o; 712 1.1 skrll p = (volatile uint64_t *)h; 713 1.1 skrll while (c--) 714 1.1 skrll *p = htole64(*a++); 715 1.1 skrll } 716 1.1 skrll 717 1.1 skrll void 718 1.1 skrll elroy_sm_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t vv, bus_size_t c) 719 1.1 skrll { 720 1.1 skrll volatile uint8_t *p; 721 1.1 skrll 722 1.1 skrll h += o; 723 1.1 skrll p = (volatile uint8_t *)h; 724 1.1 skrll while (c--) 725 1.1 skrll *p = vv; 726 1.1 skrll } 727 1.1 skrll 728 1.1 skrll void 729 1.1 skrll elroy_sm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c) 730 1.1 skrll { 731 1.1 skrll volatile uint16_t *p; 732 1.1 skrll 733 1.1 skrll h += o; 734 1.1 skrll p = (volatile uint16_t *)h; 735 1.1 skrll vv = htole16(vv); 736 1.1 skrll while (c--) 737 1.1 skrll *p = vv; 738 1.1 skrll } 739 1.1 skrll 740 1.1 skrll void 741 1.1 skrll elroy_sm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c) 742 1.1 skrll { 743 1.1 skrll volatile uint32_t *p; 744 1.1 skrll 745 1.1 skrll h += o; 746 1.1 skrll p = (volatile uint32_t *)h; 747 1.1 skrll vv = htole32(vv); 748 1.1 skrll while (c--) 749 1.1 skrll *p = vv; 750 1.1 skrll } 751 1.1 skrll 752 1.1 skrll void 753 1.1 skrll elroy_sm_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t vv, bus_size_t c) 754 1.1 skrll { 755 1.1 skrll volatile uint64_t *p; 756 1.1 skrll 757 1.1 skrll h += o; 758 1.1 skrll p = (volatile uint64_t *)h; 759 1.1 skrll vv = htole64(vv); 760 1.1 skrll while (c--) 761 1.1 skrll *p = vv; 762 1.1 skrll } 763 1.1 skrll 764 1.1 skrll void 765 1.1 skrll elroy_rrm_2(void *v, bus_space_handle_t h, bus_size_t o, 766 1.1 skrll uint16_t *a, bus_size_t c) 767 1.1 skrll { 768 1.1 skrll volatile uint16_t *p, *q = a; 769 1.1 skrll 770 1.1 skrll h += o; 771 1.1 skrll p = (volatile uint16_t *)h; 772 1.1 skrll while (c--) 773 1.1 skrll *q++ = *p; 774 1.1 skrll } 775 1.1 skrll 776 1.1 skrll void 777 1.1 skrll elroy_rrm_4(void *v, bus_space_handle_t h, bus_size_t o, 778 1.1 skrll uint32_t *a, bus_size_t c) 779 1.1 skrll { 780 1.1 skrll volatile uint32_t *p, *q = a; 781 1.1 skrll 782 1.1 skrll h += o; 783 1.1 skrll p = (volatile uint32_t *)h; 784 1.1 skrll while (c--) 785 1.1 skrll *q++ = *p; 786 1.1 skrll } 787 1.1 skrll 788 1.1 skrll void 789 1.1 skrll elroy_rrm_8(void *v, bus_space_handle_t h, bus_size_t o, 790 1.1 skrll uint64_t *a, bus_size_t c) 791 1.1 skrll { 792 1.1 skrll volatile uint64_t *p, *q = a; 793 1.1 skrll 794 1.1 skrll h += o; 795 1.1 skrll p = (volatile uint64_t *)h; 796 1.1 skrll while (c--) 797 1.1 skrll *q++ = *p; 798 1.1 skrll } 799 1.1 skrll 800 1.1 skrll void 801 1.1 skrll elroy_wrm_2(void *v, bus_space_handle_t h, bus_size_t o, 802 1.1 skrll const uint16_t *a, bus_size_t c) 803 1.1 skrll { 804 1.1 skrll volatile uint16_t *p; 805 1.1 skrll const uint16_t *q = a; 806 1.1 skrll 807 1.1 skrll h += o; 808 1.1 skrll p = (volatile uint16_t *)h; 809 1.1 skrll while (c--) 810 1.1 skrll *p = *q++; 811 1.1 skrll } 812 1.1 skrll 813 1.1 skrll void 814 1.1 skrll elroy_wrm_4(void *v, bus_space_handle_t h, bus_size_t o, 815 1.1 skrll const uint32_t *a, bus_size_t c) 816 1.1 skrll { 817 1.1 skrll volatile uint32_t *p; 818 1.1 skrll const uint32_t *q = a; 819 1.1 skrll 820 1.1 skrll h += o; 821 1.1 skrll p = (volatile uint32_t *)h; 822 1.1 skrll while (c--) 823 1.1 skrll *p = *q++; 824 1.1 skrll } 825 1.1 skrll 826 1.1 skrll void 827 1.1 skrll elroy_wrm_8(void *v, bus_space_handle_t h, bus_size_t o, 828 1.1 skrll const uint64_t *a, bus_size_t c) 829 1.1 skrll { 830 1.1 skrll volatile uint64_t *p; 831 1.1 skrll const uint64_t *q = a; 832 1.1 skrll 833 1.1 skrll h += o; 834 1.1 skrll p = (volatile uint64_t *)h; 835 1.1 skrll while (c--) 836 1.1 skrll *p = *q++; 837 1.1 skrll } 838 1.1 skrll 839 1.1 skrll void 840 1.1 skrll elroy_rr_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t *a, bus_size_t c) 841 1.1 skrll { 842 1.1 skrll volatile uint8_t *p; 843 1.1 skrll 844 1.1 skrll h += o; 845 1.1 skrll p = (volatile uint8_t *)h; 846 1.1 skrll while (c--) 847 1.1 skrll *a++ = *p++; 848 1.1 skrll } 849 1.1 skrll 850 1.1 skrll void 851 1.1 skrll elroy_rr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c) 852 1.1 skrll { 853 1.1 skrll volatile uint16_t *p, data; 854 1.1 skrll 855 1.1 skrll h += o; 856 1.1 skrll p = (volatile uint16_t *)h; 857 1.1 skrll while (c--) { 858 1.1 skrll data = *p++; 859 1.1 skrll *a++ = le16toh(data); 860 1.1 skrll } 861 1.1 skrll } 862 1.1 skrll 863 1.1 skrll void 864 1.1 skrll elroy_rr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c) 865 1.1 skrll { 866 1.1 skrll volatile uint32_t *p, data; 867 1.1 skrll 868 1.1 skrll h += o; 869 1.1 skrll p = (volatile uint32_t *)h; 870 1.1 skrll while (c--) { 871 1.1 skrll data = *p++; 872 1.1 skrll *a++ = le32toh(data); 873 1.1 skrll } 874 1.1 skrll } 875 1.1 skrll 876 1.1 skrll void 877 1.1 skrll elroy_rr_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t *a, bus_size_t c) 878 1.1 skrll { 879 1.1 skrll volatile uint64_t *p, data; 880 1.1 skrll 881 1.1 skrll h += o; 882 1.1 skrll p = (volatile uint64_t *)h; 883 1.1 skrll while (c--) { 884 1.1 skrll data = *p++; 885 1.1 skrll *a++ = le64toh(data); 886 1.1 skrll } 887 1.1 skrll } 888 1.1 skrll 889 1.1 skrll void 890 1.1 skrll elroy_wr_1(void *v, bus_space_handle_t h, bus_size_t o, const uint8_t *a, bus_size_t c) 891 1.1 skrll { 892 1.1 skrll volatile uint8_t *p; 893 1.1 skrll 894 1.1 skrll h += o; 895 1.1 skrll p = (volatile uint8_t *)h; 896 1.1 skrll while (c--) 897 1.1 skrll *p++ = *a++; 898 1.1 skrll } 899 1.1 skrll 900 1.1 skrll void 901 1.1 skrll elroy_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c) 902 1.1 skrll { 903 1.1 skrll volatile uint16_t *p, data; 904 1.1 skrll 905 1.1 skrll h += o; 906 1.1 skrll p = (volatile uint16_t *)h; 907 1.1 skrll while (c--) { 908 1.1 skrll data = *a++; 909 1.1 skrll *p++ = htole16(data); 910 1.1 skrll } 911 1.1 skrll } 912 1.1 skrll 913 1.1 skrll void 914 1.1 skrll elroy_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c) 915 1.1 skrll { 916 1.1 skrll volatile uint32_t *p, data; 917 1.1 skrll 918 1.1 skrll h += o; 919 1.1 skrll p = (volatile uint32_t *)h; 920 1.1 skrll while (c--) { 921 1.1 skrll data = *a++; 922 1.1 skrll *p++ = htole32(data); 923 1.1 skrll } 924 1.1 skrll } 925 1.1 skrll 926 1.1 skrll void 927 1.1 skrll elroy_wr_8(void *v, bus_space_handle_t h, bus_size_t o, const uint64_t *a, bus_size_t c) 928 1.1 skrll { 929 1.1 skrll volatile uint64_t *p, data; 930 1.1 skrll 931 1.1 skrll h += o; 932 1.1 skrll p = (volatile uint64_t *)h; 933 1.1 skrll while (c--) { 934 1.1 skrll data = *a++; 935 1.1 skrll *p++ = htole64(data); 936 1.1 skrll } 937 1.1 skrll } 938 1.1 skrll 939 1.1 skrll void 940 1.1 skrll elroy_rrr_2(void *v, bus_space_handle_t h, bus_size_t o, 941 1.1 skrll uint16_t *a, bus_size_t c) 942 1.1 skrll { 943 1.1 skrll volatile uint16_t *p, *q = a; 944 1.1 skrll 945 1.1 skrll h += o; 946 1.1 skrll p = (volatile uint16_t *)h; 947 1.1 skrll while (c--) 948 1.1 skrll *q++ = *p++; 949 1.1 skrll } 950 1.1 skrll 951 1.1 skrll void 952 1.1 skrll elroy_rrr_4(void *v, bus_space_handle_t h, bus_size_t o, 953 1.1 skrll uint32_t *a, bus_size_t c) 954 1.1 skrll { 955 1.1 skrll volatile uint32_t *p, *q = a; 956 1.1 skrll 957 1.1 skrll h += o; 958 1.1 skrll p = (volatile uint32_t *)h; 959 1.1 skrll while (c--) 960 1.1 skrll *q++ = *p++; 961 1.1 skrll } 962 1.1 skrll 963 1.1 skrll void 964 1.1 skrll elroy_rrr_8(void *v, bus_space_handle_t h, bus_size_t o, 965 1.1 skrll uint64_t *a, bus_size_t c) 966 1.1 skrll { 967 1.1 skrll volatile uint64_t *p, *q = a; 968 1.1 skrll 969 1.1 skrll h += o; 970 1.1 skrll p = (volatile uint64_t *)h; 971 1.1 skrll while (c--) 972 1.1 skrll *q++ = *p++; 973 1.1 skrll } 974 1.1 skrll 975 1.1 skrll void 976 1.1 skrll elroy_wrr_2(void *v, bus_space_handle_t h, bus_size_t o, 977 1.1 skrll const uint16_t *a, bus_size_t c) 978 1.1 skrll { 979 1.1 skrll volatile uint16_t *p; 980 1.1 skrll const uint16_t *q = a; 981 1.1 skrll 982 1.1 skrll h += o; 983 1.1 skrll p = (volatile uint16_t *)h; 984 1.1 skrll while (c--) 985 1.1 skrll *p++ = *q++; 986 1.1 skrll } 987 1.1 skrll 988 1.1 skrll void 989 1.1 skrll elroy_wrr_4(void *v, bus_space_handle_t h, bus_size_t o, 990 1.1 skrll const uint32_t *a, bus_size_t c) 991 1.1 skrll { 992 1.1 skrll volatile uint32_t *p; 993 1.1 skrll const uint32_t *q = a; 994 1.1 skrll 995 1.1 skrll h += o; 996 1.1 skrll p = (volatile uint32_t *)h; 997 1.1 skrll while (c--) 998 1.1 skrll *p++ = *q++; 999 1.1 skrll } 1000 1.1 skrll 1001 1.1 skrll void 1002 1.1 skrll elroy_wrr_8(void *v, bus_space_handle_t h, bus_size_t o, 1003 1.1 skrll const uint64_t *a, bus_size_t c) 1004 1.1 skrll { 1005 1.1 skrll volatile uint64_t *p; 1006 1.1 skrll const uint64_t *q = a; 1007 1.1 skrll 1008 1.1 skrll h += o; 1009 1.1 skrll p = (volatile uint64_t *)h; 1010 1.1 skrll while (c--) 1011 1.1 skrll *p++ = *q++; 1012 1.1 skrll } 1013 1.1 skrll 1014 1.1 skrll void 1015 1.1 skrll elroy_sr_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t vv, bus_size_t c) 1016 1.1 skrll { 1017 1.1 skrll volatile uint8_t *p; 1018 1.1 skrll 1019 1.1 skrll h += o; 1020 1.1 skrll p = (volatile uint8_t *)h; 1021 1.1 skrll while (c--) 1022 1.1 skrll *p++ = vv; 1023 1.1 skrll } 1024 1.1 skrll 1025 1.1 skrll void 1026 1.1 skrll elroy_sr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c) 1027 1.1 skrll { 1028 1.1 skrll volatile uint16_t *p; 1029 1.1 skrll 1030 1.1 skrll h += o; 1031 1.1 skrll vv = htole16(vv); 1032 1.1 skrll p = (volatile uint16_t *)h; 1033 1.1 skrll while (c--) 1034 1.1 skrll *p++ = vv; 1035 1.1 skrll } 1036 1.1 skrll 1037 1.1 skrll void 1038 1.1 skrll elroy_sr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c) 1039 1.1 skrll { 1040 1.1 skrll volatile uint32_t *p; 1041 1.1 skrll 1042 1.1 skrll h += o; 1043 1.1 skrll vv = htole32(vv); 1044 1.1 skrll p = (volatile uint32_t *)h; 1045 1.1 skrll while (c--) 1046 1.1 skrll *p++ = vv; 1047 1.1 skrll } 1048 1.1 skrll 1049 1.1 skrll void 1050 1.1 skrll elroy_sr_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t vv, bus_size_t c) 1051 1.1 skrll { 1052 1.1 skrll volatile uint64_t *p; 1053 1.1 skrll 1054 1.1 skrll h += o; 1055 1.1 skrll vv = htole64(vv); 1056 1.1 skrll p = (volatile uint64_t *)h; 1057 1.1 skrll while (c--) 1058 1.1 skrll *p++ = vv; 1059 1.1 skrll } 1060 1.1 skrll 1061 1.1 skrll void 1062 1.1 skrll elroy_cp_1(void *v, bus_space_handle_t h1, bus_size_t o1, 1063 1.1 skrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 1064 1.1 skrll { 1065 1.1 skrll while (c--) 1066 1.1 skrll elroy_w1(v, h1, o1++, elroy_r1(v, h2, o2++)); 1067 1.1 skrll } 1068 1.1 skrll 1069 1.1 skrll void 1070 1.1 skrll elroy_cp_2(void *v, bus_space_handle_t h1, bus_size_t o1, 1071 1.1 skrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 1072 1.1 skrll { 1073 1.1 skrll while (c--) { 1074 1.1 skrll elroy_w2(v, h1, o1, elroy_r2(v, h2, o2)); 1075 1.1 skrll o1 += 2; 1076 1.1 skrll o2 += 2; 1077 1.1 skrll } 1078 1.1 skrll } 1079 1.1 skrll 1080 1.1 skrll void 1081 1.1 skrll elroy_cp_4(void *v, bus_space_handle_t h1, bus_size_t o1, 1082 1.1 skrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 1083 1.1 skrll { 1084 1.1 skrll while (c--) { 1085 1.1 skrll elroy_w4(v, h1, o1, elroy_r4(v, h2, o2)); 1086 1.1 skrll o1 += 4; 1087 1.1 skrll o2 += 4; 1088 1.1 skrll } 1089 1.1 skrll } 1090 1.1 skrll 1091 1.1 skrll void 1092 1.1 skrll elroy_cp_8(void *v, bus_space_handle_t h1, bus_size_t o1, 1093 1.1 skrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 1094 1.1 skrll { 1095 1.1 skrll while (c--) { 1096 1.1 skrll elroy_w8(v, h1, o1, elroy_r8(v, h2, o2)); 1097 1.1 skrll o1 += 8; 1098 1.1 skrll o2 += 8; 1099 1.1 skrll } 1100 1.1 skrll } 1101 1.1 skrll 1102 1.1 skrll const struct hppa_bus_space_tag elroy_iomemt = { 1103 1.1 skrll NULL, 1104 1.1 skrll 1105 1.1 skrll NULL, elroy_unmap, elroy_subregion, NULL, elroy_free, 1106 1.1 skrll elroy_barrier, elroy_vaddr, elroy_mmap, 1107 1.1 skrll elroy_r1, elroy_r2, elroy_r4, elroy_r8, 1108 1.7 macallan elroy_rs2, elroy_rs4, elroy_rs8, 1109 1.1 skrll elroy_w1, elroy_w2, elroy_w4, elroy_w8, 1110 1.7 macallan elroy_ws2, elroy_ws4, elroy_ws8, 1111 1.1 skrll elroy_rm_1, elroy_rm_2, elroy_rm_4, elroy_rm_8, 1112 1.1 skrll elroy_wm_1, elroy_wm_2, elroy_wm_4, elroy_wm_8, 1113 1.1 skrll elroy_sm_1, elroy_sm_2, elroy_sm_4, elroy_sm_8, 1114 1.1 skrll elroy_rrm_2, elroy_rrm_4, elroy_rrm_8, 1115 1.1 skrll elroy_wrm_2, elroy_wrm_4, elroy_wrm_8, 1116 1.1 skrll elroy_rr_1, elroy_rr_2, elroy_rr_4, elroy_rr_8, 1117 1.1 skrll elroy_wr_1, elroy_wr_2, elroy_wr_4, elroy_wr_8, 1118 1.1 skrll elroy_rrr_2, elroy_rrr_4, elroy_rrr_8, 1119 1.1 skrll elroy_wrr_2, elroy_wrr_4, elroy_wrr_8, 1120 1.1 skrll elroy_sr_1, elroy_sr_2, elroy_sr_4, elroy_sr_8, 1121 1.1 skrll elroy_cp_1, elroy_cp_2, elroy_cp_4, elroy_cp_8 1122 1.1 skrll }; 1123 1.1 skrll 1124 1.1 skrll int 1125 1.1 skrll elroy_dmamap_create(void *v, bus_size_t size, int nsegments, 1126 1.1 skrll bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp) 1127 1.1 skrll { 1128 1.1 skrll struct elroy_softc *sc = v; 1129 1.1 skrll 1130 1.1 skrll /* TODO check the addresses, boundary, enable dma */ 1131 1.1 skrll 1132 1.9 skrll return bus_dmamap_create(sc->sc_dmat, size, nsegments, 1133 1.9 skrll maxsegsz, boundary, flags, dmamp); 1134 1.1 skrll } 1135 1.1 skrll 1136 1.1 skrll void 1137 1.1 skrll elroy_dmamap_destroy(void *v, bus_dmamap_t map) 1138 1.1 skrll { 1139 1.1 skrll struct elroy_softc *sc = v; 1140 1.1 skrll 1141 1.1 skrll bus_dmamap_destroy(sc->sc_dmat, map); 1142 1.1 skrll } 1143 1.1 skrll 1144 1.1 skrll int 1145 1.1 skrll elroy_dmamap_load(void *v, bus_dmamap_t map, void *addr, bus_size_t size, 1146 1.1 skrll struct proc *p, int flags) 1147 1.1 skrll { 1148 1.1 skrll struct elroy_softc *sc = v; 1149 1.1 skrll 1150 1.9 skrll return bus_dmamap_load(sc->sc_dmat, map, addr, size, p, flags); 1151 1.1 skrll } 1152 1.1 skrll 1153 1.1 skrll int 1154 1.1 skrll elroy_dmamap_load_mbuf(void *v, bus_dmamap_t map, struct mbuf *m, int flags) 1155 1.1 skrll { 1156 1.1 skrll struct elroy_softc *sc = v; 1157 1.1 skrll 1158 1.9 skrll return bus_dmamap_load_mbuf(sc->sc_dmat, map, m, flags); 1159 1.1 skrll } 1160 1.1 skrll 1161 1.1 skrll int 1162 1.1 skrll elroy_dmamap_load_uio(void *v, bus_dmamap_t map, struct uio *uio, int flags) 1163 1.1 skrll { 1164 1.1 skrll struct elroy_softc *sc = v; 1165 1.1 skrll 1166 1.9 skrll return bus_dmamap_load_uio(sc->sc_dmat, map, uio, flags); 1167 1.1 skrll } 1168 1.1 skrll 1169 1.1 skrll int 1170 1.1 skrll elroy_dmamap_load_raw(void *v, bus_dmamap_t map, bus_dma_segment_t *segs, 1171 1.1 skrll int nsegs, bus_size_t size, int flags) 1172 1.1 skrll { 1173 1.1 skrll struct elroy_softc *sc = v; 1174 1.1 skrll 1175 1.9 skrll return bus_dmamap_load_raw(sc->sc_dmat, map, segs, nsegs, size, flags); 1176 1.1 skrll } 1177 1.1 skrll 1178 1.1 skrll void 1179 1.1 skrll elroy_dmamap_unload(void *v, bus_dmamap_t map) 1180 1.1 skrll { 1181 1.1 skrll struct elroy_softc *sc = v; 1182 1.1 skrll 1183 1.1 skrll bus_dmamap_unload(sc->sc_dmat, map); 1184 1.1 skrll } 1185 1.1 skrll 1186 1.1 skrll void 1187 1.1 skrll elroy_dmamap_sync(void *v, bus_dmamap_t map, bus_addr_t off, 1188 1.1 skrll bus_size_t len, int ops) 1189 1.1 skrll { 1190 1.1 skrll struct elroy_softc *sc = v; 1191 1.1 skrll 1192 1.1 skrll bus_dmamap_sync(sc->sc_dmat, map, off, len, ops); 1193 1.1 skrll } 1194 1.1 skrll 1195 1.1 skrll int 1196 1.1 skrll elroy_dmamem_alloc(void *v, bus_size_t size, bus_size_t alignment, 1197 1.1 skrll bus_size_t boundary, bus_dma_segment_t *segs, 1198 1.1 skrll int nsegs, int *rsegs, int flags) 1199 1.1 skrll { 1200 1.1 skrll struct elroy_softc *sc = v; 1201 1.1 skrll 1202 1.9 skrll return bus_dmamem_alloc(sc->sc_dmat, size, alignment, boundary, 1203 1.9 skrll segs, nsegs, rsegs, flags); 1204 1.1 skrll } 1205 1.1 skrll 1206 1.1 skrll void 1207 1.1 skrll elroy_dmamem_free(void *v, bus_dma_segment_t *segs, int nsegs) 1208 1.1 skrll { 1209 1.1 skrll struct elroy_softc *sc = v; 1210 1.1 skrll 1211 1.1 skrll bus_dmamem_free(sc->sc_dmat, segs, nsegs); 1212 1.1 skrll } 1213 1.1 skrll 1214 1.1 skrll int 1215 1.1 skrll elroy_dmamem_map(void *v, bus_dma_segment_t *segs, int nsegs, size_t size, 1216 1.1 skrll void **kvap, int flags) 1217 1.1 skrll { 1218 1.1 skrll struct elroy_softc *sc = v; 1219 1.1 skrll 1220 1.9 skrll return bus_dmamem_map(sc->sc_dmat, segs, nsegs, size, kvap, flags); 1221 1.1 skrll } 1222 1.1 skrll 1223 1.1 skrll void 1224 1.1 skrll elroy_dmamem_unmap(void *v, void *kva, size_t size) 1225 1.1 skrll { 1226 1.1 skrll struct elroy_softc *sc = v; 1227 1.1 skrll 1228 1.1 skrll bus_dmamem_unmap(sc->sc_dmat, kva, size); 1229 1.1 skrll } 1230 1.1 skrll 1231 1.1 skrll paddr_t 1232 1.1 skrll elroy_dmamem_mmap(void *v, bus_dma_segment_t *segs, int nsegs, off_t off, 1233 1.1 skrll int prot, int flags) 1234 1.1 skrll { 1235 1.1 skrll struct elroy_softc *sc = v; 1236 1.1 skrll 1237 1.9 skrll return bus_dmamem_mmap(sc->sc_dmat, segs, nsegs, off, prot, flags); 1238 1.1 skrll } 1239 1.1 skrll 1240 1.1 skrll const struct hppa_bus_dma_tag elroy_dmat = { 1241 1.1 skrll NULL, 1242 1.1 skrll elroy_dmamap_create, elroy_dmamap_destroy, 1243 1.1 skrll elroy_dmamap_load, elroy_dmamap_load_mbuf, 1244 1.1 skrll elroy_dmamap_load_uio, elroy_dmamap_load_raw, 1245 1.1 skrll elroy_dmamap_unload, elroy_dmamap_sync, 1246 1.1 skrll 1247 1.1 skrll elroy_dmamem_alloc, elroy_dmamem_free, elroy_dmamem_map, 1248 1.1 skrll elroy_dmamem_unmap, elroy_dmamem_mmap 1249 1.1 skrll }; 1250 1.1 skrll 1251 1.1 skrll const struct hppa_pci_chipset_tag elroy_pc = { 1252 1.5 skrll .pc_attach_hook = elroy_attach_hook, 1253 1.5 skrll .pc_bus_maxdevs = elroy_maxdevs, 1254 1.5 skrll .pc_make_tag = elroy_make_tag, 1255 1.5 skrll .pc_decompose_tag = elroy_decompose_tag, 1256 1.5 skrll .pc_conf_read = elroy_conf_read, 1257 1.5 skrll .pc_conf_write = elroy_conf_write, 1258 1.5 skrll .pc_intr_map = apic_intr_map, 1259 1.5 skrll .pc_intr_string = apic_intr_string, 1260 1.5 skrll .pc_intr_establish = apic_intr_establish, 1261 1.5 skrll .pc_intr_disestablish = apic_intr_disestablish, 1262 1.1 skrll #if NCARDBUS > 0 1263 1.5 skrll .pc_alloc_parent = elroy_alloc_parent 1264 1.1 skrll #endif 1265 1.1 skrll }; 1266 1.1 skrll 1267 1.1 skrll void 1268 1.1 skrll elroy_attach(device_t parent, device_t self, void *aux) 1269 1.1 skrll { 1270 1.1 skrll struct elroy_softc *sc = device_private(self); 1271 1.1 skrll struct confargs *ca = (struct confargs *)aux; 1272 1.1 skrll struct pcibus_attach_args pba; 1273 1.1 skrll volatile struct elroy_regs *r; 1274 1.1 skrll const char *p = NULL, *q; 1275 1.1 skrll int i; 1276 1.1 skrll 1277 1.1 skrll sc->sc_dv = self; 1278 1.1 skrll sc->sc_hpa = ca->ca_hpa; 1279 1.1 skrll sc->sc_bt = ca->ca_iot; 1280 1.1 skrll sc->sc_dmat = ca->ca_dmatag; 1281 1.1 skrll if (bus_space_map(sc->sc_bt, ca->ca_hpa, ca->ca_hpasz, 0, &sc->sc_bh)) { 1282 1.1 skrll aprint_error(": can't map space\n"); 1283 1.1 skrll return; 1284 1.1 skrll } 1285 1.1 skrll 1286 1.1 skrll sc->sc_regs = r = bus_space_vaddr(sc->sc_bt, sc->sc_bh); 1287 1.1 skrll elroy_write32(&r->pci_cmdstat, htole32(PCI_COMMAND_IO_ENABLE | 1288 1.1 skrll PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE)); 1289 1.1 skrll 1290 1.1 skrll elroy_write32(&r->control, elroy_read32(&r->control) & 1291 1.1 skrll ~htole32(ELROY_CONTROL_RF)); 1292 1.1 skrll for (i = 5000; i-- && 1293 1.1 skrll elroy_read32(&r->status) & htole32(ELROY_STATUS_RC); DELAY(10)); 1294 1.1 skrll if (i < 0) { 1295 1.1 skrll char buf[128]; /* XXXNH */ 1296 1.1 skrll 1297 1.1 skrll snprintb(buf, sizeof(buf), ELROY_STATUS_BITS, 1298 1.1 skrll htole32(r->status)); 1299 1.1 skrll aprint_error(": reset failed; status %s\n", buf); 1300 1.1 skrll return; 1301 1.1 skrll } 1302 1.1 skrll 1303 1.1 skrll q = ""; 1304 1.1 skrll sc->sc_ver = PCI_REVISION(le32toh(elroy_read32(&r->pci_class))); 1305 1.1 skrll switch ((ca->ca_type.iodc_model << 4) | 1306 1.1 skrll (ca->ca_type.iodc_revision >> 4)) { 1307 1.1 skrll case 0x782: 1308 1.1 skrll p = "Elroy"; 1309 1.1 skrll switch (sc->sc_ver) { 1310 1.1 skrll default: 1311 1.1 skrll q = "+"; 1312 1.1 skrll case 5: sc->sc_ver = 0x40; break; 1313 1.1 skrll case 4: sc->sc_ver = 0x30; break; 1314 1.1 skrll case 3: sc->sc_ver = 0x22; break; 1315 1.1 skrll case 2: sc->sc_ver = 0x21; break; 1316 1.1 skrll case 1: sc->sc_ver = 0x20; break; 1317 1.1 skrll case 0: sc->sc_ver = 0x10; break; 1318 1.1 skrll } 1319 1.1 skrll break; 1320 1.1 skrll 1321 1.1 skrll case 0x783: 1322 1.1 skrll p = "Mercury"; 1323 1.1 skrll break; 1324 1.1 skrll 1325 1.1 skrll case 0x784: 1326 1.1 skrll p = "Quicksilver"; 1327 1.1 skrll break; 1328 1.1 skrll 1329 1.1 skrll default: 1330 1.1 skrll p = "Mojo"; 1331 1.1 skrll break; 1332 1.1 skrll } 1333 1.1 skrll 1334 1.1 skrll aprint_normal(": %s TR%d.%d%s", p, sc->sc_ver >> 4, sc->sc_ver & 0xf, 1335 1.1 skrll q); 1336 1.1 skrll apic_attach(sc); 1337 1.1 skrll aprint_normal("\n"); 1338 1.1 skrll 1339 1.1 skrll elroy_write32(&r->imask, htole32(0xffffffff << 30)); 1340 1.1 skrll elroy_write32(&r->ibase, htole32(ELROY_BASE_RE)); 1341 1.1 skrll 1342 1.1 skrll /* TODO reserve elroy's pci space ? */ 1343 1.1 skrll 1344 1.1 skrll #if 0 1345 1.1 skrll printf("lmm %llx/%llx gmm %llx/%llx wlm %llx/%llx wgm %llx/%llx io %llx/%llx eio %llx/%llx\n", 1346 1.1 skrll le64toh(r->lmmio_base), le64toh(r->lmmio_mask), 1347 1.1 skrll le64toh(r->gmmio_base), le64toh(r->gmmio_mask), 1348 1.1 skrll le64toh(r->wlmmio_base), le64toh(r->wlmmio_mask), 1349 1.1 skrll le64toh(r->wgmmio_base), le64toh(r->wgmmio_mask), 1350 1.1 skrll le64toh(r->io_base), le64toh(r->io_mask), 1351 1.1 skrll le64toh(r->eio_base), le64toh(r->eio_mask)); 1352 1.1 skrll #endif 1353 1.1 skrll 1354 1.1 skrll /* XXX evil hack! */ 1355 1.1 skrll sc->sc_iobase = 0xfee00000; 1356 1.1 skrll 1357 1.1 skrll sc->sc_iot = elroy_iomemt; 1358 1.1 skrll sc->sc_iot.hbt_cookie = sc; 1359 1.1 skrll sc->sc_iot.hbt_map = elroy_iomap; 1360 1.1 skrll sc->sc_iot.hbt_alloc = elroy_ioalloc; 1361 1.1 skrll sc->sc_memt = elroy_iomemt; 1362 1.1 skrll sc->sc_memt.hbt_cookie = sc; 1363 1.1 skrll sc->sc_memt.hbt_map = elroy_memmap; 1364 1.1 skrll sc->sc_memt.hbt_alloc = elroy_memalloc; 1365 1.1 skrll sc->sc_pc = elroy_pc; 1366 1.1 skrll sc->sc_pc._cookie = sc; 1367 1.1 skrll sc->sc_dmatag = elroy_dmat; 1368 1.1 skrll sc->sc_dmatag._cookie = sc; 1369 1.1 skrll 1370 1.1 skrll memset(&pba, 0, sizeof(pba)); 1371 1.1 skrll pba.pba_iot = &sc->sc_iot; 1372 1.1 skrll pba.pba_memt = &sc->sc_memt; 1373 1.1 skrll pba.pba_dmat = &sc->sc_dmatag; 1374 1.1 skrll pba.pba_pc = &sc->sc_pc; 1375 1.1 skrll pba.pba_bus = 0; /* (le32toh(elroy_read32(&r->busnum)) & 0xff) >> 4; */ 1376 1.1 skrll pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY; 1377 1.1 skrll 1378 1.4 thorpej config_found(self, &pba, pcibusprint, CFARGS_NONE); 1379 1.1 skrll } 1380