gftfb.c revision 1.1
1 /* $NetBSD: gftfb.c,v 1.1 2024/02/13 13:40:13 macallan Exp $ */ 2 3 /* $OpenBSD: sti_pci.c,v 1.7 2009/02/06 22:51:04 miod Exp $ */ 4 5 /* 6 * Copyright (c) 2006, 2007 Miodrag Vallat. 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice, this permission notice, and the disclaimer below 11 * appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 #include <sys/param.h> 23 #include <sys/systm.h> 24 #include <sys/kmem.h> 25 #include <sys/device.h> 26 27 #include <dev/pci/pcivar.h> 28 #include <dev/pci/pcireg.h> 29 #include <dev/pci/pcidevs.h> 30 #include <dev/pci/pciio.h> 31 32 #include <dev/wscons/wsdisplayvar.h> 33 #include <dev/wscons/wsconsio.h> 34 #include <dev/wsfont/wsfont.h> 35 #include <dev/rasops/rasops.h> 36 #include <dev/wscons/wsdisplay_vconsvar.h> 37 #include <dev/pci/wsdisplay_pci.h> 38 #include <dev/wscons/wsdisplay_glyphcachevar.h> 39 40 #include <dev/ic/stireg.h> 41 #include <dev/ic/stivar.h> 42 43 #ifdef STIDEBUG 44 #define DPRINTF(s) do { \ 45 if (stidebug) \ 46 printf s; \ 47 } while(0) 48 49 extern int stidebug; 50 #else 51 #define DPRINTF(s) /* */ 52 #endif 53 54 int gftfb_match(device_t, cfdata_t, void *); 55 void gftfb_attach(device_t, device_t, void *); 56 57 struct gftfb_softc { 58 device_t sc_dev; 59 pci_chipset_tag_t sc_pc; 60 pcitag_t sc_tag; 61 62 /* stuff we need in order to use the STI ROM */ 63 struct sti_softc sc_base; 64 struct sti_screen sc_scr; 65 bus_space_handle_t sc_romh; 66 67 int sc_width, sc_height; 68 int sc_locked; 69 struct vcons_screen sc_console_screen; 70 struct wsscreen_descr sc_defaultscreen_descr; 71 const struct wsscreen_descr *sc_screens[1]; 72 struct wsscreen_list sc_screenlist; 73 struct vcons_data vd; 74 int sc_mode; 75 u_char sc_cmap_red[256]; 76 u_char sc_cmap_green[256]; 77 u_char sc_cmap_blue[256]; 78 glyphcache sc_gc; 79 }; 80 81 CFATTACH_DECL_NEW(gftfb, sizeof(struct gftfb_softc), 82 gftfb_match, gftfb_attach, NULL, NULL); 83 84 int gftfb_readbar(struct sti_softc *, struct pci_attach_args *, u_int, int); 85 int gftfb_check_rom(struct gftfb_softc *, struct pci_attach_args *); 86 void gftfb_enable_rom(struct sti_softc *); 87 void gftfb_disable_rom(struct sti_softc *); 88 void gftfb_enable_rom_internal(struct gftfb_softc *); 89 void gftfb_disable_rom_internal(struct gftfb_softc *); 90 91 void gftfb_setup(struct gftfb_softc *); 92 void gftfb_wait(struct gftfb_softc *); 93 94 #define ngle_bt458_write(memt, memh, r, v) \ 95 bus_space_write_stream_4(memt, memh, NGLE_REG_RAMDAC + ((r) << 2), (v) << 24) 96 97 void gftfb_setup_fb(struct gftfb_softc *); 98 99 /* XXX these really need o go into their own header */ 100 int sti_pci_is_console(struct pci_attach_args *, bus_addr_t *); 101 int sti_rom_setup(struct sti_rom *, bus_space_tag_t, bus_space_tag_t, 102 bus_space_handle_t, bus_addr_t *, u_int); 103 int sti_screen_setup(struct sti_screen *, int); 104 void sti_describe_screen(struct sti_softc *, struct sti_screen *); 105 106 #define PCI_ROM_SIZE(mr) \ 107 (PCI_MAPREG_ROM_ADDR(mr) & -PCI_MAPREG_ROM_ADDR(mr)) 108 109 /* wsdisplay stuff */ 110 static int gftfb_ioctl(void *, void *, u_long, void *, int, 111 struct lwp *); 112 static paddr_t gftfb_mmap(void *, void *, off_t, int); 113 static void gftfb_init_screen(void *, struct vcons_screen *, int, long *); 114 115 static int gftfb_putcmap(struct gftfb_softc *, struct wsdisplay_cmap *); 116 static int gftfb_getcmap(struct gftfb_softc *, struct wsdisplay_cmap *); 117 static void gftfb_restore_palette(struct gftfb_softc *); 118 static int gftfb_putpalreg(struct gftfb_softc *, uint8_t, uint8_t, 119 uint8_t, uint8_t); 120 121 #if 0 122 static void gftfb_rectfill(struct gftfb_softc *, int, int, int, int, 123 uint32_t); 124 static void gftfb_bitblt(void *, int, int, int, int, int, 125 int, int); 126 127 static void gftfb_cursor(void *, int, int, int); 128 static void gftfb_putchar(void *, int, int, u_int, long); 129 static void gftfb_putchar_aa(void *, int, int, u_int, long); 130 static void gftfb_copycols(void *, int, int, int, int); 131 static void gftfb_erasecols(void *, int, int, int, long); 132 static void gftfb_copyrows(void *, int, int, int); 133 static void gftfb_eraserows(void *, int, int, long); 134 #endif 135 136 struct wsdisplay_accessops gftfb_accessops = { 137 gftfb_ioctl, 138 gftfb_mmap, 139 NULL, /* alloc_screen */ 140 NULL, /* free_screen */ 141 NULL, /* show_screen */ 142 NULL, /* load_font */ 143 NULL, /* pollc */ 144 NULL /* scroll */ 145 }; 146 147 int 148 gftfb_match(device_t parent, cfdata_t cf, void *aux) 149 { 150 struct pci_attach_args *paa = aux; 151 152 if (PCI_VENDOR(paa->pa_id) != PCI_VENDOR_HP) 153 return 0; 154 155 if (PCI_PRODUCT(paa->pa_id) == PCI_PRODUCT_HP_VISUALIZE_EG) 156 return 10; /* beat out sti at pci */ 157 158 return 0; 159 } 160 161 void 162 gftfb_attach(device_t parent, device_t self, void *aux) 163 { 164 struct gftfb_softc *sc = device_private(self); 165 struct pci_attach_args *paa = aux; 166 struct sti_rom *rom; 167 struct rasops_info *ri; 168 struct wsemuldisplaydev_attach_args aa; 169 unsigned long defattr; 170 int ret, is_console = 0, i, j; 171 uint8_t cmap[768]; 172 173 sc->sc_dev = self; 174 175 sc->sc_pc = paa->pa_pc; 176 sc->sc_tag = paa->pa_tag; 177 sc->sc_base.sc_dev = self; 178 sc->sc_base.sc_enable_rom = gftfb_enable_rom; 179 sc->sc_base.sc_disable_rom = gftfb_disable_rom; 180 181 aprint_normal("\n"); 182 183 if (gftfb_check_rom(sc, paa) != 0) 184 return; 185 186 ret = sti_pci_is_console(paa, sc->sc_base. bases); 187 if (ret != 0) { 188 sc->sc_base.sc_flags |= STI_CONSOLE; 189 is_console = 1; 190 } 191 rom = (struct sti_rom *)kmem_zalloc(sizeof(*rom), KM_SLEEP); 192 rom->rom_softc = &sc->sc_base; 193 ret = sti_rom_setup(rom, paa->pa_iot, paa->pa_memt, sc->sc_romh, sc->sc_base.bases, STI_CODEBASE_MAIN); 194 if (ret != 0) { 195 kmem_free(rom, sizeof(*rom)); 196 return; 197 } 198 199 sc->sc_base.sc_rom = rom; 200 201 sc->sc_scr.scr_rom = sc->sc_base.sc_rom; 202 ret = sti_screen_setup(&sc->sc_scr, STI_FBMODE); 203 204 sc->sc_width = sc->sc_scr.scr_cfg.scr_width; 205 sc->sc_height = sc->sc_scr.scr_cfg.scr_height; 206 207 aprint_normal_dev(sc->sc_dev, "%s at %dx%d\n", sc->sc_scr.name, 208 sc->sc_width, sc->sc_height); 209 gftfb_setup(sc); 210 211 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 212 "default", 213 0, 0, 214 NULL, 215 8, 16, 216 WSSCREEN_WSCOLORS | WSSCREEN_HILIT | WSSCREEN_UNDERLINE | 217 WSSCREEN_RESIZE, 218 NULL 219 }; 220 221 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 222 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 223 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 224 sc->sc_locked = 0; 225 226 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 227 &gftfb_accessops); 228 sc->vd.init_screen = gftfb_init_screen; 229 sc->vd.show_screen_cookie = &sc->sc_gc; 230 sc->vd.show_screen_cb = glyphcache_adapt; 231 232 ri = &sc->sc_console_screen.scr_ri; 233 234 #if 0 235 sc->sc_gc.gc_bitblt = gftfb_bitblt; 236 sc->sc_gc.gc_blitcookie = sc; 237 sc->sc_gc.gc_rop = 0x0c; 238 #endif 239 if (is_console) { 240 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 241 &defattr); 242 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 243 244 #if 0 245 gftfb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 246 ri->ri_devcmap[(defattr >> 16) & 0xff]); 247 #endif 248 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 249 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 250 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 251 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 252 #if 0 253 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 254 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 255 sc->sc_width, 256 ri->ri_font->fontwidth, 257 ri->ri_font->fontheight, 258 defattr); 259 #endif 260 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 261 defattr); 262 vcons_replay_msgbuf(&sc->sc_console_screen); 263 } else { 264 /* 265 * since we're not the console we can postpone the rest 266 * until someone actually allocates a screen for us 267 */ 268 if (sc->sc_console_screen.scr_ri.ri_rows == 0) { 269 /* do some minimal setup to avoid weirdnesses later */ 270 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 271 &defattr); 272 } else 273 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 274 #if 0 275 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 276 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 277 sc->sc_width, 278 ri->ri_font->fontwidth, 279 ri->ri_font->fontheight, 280 defattr); 281 #endif 282 } 283 284 j = 0; 285 rasops_get_cmap(ri, cmap, sizeof(cmap)); 286 for (i = 0; i < 256; i++) { 287 sc->sc_cmap_red[i] = cmap[j]; 288 sc->sc_cmap_green[i] = cmap[j + 1]; 289 sc->sc_cmap_blue[i] = cmap[j + 2]; 290 gftfb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 291 j += 3; 292 } 293 294 /* no suspend/resume support yet */ 295 if (!pmf_device_register(sc->sc_dev, NULL, NULL)) 296 aprint_error_dev(sc->sc_dev, 297 "couldn't establish power handler\n"); 298 299 aa.console = is_console; 300 aa.scrdata = &sc->sc_screenlist; 301 aa.accessops = &gftfb_accessops; 302 aa.accesscookie = &sc->vd; 303 304 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint, CFARGS_NONE); 305 } 306 307 /* 308 * Grovel the STI ROM image. 309 */ 310 int 311 gftfb_check_rom(struct gftfb_softc *spc, struct pci_attach_args *pa) 312 { 313 struct sti_softc *sc = &spc->sc_base; 314 pcireg_t address, mask; 315 bus_space_handle_t romh; 316 bus_size_t romsize, subsize, stiromsize; 317 bus_addr_t selected, offs, suboffs; 318 uint32_t tmp; 319 int i; 320 int rc; 321 322 /* sort of inline sti_pci_enable_rom(sc) */ 323 address = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM); 324 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM, 325 ~PCI_MAPREG_ROM_ENABLE); 326 mask = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM); 327 address |= PCI_MAPREG_ROM_ENABLE; 328 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM, address); 329 sc->sc_flags |= STI_ROM_ENABLED; 330 /* 331 * Map the complete ROM for now. 332 */ 333 334 romsize = PCI_ROM_SIZE(mask); 335 DPRINTF(("%s: mapping rom @ %lx for %lx\n", __func__, 336 (long)PCI_MAPREG_ROM_ADDR(address), (long)romsize)); 337 338 rc = bus_space_map(pa->pa_memt, PCI_MAPREG_ROM_ADDR(address), romsize, 339 0, &romh); 340 if (rc != 0) { 341 aprint_error_dev(sc->sc_dev, "can't map PCI ROM (%d)\n", rc); 342 goto fail2; 343 } 344 345 gftfb_disable_rom_internal(spc); 346 /* 347 * Iterate over the ROM images, pick the best candidate. 348 */ 349 350 selected = (bus_addr_t)-1; 351 for (offs = 0; offs < romsize; offs += subsize) { 352 gftfb_enable_rom_internal(spc); 353 /* 354 * Check for a valid ROM header. 355 */ 356 tmp = bus_space_read_4(pa->pa_memt, romh, offs + 0); 357 tmp = le32toh(tmp); 358 if (tmp != 0x55aa0000) { 359 gftfb_disable_rom_internal(spc); 360 if (offs == 0) { 361 aprint_error_dev(sc->sc_dev, 362 "invalid PCI ROM header signature (%08x)\n", 363 tmp); 364 rc = EINVAL; 365 } 366 break; 367 } 368 369 /* 370 * Check ROM type. 371 */ 372 tmp = bus_space_read_4(pa->pa_memt, romh, offs + 4); 373 tmp = le32toh(tmp); 374 if (tmp != 0x00000001) { /* 1 == STI ROM */ 375 gftfb_disable_rom_internal(spc); 376 if (offs == 0) { 377 aprint_error_dev(sc->sc_dev, 378 "invalid PCI ROM type (%08x)\n", tmp); 379 rc = EINVAL; 380 } 381 break; 382 } 383 384 subsize = (bus_addr_t)bus_space_read_2(pa->pa_memt, romh, 385 offs + 0x0c); 386 subsize <<= 9; 387 388 #ifdef STIDEBUG 389 gftfb_disable_rom_internal(spc); 390 DPRINTF(("ROM offset %08x size %08x type %08x", 391 (u_int)offs, (u_int)subsize, tmp)); 392 gftfb_enable_rom_internal(spc); 393 #endif 394 395 /* 396 * Check for a valid ROM data structure. 397 * We do not need it except to know what architecture the ROM 398 * code is for. 399 */ 400 401 suboffs = offs +(bus_addr_t)bus_space_read_2(pa->pa_memt, romh, 402 offs + 0x18); 403 tmp = bus_space_read_4(pa->pa_memt, romh, suboffs + 0); 404 tmp = le32toh(tmp); 405 if (tmp != 0x50434952) { /* PCIR */ 406 gftfb_disable_rom_internal(spc); 407 if (offs == 0) { 408 aprint_error_dev(sc->sc_dev, "invalid PCI data" 409 " signature (%08x)\n", tmp); 410 rc = EINVAL; 411 } else { 412 DPRINTF((" invalid PCI data signature %08x\n", 413 tmp)); 414 continue; 415 } 416 } 417 418 tmp = bus_space_read_1(pa->pa_memt, romh, suboffs + 0x14); 419 gftfb_disable_rom_internal(spc); 420 DPRINTF((" code %02x", tmp)); 421 422 switch (tmp) { 423 #ifdef __hppa__ 424 case 0x10: 425 if (selected == (bus_addr_t)-1) 426 selected = offs; 427 break; 428 #endif 429 #ifdef __i386__ 430 case 0x00: 431 if (selected == (bus_addr_t)-1) 432 selected = offs; 433 break; 434 #endif 435 default: 436 #ifdef STIDEBUG 437 DPRINTF((" (wrong architecture)")); 438 #endif 439 break; 440 } 441 DPRINTF(("%s\n", selected == offs ? " -> SELECTED" : "")); 442 } 443 444 if (selected == (bus_addr_t)-1) { 445 if (rc == 0) { 446 aprint_error_dev(sc->sc_dev, "found no ROM with " 447 "correct microcode architecture\n"); 448 rc = ENOEXEC; 449 } 450 goto fail; 451 } 452 453 /* 454 * Read the STI region BAR assignments. 455 */ 456 457 gftfb_enable_rom_internal(spc); 458 offs = selected + 459 (bus_addr_t)bus_space_read_2(pa->pa_memt, romh, selected + 0x0e); 460 for (i = 0; i < STI_REGION_MAX; i++) { 461 rc = gftfb_readbar(sc, pa, i, 462 bus_space_read_1(pa->pa_memt, romh, offs + i)); 463 if (rc != 0) 464 goto fail; 465 } 466 467 /* 468 * Find out where the STI ROM itself lies, and its size. 469 */ 470 471 offs = selected + 472 (bus_addr_t)bus_space_read_4(pa->pa_memt, romh, selected + 0x08); 473 stiromsize = (bus_addr_t)bus_space_read_4(pa->pa_memt, romh, 474 offs + 0x18); 475 stiromsize = le32toh(stiromsize); 476 gftfb_disable_rom_internal(spc); 477 478 /* 479 * Replace our mapping with a smaller mapping of only the area 480 * we are interested in. 481 */ 482 483 DPRINTF(("remapping rom @ %lx for %lx\n", 484 (long)(PCI_MAPREG_ROM_ADDR(address) + offs), (long)stiromsize)); 485 bus_space_unmap(pa->pa_memt, romh, romsize); 486 rc = bus_space_map(pa->pa_memt, PCI_MAPREG_ROM_ADDR(address) + offs, 487 stiromsize, 0, &spc->sc_romh); 488 if (rc != 0) { 489 aprint_error_dev(sc->sc_dev, "can't map STI ROM (%d)\n", 490 rc); 491 goto fail2; 492 } 493 gftfb_disable_rom_internal(spc); 494 sc->sc_flags &= ~STI_ROM_ENABLED; 495 496 return 0; 497 498 fail: 499 bus_space_unmap(pa->pa_memt, romh, romsize); 500 fail2: 501 gftfb_disable_rom_internal(spc); 502 503 return rc; 504 } 505 506 /* 507 * Decode a BAR register. 508 */ 509 int 510 gftfb_readbar(struct sti_softc *sc, struct pci_attach_args *pa, u_int region, 511 int bar) 512 { 513 bus_addr_t addr; 514 bus_size_t size; 515 uint32_t cf; 516 int rc; 517 518 if (bar == 0) { 519 sc->bases[region] = 0; 520 return (0); 521 } 522 523 #ifdef DIAGNOSTIC 524 if (bar < PCI_MAPREG_START || bar > PCI_MAPREG_PPB_END) { 525 gftfb_disable_rom(sc); 526 printf("%s: unexpected bar %02x for region %d\n", 527 device_xname(sc->sc_dev), bar, region); 528 gftfb_enable_rom(sc); 529 } 530 #endif 531 532 cf = pci_conf_read(pa->pa_pc, pa->pa_tag, bar); 533 534 rc = pci_mapreg_info(pa->pa_pc, pa->pa_tag, bar, PCI_MAPREG_TYPE(cf), 535 &addr, &size, NULL); 536 537 if (rc != 0) { 538 gftfb_disable_rom(sc); 539 aprint_error_dev(sc->sc_dev, "invalid bar %02x for region %d\n", 540 bar, region); 541 gftfb_enable_rom(sc); 542 return (rc); 543 } 544 545 sc->bases[region] = addr; 546 return (0); 547 } 548 549 /* 550 * Enable PCI ROM. 551 */ 552 void 553 gftfb_enable_rom_internal(struct gftfb_softc *spc) 554 { 555 pcireg_t address; 556 557 KASSERT(spc != NULL); 558 559 address = pci_conf_read(spc->sc_pc, spc->sc_tag, PCI_MAPREG_ROM); 560 address |= PCI_MAPREG_ROM_ENABLE; 561 pci_conf_write(spc->sc_pc, spc->sc_tag, PCI_MAPREG_ROM, address); 562 } 563 564 void 565 gftfb_enable_rom(struct sti_softc *sc) 566 { 567 struct gftfb_softc *spc = device_private(sc->sc_dev); 568 569 if (!ISSET(sc->sc_flags, STI_ROM_ENABLED)) { 570 gftfb_enable_rom_internal(spc); 571 } 572 SET(sc->sc_flags, STI_ROM_ENABLED); 573 } 574 575 /* 576 * Disable PCI ROM. 577 */ 578 void 579 gftfb_disable_rom_internal(struct gftfb_softc *spc) 580 { 581 pcireg_t address; 582 583 KASSERT(spc != NULL); 584 585 address = pci_conf_read(spc->sc_pc, spc->sc_tag, PCI_MAPREG_ROM); 586 address &= ~PCI_MAPREG_ROM_ENABLE; 587 pci_conf_write(spc->sc_pc, spc->sc_tag, PCI_MAPREG_ROM, address); 588 } 589 590 void 591 gftfb_disable_rom(struct sti_softc *sc) 592 { 593 struct gftfb_softc *spc = device_private(sc->sc_dev); 594 595 if (ISSET(sc->sc_flags, STI_ROM_ENABLED)) { 596 gftfb_disable_rom_internal(spc); 597 } 598 CLR(sc->sc_flags, STI_ROM_ENABLED); 599 } 600 601 void 602 gftfb_wait(struct gftfb_softc *sc) 603 { 604 struct sti_rom *rom = sc->sc_base.sc_rom; 605 bus_space_tag_t memt = rom->memt; 606 bus_space_handle_t memh = rom->regh[2]; 607 uint8_t stat; 608 609 do { 610 stat = bus_space_read_1(memt, memh, NGLE_REG_15b0); 611 if (stat == 0) 612 stat = bus_space_read_1(memt, memh, NGLE_REG_15b0); 613 } while (stat != 0); 614 } 615 616 void 617 gftfb_setup_fb(struct gftfb_softc *sc) 618 { 619 struct sti_rom *rom = sc->sc_base.sc_rom; 620 bus_space_tag_t memt = rom->memt; 621 bus_space_handle_t memh = rom->regh[2]; 622 623 gftfb_wait(sc); 624 bus_space_write_stream_4(memt, memh, NGLE_REG_10, 0x13601000); 625 bus_space_write_stream_4(memt, memh, NGLE_REG_14, 0x83000300); 626 gftfb_wait(sc); 627 bus_space_write_1(memt, memh, NGLE_REG_16b1, 1); 628 } 629 630 void 631 gftfb_setup(struct gftfb_softc *sc) 632 { 633 struct sti_rom *rom = sc->sc_base.sc_rom; 634 bus_space_tag_t memt = rom->memt; 635 bus_space_handle_t memh = rom->regh[2]; 636 637 /* set Bt458 read mask register to all planes */ 638 gftfb_wait(sc); 639 ngle_bt458_write(memt, memh, 0x08, 0x04); 640 ngle_bt458_write(memt, memh, 0x0a, 0xff); 641 642 gftfb_setup_fb(sc); 643 644 /* attr. planes */ 645 gftfb_wait(sc); 646 bus_space_write_stream_4(memt, memh, NGLE_REG_11, 0x2ea0d000); 647 bus_space_write_stream_4(memt, memh, NGLE_REG_14, 0x23000302); 648 bus_space_write_stream_4(memt, memh, NGLE_REG_12, NGLE_ARTIST_CMAP0); 649 bus_space_write_stream_4(memt, memh, NGLE_REG_8, 0xffffffff); 650 651 gftfb_wait(sc); 652 bus_space_write_stream_4(memt, memh, NGLE_REG_6, 0x00000000); 653 bus_space_write_stream_4(memt, memh, NGLE_REG_9, 654 (sc->sc_scr.scr_cfg.scr_width << 16) | sc->sc_scr.scr_cfg.scr_height); 655 bus_space_write_stream_4(memt, memh, NGLE_REG_6, 0x05000000); 656 bus_space_write_stream_4(memt, memh, NGLE_REG_9, 0x00040001); 657 658 gftfb_wait(sc); 659 bus_space_write_stream_4(memt, memh, NGLE_REG_12, 0x00000000); 660 661 gftfb_setup_fb(sc); 662 663 gftfb_wait(sc); 664 bus_space_write_stream_4(memt, memh, NGLE_REG_21, 665 bus_space_read_stream_4(memt, memh, NGLE_REG_21) | 0x0a000000); 666 bus_space_write_stream_4(memt, memh, NGLE_REG_27, 667 bus_space_read_stream_4(memt, memh, NGLE_REG_27) | 0x00800000); 668 } 669 670 static int 671 gftfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 672 struct lwp *l) 673 { 674 struct vcons_data *vd = v; 675 struct gftfb_softc *sc = vd->cookie; 676 struct wsdisplay_fbinfo *wdf; 677 struct vcons_screen *ms = vd->active; 678 679 switch (cmd) { 680 case WSDISPLAYIO_GTYPE: 681 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 682 return 0; 683 684 /* PCI config read/write passthrough. */ 685 case PCI_IOC_CFGREAD: 686 case PCI_IOC_CFGWRITE: 687 return pci_devioctl(sc->sc_pc, sc->sc_tag, 688 cmd, data, flag, l); 689 690 case WSDISPLAYIO_GET_BUSID: 691 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 692 sc->sc_tag, data); 693 694 case WSDISPLAYIO_GINFO: 695 if (ms == NULL) 696 return ENODEV; 697 wdf = (void *)data; 698 wdf->height = ms->scr_ri.ri_height; 699 wdf->width = ms->scr_ri.ri_width; 700 wdf->depth = ms->scr_ri.ri_depth; 701 wdf->cmsize = 256; 702 return 0; 703 704 case WSDISPLAYIO_GETCMAP: 705 return gftfb_getcmap(sc, 706 (struct wsdisplay_cmap *)data); 707 708 case WSDISPLAYIO_PUTCMAP: 709 return gftfb_putcmap(sc, 710 (struct wsdisplay_cmap *)data); 711 712 case WSDISPLAYIO_LINEBYTES: 713 *(u_int *)data = 2048; 714 return 0; 715 716 case WSDISPLAYIO_SMODE: { 717 int new_mode = *(int*)data; 718 if (new_mode != sc->sc_mode) { 719 sc->sc_mode = new_mode; 720 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 721 //r128fb_init(sc); 722 gftfb_restore_palette(sc); 723 //glyphcache_wipe(&sc->sc_gc); 724 //r128fb_rectfill(sc, 0, 0, sc->sc_width, 725 // sc->sc_height, ms->scr_ri.ri_devcmap[ 726 // (ms->scr_defattr >> 16) & 0xff]); 727 vcons_redraw_screen(ms); 728 } 729 } 730 } 731 return 0; 732 733 case WSDISPLAYIO_GET_FBINFO: 734 { 735 struct wsdisplayio_fbinfo *fbi = data; 736 737 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 738 } 739 } 740 return EPASSTHROUGH; 741 } 742 743 static paddr_t 744 gftfb_mmap(void *v, void *vs, off_t offset, int prot) 745 { 746 #if 0 747 struct vcons_data *vd = v; 748 struct gftfb_softc *sc = vd->cookie; 749 paddr_t pa; 750 #endif 751 return -1; 752 } 753 754 static void 755 gftfb_init_screen(void *cookie, struct vcons_screen *scr, 756 int existing, long *defattr) 757 { 758 struct gftfb_softc *sc = cookie; 759 struct rasops_info *ri = &scr->scr_ri; 760 761 ri->ri_depth = 8; 762 ri->ri_width = sc->sc_width; 763 ri->ri_height = sc->sc_height; 764 ri->ri_stride = 2048; 765 ri->ri_flg = RI_CENTER; 766 if (scr->scr_flags & VCONS_SCREEN_IS_STATIC) 767 ri->ri_flg |= RI_FULLCLEAR | RI_CLEAR; 768 ri->ri_bits = (void *)sc->sc_scr.fbaddr; 769 #if 0 770 if (sc->sc_depth == 8) 771 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA | 772 RI_PREFER_ALPHA; 773 #endif 774 rasops_init(ri, 0, 0); 775 ri->ri_caps = WSSCREEN_WSCOLORS | WSSCREEN_HILIT | WSSCREEN_UNDERLINE | 776 WSSCREEN_RESIZE; 777 scr->scr_flags |= VCONS_DONT_READ; 778 scr->scr_flags |= VCONS_LOADFONT; 779 780 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 781 sc->sc_width / ri->ri_font->fontwidth); 782 783 ri->ri_hw = scr; 784 #if 0 785 ri->ri_ops.copyrows = gftfb_copyrows; 786 ri->ri_ops.copycols = gftfb_copycols; 787 ri->ri_ops.eraserows = gftfb_eraserows; 788 ri->ri_ops.erasecols = gftfb_erasecols; 789 ri->ri_ops.cursor = gftfb_cursor; 790 if (FONT_IS_ALPHA(ri->ri_font)) { 791 ri->ri_ops.putchar = gftfb_putchar_aa; 792 } else 793 ri->ri_ops.putchar = gftfb_putchar; 794 #endif 795 } 796 797 static int 798 gftfb_putcmap(struct gftfb_softc *sc, struct wsdisplay_cmap *cm) 799 { 800 u_char *r, *g, *b; 801 u_int index = cm->index; 802 u_int count = cm->count; 803 int i, error; 804 u_char rbuf[256], gbuf[256], bbuf[256]; 805 806 #ifdef R128FB_DEBUG 807 aprint_debug("putcmap: %d %d\n",index, count); 808 #endif 809 if (cm->index >= 256 || cm->count > 256 || 810 (cm->index + cm->count) > 256) 811 return EINVAL; 812 error = copyin(cm->red, &rbuf[index], count); 813 if (error) 814 return error; 815 error = copyin(cm->green, &gbuf[index], count); 816 if (error) 817 return error; 818 error = copyin(cm->blue, &bbuf[index], count); 819 if (error) 820 return error; 821 822 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 823 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 824 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 825 826 r = &sc->sc_cmap_red[index]; 827 g = &sc->sc_cmap_green[index]; 828 b = &sc->sc_cmap_blue[index]; 829 830 for (i = 0; i < count; i++) { 831 gftfb_putpalreg(sc, index, *r, *g, *b); 832 index++; 833 r++, g++, b++; 834 } 835 return 0; 836 } 837 838 static int 839 gftfb_getcmap(struct gftfb_softc *sc, struct wsdisplay_cmap *cm) 840 { 841 u_int index = cm->index; 842 u_int count = cm->count; 843 int error; 844 845 if (index >= 255 || count > 256 || index + count > 256) 846 return EINVAL; 847 848 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 849 if (error) 850 return error; 851 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 852 if (error) 853 return error; 854 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 855 if (error) 856 return error; 857 858 return 0; 859 } 860 861 static void 862 gftfb_restore_palette(struct gftfb_softc *sc) 863 { 864 int i; 865 866 for (i = 0; i < 256; i++) { 867 gftfb_putpalreg(sc, i, sc->sc_cmap_red[i], 868 sc->sc_cmap_green[i], sc->sc_cmap_blue[i]); 869 } 870 } 871 872 static int 873 gftfb_putpalreg(struct gftfb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, 874 uint8_t b) 875 { 876 struct sti_rom *rom = sc->sc_base.sc_rom; 877 bus_space_tag_t memt = rom->memt; 878 bus_space_handle_t memh = rom->regh[2]; 879 880 gftfb_wait(sc); 881 bus_space_write_stream_4(memt, memh, NGLE_REG_10, 0xbbe0f000); 882 bus_space_write_stream_4(memt, memh, NGLE_REG_14, 0x03000300); 883 bus_space_write_stream_4(memt, memh, NGLE_REG_13, 0xffffffff); 884 885 gftfb_wait(sc); 886 bus_space_write_stream_4(memt, memh, NGLE_REG_3, 887 0x400 | (idx << 2)); 888 bus_space_write_stream_4(memt, memh, NGLE_REG_4, 889 (r << 16) | (g << 8) | b); 890 891 bus_space_write_stream_4(memt, memh, NGLE_REG_2, 0x400); 892 bus_space_write_stream_4(memt, memh, NGLE_REG_26, 0x80000100); 893 gftfb_setup_fb(sc); 894 return 0; 895 } 896
Indexes created Sun Sep 28 07:09:56 GMT 2025