mongoose.c revision 1.3.10.2
1 /* $NetBSD: mongoose.c,v 1.3.10.2 2014/08/20 00:03:04 tls Exp $ */ 2 3 /* $OpenBSD: mongoose.c,v 1.19 2010/01/01 20:28:42 kettenis Exp $ */ 4 5 /* 6 * Copyright (c) 1998-2003 Michael Shalayeff 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __KERNEL_RCSID(0, "$NetBSD: mongoose.c,v 1.3.10.2 2014/08/20 00:03:04 tls Exp $"); 33 34 #define MONGOOSE_DEBUG 9 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/device.h> 39 #include <sys/reboot.h> 40 41 #include <sys/bus.h> 42 #include <machine/iomod.h> 43 #include <machine/autoconf.h> 44 45 #include <hppa/dev/cpudevs.h> 46 #include <hppa/dev/viper.h> 47 48 #include <dev/eisa/eisareg.h> 49 #include <dev/eisa/eisavar.h> 50 51 #include <dev/isa/isareg.h> 52 #include <dev/isa/isavar.h> 53 54 /* EISA Bus Adapter registers definitions */ 55 #define MONGOOSE_MONGOOSE 0x10000 56 struct mongoose_regs { 57 uint8_t version; 58 uint8_t lock; 59 uint8_t liowait; 60 uint8_t clock; 61 uint8_t reserved[0xf000 - 4]; 62 uint8_t intack; 63 }; 64 65 #define MONGOOSE_CTRL 0x00000 66 #define MONGOOSE_NINTS 16 67 struct mongoose_ctrl { 68 struct dma0 { 69 struct { 70 uint32_t addr : 8; 71 uint32_t count: 8; 72 } ch[4]; 73 uint8_t command; 74 uint8_t request; 75 uint8_t mask_channel; 76 uint8_t mode; 77 uint8_t clr_byte_ptr; 78 uint8_t master_clear; 79 uint8_t mask_clear; 80 uint8_t master_write; 81 uint8_t pad[8]; 82 } dma0; 83 84 uint8_t irr0; /* 0x20 */ 85 uint8_t imr0; 86 uint8_t iack; /* 0x22 -- 2 b2b reads generate 87 (e)isa Iack cycle & returns int level */ 88 uint8_t pad0[29]; 89 90 struct timers { 91 uint8_t sysclk; 92 uint8_t refresh; 93 uint8_t spkr; 94 uint8_t ctrl; 95 uint32_t pad; 96 } tmr[2]; /* 0x40 -- timers control */ 97 uint8_t pad1[16]; 98 99 uint16_t inmi; /* 0x60 NMI control */ 100 uint8_t pad2[30]; 101 struct { 102 uint8_t pad0; 103 uint8_t ch2; 104 uint8_t ch3; 105 uint8_t ch1; 106 uint8_t pad1; 107 uint8_t pad2[3]; 108 uint8_t ch0; 109 uint8_t pad4; 110 uint8_t ch6; 111 uint8_t ch7; 112 uint8_t ch5; 113 uint8_t pad5[3]; 114 uint8_t pad6[16]; 115 } pr; /* 0x80 */ 116 117 uint8_t irr1; /* 0xa0 */ 118 uint8_t imr1; 119 uint8_t pad3[30]; 120 121 struct dma1 { 122 struct { 123 uint32_t addr : 8; 124 uint32_t pad0 : 8; 125 uint32_t count: 8; 126 uint32_t pad1 : 8; 127 } ch[4]; 128 uint8_t command; 129 uint8_t pad0; 130 uint8_t request; 131 uint8_t pad1; 132 uint8_t mask_channel; 133 uint8_t pad2; 134 uint8_t mode; 135 uint8_t pad3; 136 uint8_t clr_byte_ptr; 137 uint8_t pad4; 138 uint8_t master_clear; 139 uint8_t pad5; 140 uint8_t mask_clear; 141 uint8_t pad6; 142 uint8_t master_write; 143 uint8_t pad7; 144 } dma1; /* 0xc0 */ 145 146 uint8_t master_req; /* 0xe0 master request register */ 147 uint8_t pad4[31]; 148 149 uint8_t pad5[0x3d0]; /* 0x4d0 */ 150 uint8_t pic0; /* 0 - edge, 1 - level */ 151 uint8_t pic1; 152 uint8_t pad6[0x460]; 153 uint8_t nmi; 154 uint8_t nmi_ext; 155 #define MONGOOSE_NMI_BUSRESET 0x01 156 #define MONGOOSE_NMI_IOPORT_EN 0x02 157 #define MONGOOSE_NMI_EN 0x04 158 #define MONGOOSE_NMI_MTMO_EN 0x08 159 #define MONGOOSE_NMI_RES4 0x10 160 #define MONGOOSE_NMI_IOPORT_INT 0x20 161 #define MONGOOSE_NMI_MASTER_INT 0x40 162 #define MONGOOSE_NMI_INT 0x80 163 }; 164 165 #define MONGOOSE_IOMAP 0x100000 166 167 struct hppa_isa_iv { 168 int (*iv_handler)(void *arg); 169 void *iv_arg; 170 int iv_pri; 171 172 struct evcnt iv_evcnt; 173 /* don't do sharing, we won't have many slots anyway 174 struct hppa_isa_iv *iv_next; 175 */ 176 }; 177 178 struct mongoose_softc { 179 device_t sc_dev; 180 void *sc_ih; 181 182 bus_space_tag_t sc_bt; 183 volatile struct mongoose_regs *sc_regs; 184 volatile struct mongoose_ctrl *sc_ctrl; 185 bus_addr_t sc_iomap; 186 187 /* interrupts section */ 188 struct hppa_eisa_chipset sc_ec; 189 struct hppa_isa_chipset sc_ic; 190 struct hppa_isa_iv sc_iv[MONGOOSE_NINTS]; 191 192 /* isa/eisa bus guts */ 193 struct hppa_bus_space_tag sc_eiot; 194 struct hppa_bus_space_tag sc_ememt; 195 struct hppa_bus_dma_tag sc_edmat; 196 struct hppa_bus_space_tag sc_iiot; 197 struct hppa_bus_space_tag sc_imemt; 198 struct hppa_bus_dma_tag sc_idmat; 199 }; 200 201 union mongoose_attach_args { 202 struct eisabus_attach_args mongoose_eisa; 203 struct isabus_attach_args mongoose_isa; 204 }; 205 206 void mg_eisa_attach_hook(device_t, device_t, struct eisabus_attach_args *); 207 int mg_intr_map(void *, u_int, eisa_intr_handle_t *); 208 const char *mg_intr_string(void *, int, char *, size_t); 209 void mg_isa_attach_hook(device_t, device_t, struct isabus_attach_args *); 210 void mg_isa_detach_hook(isa_chipset_tag_t, device_t); 211 void *mg_intr_establish(void *, int, int, int, int (*)(void *), void *); 212 void mg_intr_disestablish(void *, void *); 213 int mg_intr_check(void *, int, int); 214 int mg_intr(void *); 215 int mg_eisa_iomap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *); 216 int mg_eisa_memmap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *); 217 void mg_eisa_memunmap(void *, bus_space_handle_t, bus_size_t); 218 void mg_isa_barrier(void *, bus_space_handle_t, bus_size_t, bus_size_t, int); 219 uint16_t mg_isa_r2(void *, bus_space_handle_t, bus_size_t); 220 uint32_t mg_isa_r4(void *, bus_space_handle_t, bus_size_t); 221 void mg_isa_w2(void *, bus_space_handle_t, bus_size_t, uint16_t); 222 void mg_isa_w4(void *, bus_space_handle_t, bus_size_t, uint32_t); 223 void mg_isa_rm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, bus_size_t); 224 void mg_isa_rm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, bus_size_t); 225 void mg_isa_wm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, bus_size_t); 226 void mg_isa_wm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, bus_size_t); 227 void mg_isa_sm_2(void *, bus_space_handle_t, bus_size_t, uint16_t, bus_size_t); 228 void mg_isa_sm_4(void *, bus_space_handle_t, bus_size_t, uint32_t, bus_size_t); 229 void mg_isa_rr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, bus_size_t); 230 void mg_isa_rr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, bus_size_t); 231 void mg_isa_wr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, bus_size_t); 232 void mg_isa_wr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, bus_size_t); 233 void mg_isa_sr_2(void *, bus_space_handle_t, bus_size_t, uint16_t, bus_size_t); 234 void mg_isa_sr_4(void *, bus_space_handle_t, bus_size_t, uint32_t, bus_size_t); 235 236 int mgmatch(device_t, cfdata_t, void *); 237 void mgattach(device_t, device_t, void *); 238 239 CFATTACH_DECL_NEW(mongoose, sizeof(struct mongoose_softc), 240 mgmatch, mgattach, NULL, NULL); 241 242 /* TODO: DMA guts */ 243 244 void 245 mg_eisa_attach_hook(device_t parent, device_t self, 246 struct eisabus_attach_args *mg) 247 { 248 } 249 250 int 251 mg_intr_map(void *v, u_int irq, eisa_intr_handle_t *ehp) 252 { 253 *ehp = irq; 254 return 0; 255 } 256 257 const char * 258 mg_intr_string(void *v, int irq, char *buf, size_t len) 259 { 260 snprintf (buf, len, "isa irq %d", irq); 261 return buf; 262 } 263 264 void 265 mg_isa_attach_hook(device_t parent, device_t self, 266 struct isabus_attach_args *iba) 267 { 268 269 } 270 271 void 272 mg_isa_detach_hook(isa_chipset_tag_t ic, device_t self) 273 { 274 275 } 276 277 void * 278 mg_intr_establish(void *v, int irq, int type, int pri, 279 int (*handler)(void *), void *arg) 280 { 281 struct hppa_isa_iv *iv; 282 struct mongoose_softc *sc = v; 283 volatile uint8_t *imr, *pic; 284 285 if (!sc || irq < 0 || irq >= MONGOOSE_NINTS || 286 (0 <= irq && irq < MONGOOSE_NINTS && sc->sc_iv[irq].iv_handler)) 287 return NULL; 288 289 if (type != IST_LEVEL && type != IST_EDGE) { 290 aprint_debug_dev(sc->sc_dev, "bad interrupt level (%d)\n", 291 type); 292 return NULL; 293 } 294 295 iv = &sc->sc_iv[irq]; 296 if (iv->iv_handler) { 297 aprint_debug_dev(sc->sc_dev, "irq %d already established\n", 298 irq); 299 return NULL; 300 } 301 302 iv->iv_pri = pri; 303 iv->iv_handler = handler; 304 iv->iv_arg = arg; 305 306 if (irq < 8) { 307 imr = &sc->sc_ctrl->imr0; 308 pic = &sc->sc_ctrl->pic0; 309 } else { 310 imr = &sc->sc_ctrl->imr1; 311 pic = &sc->sc_ctrl->pic1; 312 irq -= 8; 313 } 314 315 *imr |= 1 << irq; 316 *pic |= (type == IST_LEVEL) << irq; 317 318 /* TODO: ack it? */ 319 320 return iv; 321 } 322 323 void 324 mg_intr_disestablish(void *v, void *cookie) 325 { 326 struct hppa_isa_iv *iv = cookie; 327 struct mongoose_softc *sc = v; 328 int irq = iv - sc->sc_iv; 329 volatile uint8_t *imr; 330 331 if (!sc || !cookie) 332 return; 333 334 if (irq < 8) 335 imr = &sc->sc_ctrl->imr0; 336 else 337 imr = &sc->sc_ctrl->imr1; 338 *imr &= ~(1 << irq); 339 /* TODO: ack it? */ 340 341 iv->iv_handler = NULL; 342 } 343 344 int 345 mg_intr_check(void *v, int irq, int type) 346 { 347 return 0; 348 } 349 350 int 351 mg_intr(void *v) 352 { 353 struct mongoose_softc *sc = v; 354 struct hppa_isa_iv *iv; 355 int s, irq = 0; 356 357 iv = &sc->sc_iv[irq]; 358 s = splraise(iv->iv_pri); 359 (iv->iv_handler)(iv->iv_arg); 360 splx(s); 361 362 return 0; 363 } 364 365 int 366 mg_eisa_iomap(void *v, bus_addr_t addr, bus_size_t size, int cacheable, 367 bus_space_handle_t *bshp) 368 { 369 struct mongoose_softc *sc = v; 370 371 /* see if it's ISA space we are mapping */ 372 if (0x100 <= addr && addr < 0x400) { 373 #define TOISA(a) ((((a) & 0x3f8) << 9) + ((a) & 7)) 374 size = TOISA(addr + size) - TOISA(addr); 375 addr = TOISA(addr); 376 } 377 378 return (sc->sc_bt->hbt_map)(NULL, sc->sc_iomap + addr, size, 379 cacheable, bshp); 380 } 381 382 int 383 mg_eisa_memmap(void *v, bus_addr_t addr, bus_size_t size, int cacheable, 384 bus_space_handle_t *bshp) 385 { 386 /* TODO: eisa memory map */ 387 return -1; 388 } 389 390 void 391 mg_eisa_memunmap(void *v, bus_space_handle_t bsh, bus_size_t size) 392 { 393 /* TODO: eisa memory unmap */ 394 } 395 396 void 397 mg_isa_barrier(void *v, bus_space_handle_t h, bus_size_t o, bus_size_t l, int op) 398 { 399 sync_caches(); 400 } 401 402 uint16_t 403 mg_isa_r2(void *v, bus_space_handle_t h, bus_size_t o) 404 { 405 uint16_t r = *((volatile uint16_t *)(h + o)); 406 407 return le16toh(r); 408 } 409 410 uint32_t 411 mg_isa_r4(void *v, bus_space_handle_t h, bus_size_t o) 412 { 413 uint32_t r = *((volatile uint32_t *)(h + o)); 414 415 return le32toh(r); 416 } 417 418 void 419 mg_isa_w2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv) 420 { 421 *((volatile uint16_t *)(h + o)) = htole16(vv); 422 } 423 424 void 425 mg_isa_w4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv) 426 { 427 *((volatile uint32_t *)(h + o)) = htole32(vv); 428 } 429 430 void 431 mg_isa_rm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c) 432 { 433 h += o; 434 while (c--) 435 *(a++) = le16toh(*(volatile uint16_t *)h); 436 } 437 438 void 439 mg_isa_rm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c) 440 { 441 h += o; 442 while (c--) 443 *(a++) = le32toh(*(volatile uint32_t *)h); 444 } 445 446 void 447 mg_isa_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c) 448 { 449 uint16_t r; 450 451 h += o; 452 while (c--) { 453 r = *(a++); 454 *(volatile uint16_t *)h = htole16(r); 455 } 456 } 457 458 void 459 mg_isa_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c) 460 { 461 uint32_t r; 462 463 h += o; 464 while (c--) { 465 r = *(a++); 466 *(volatile uint32_t *)h = htole32(r); 467 } 468 } 469 470 void 471 mg_isa_sm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c) 472 { 473 vv = htole16(vv); 474 h += o; 475 while (c--) 476 *(volatile uint16_t *)h = vv; 477 } 478 479 void 480 mg_isa_sm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c) 481 { 482 vv = htole32(vv); 483 h += o; 484 while (c--) 485 *(volatile uint32_t *)h = vv; 486 } 487 488 void 489 mg_isa_rr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c) 490 { 491 uint16_t r; 492 volatile uint16_t *p; 493 494 h += o; 495 p = (void *)h; 496 while (c--) { 497 r = *p++; 498 *a++ = le16toh(r); 499 } 500 } 501 502 void 503 mg_isa_rr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c) 504 { 505 uint32_t r; 506 volatile uint32_t *p; 507 508 h += o; 509 p = (void *)h; 510 while (c--) { 511 r = *p++; 512 *a++ = le32toh(r); 513 } 514 } 515 516 void 517 mg_isa_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c) 518 { 519 uint16_t r; 520 volatile uint16_t *p; 521 522 h += o; 523 p = (void *)h; 524 while (c--) { 525 r = *a++; 526 *p++ = htole16(r); 527 } 528 } 529 530 void 531 mg_isa_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c) 532 { 533 uint32_t r; 534 volatile uint32_t *p; 535 536 h += o; 537 p = (void *)h; 538 while (c--) { 539 r = *a++; 540 *p++ = htole32(r); 541 } 542 } 543 544 void 545 mg_isa_sr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c) 546 { 547 volatile uint16_t *p; 548 549 vv = htole16(vv); 550 h += o; 551 p = (void *)h; 552 while (c--) 553 *p++ = vv; 554 } 555 556 void 557 mg_isa_sr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c) 558 { 559 volatile uint32_t *p; 560 561 vv = htole32(vv); 562 h += o; 563 p = (void *)h; 564 while (c--) 565 *p++ = vv; 566 } 567 568 int 569 mgmatch(device_t parent, cfdata_t cf, void *aux) 570 { 571 struct confargs *ca = aux; 572 bus_space_handle_t ioh; 573 574 if (ca->ca_type.iodc_type != HPPA_TYPE_BHA || 575 ca->ca_type.iodc_sv_model != HPPA_BHA_EISA) 576 return 0; 577 578 if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_MONGOOSE, 579 sizeof(struct mongoose_regs), 0, &ioh)) 580 return 0; 581 582 /* XXX check EISA signature */ 583 584 bus_space_unmap(ca->ca_iot, ioh, sizeof(struct mongoose_regs)); 585 586 return 1; 587 } 588 589 void 590 mgattach(device_t parent, device_t self, void *aux) 591 { 592 struct confargs *ca = aux; 593 struct mongoose_softc *sc = device_private(self); 594 struct cpu_info *ci = &cpus[0]; 595 struct hppa_bus_space_tag *bt; 596 union mongoose_attach_args ea; 597 char brid[EISA_IDSTRINGLEN]; 598 bus_space_handle_t ioh; 599 600 sc->sc_dev = self; 601 sc->sc_bt = ca->ca_iot; 602 sc->sc_iomap = ca->ca_hpa; 603 if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_MONGOOSE, 604 sizeof(struct mongoose_regs), 0, &ioh)) { 605 aprint_error(": can't map registers\n"); 606 return; 607 } 608 sc->sc_regs = (struct mongoose_regs *)ioh; 609 610 if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_CTRL, 611 sizeof(struct mongoose_ctrl), 0, &ioh)) { 612 aprint_error(": can't map control registers\n"); 613 bus_space_unmap(ca->ca_iot, (bus_space_handle_t)sc->sc_regs, 614 sizeof(struct mongoose_regs)); 615 return; 616 } 617 618 ca->ca_irq = hppa_intr_allocate_bit(&ci->ci_ir, ca->ca_irq); 619 if (ca->ca_irq == HPPACF_IRQ_UNDEF) { 620 aprint_error(": can't allocate interrupt\n"); 621 return; 622 } 623 624 sc->sc_ctrl = (struct mongoose_ctrl *)ioh; 625 626 viper_eisa_en(); 627 628 /* BUS RESET */ 629 sc->sc_ctrl->nmi_ext = MONGOOSE_NMI_BUSRESET; 630 DELAY(1); 631 sc->sc_ctrl->nmi_ext = 0; 632 DELAY(100); 633 634 /* determine eisa board id */ 635 { 636 uint8_t id[4], *p; 637 /* XXX this is awful */ 638 p = (uint8_t *)(ioh + EISA_SLOTOFF_VID); 639 id[0] = *p++; 640 id[1] = *p++; 641 id[2] = *p++; 642 id[3] = *p++; 643 644 brid[0] = EISA_VENDID_0(id); 645 brid[1] = EISA_VENDID_1(id); 646 brid[2] = EISA_VENDID_2(id); 647 brid[3] = EISA_PRODID_0(id + 2); 648 brid[4] = EISA_PRODID_1(id + 2); 649 brid[5] = EISA_PRODID_2(id + 2); 650 brid[6] = EISA_PRODID_3(id + 2); 651 brid[7] = '\0'; 652 } 653 654 aprint_normal(": %s rev %d, %d MHz\n", brid, sc->sc_regs->version, 655 (sc->sc_regs->clock? 33 : 25)); 656 sc->sc_regs->liowait = 1; /* disable isa wait states */ 657 sc->sc_regs->lock = 1; /* bus unlock */ 658 659 /* attach EISA */ 660 sc->sc_ec.ec_v = sc; 661 sc->sc_ec.ec_attach_hook = mg_eisa_attach_hook; 662 sc->sc_ec.ec_intr_establish = mg_intr_establish; 663 sc->sc_ec.ec_intr_disestablish = mg_intr_disestablish; 664 sc->sc_ec.ec_intr_string = mg_intr_string; 665 sc->sc_ec.ec_intr_map = mg_intr_map; 666 667 /* inherit the bus tags for eisa from the mainbus */ 668 bt = &sc->sc_eiot; 669 memcpy(bt, ca->ca_iot, sizeof(*bt)); 670 bt->hbt_cookie = sc; 671 bt->hbt_map = mg_eisa_iomap; 672 #define R(n) bt->__CONCAT(hbt_,n) = &__CONCAT(mg_isa_,n) 673 /* R(barrier); */ 674 R(r2); R(r4); R(w2); R(w4); 675 R(rm_2);R(rm_4);R(wm_2);R(wm_4);R(sm_2);R(sm_4); 676 R(rr_2);R(rr_4);R(wr_2);R(wr_4);R(sr_2);R(sr_4); 677 678 bt = &sc->sc_ememt; 679 memcpy(bt, ca->ca_iot, sizeof(*bt)); 680 bt->hbt_cookie = sc; 681 bt->hbt_map = mg_eisa_memmap; 682 bt->hbt_unmap = mg_eisa_memunmap; 683 684 /* attachment guts */ 685 ea.mongoose_eisa.eba_iot = &sc->sc_eiot; 686 ea.mongoose_eisa.eba_memt = &sc->sc_ememt; 687 ea.mongoose_eisa.eba_dmat = NULL /* &sc->sc_edmat */; 688 ea.mongoose_eisa.eba_ec = &sc->sc_ec; 689 config_found_ia(self, "eisabus", &ea.mongoose_eisa, eisabusprint); 690 691 sc->sc_ic.ic_v = sc; 692 sc->sc_ic.ic_attach_hook = mg_isa_attach_hook; 693 sc->sc_ic.ic_detach_hook = mg_isa_detach_hook; 694 sc->sc_ic.ic_intr_establish = mg_intr_establish; 695 sc->sc_ic.ic_intr_disestablish = mg_intr_disestablish; 696 sc->sc_ic.ic_intr_check = mg_intr_check; 697 698 /* inherit the bus tags for isa from the eisa */ 699 bt = &sc->sc_imemt; 700 memcpy(bt, &sc->sc_ememt, sizeof(*bt)); 701 bt = &sc->sc_iiot; 702 memcpy(bt, &sc->sc_eiot, sizeof(*bt)); 703 704 /* TODO: DMA tags */ 705 706 /* attachment guts */ 707 ea.mongoose_isa.iba_iot = &sc->sc_iiot; 708 ea.mongoose_isa.iba_memt = &sc->sc_imemt; 709 #if NISADMA > 0 710 ea.mongoose_isa.iba_dmat = &sc->sc_idmat; 711 #endif 712 ea.mongoose_isa.iba_ic = &sc->sc_ic; 713 config_found_ia(self, "isabus", &ea.mongoose_isa, isabusprint); 714 #undef R 715 716 /* attach interrupt */ 717 sc->sc_ih = hppa_intr_establish(IPL_NONE, mg_intr, sc, &ci->ci_ir, 718 ca->ca_irq); 719 } 720
Indexes created Thu Oct 02 14:10:14 GMT 2025