sti_sgc.c revision 1.1.10.2
1 1.1.10.2 tls /* $NetBSD: sti_sgc.c,v 1.1.10.2 2014/08/20 00:03:04 tls Exp $ */ 2 1.1.10.2 tls 3 1.1.10.2 tls /* $OpenBSD: sti_sgc.c,v 1.38 2009/02/06 22:51:04 miod Exp $ */ 4 1.1.10.2 tls 5 1.1.10.2 tls /* 6 1.1.10.2 tls * Copyright (c) 2000-2003 Michael Shalayeff 7 1.1.10.2 tls * All rights reserved. 8 1.1.10.2 tls * 9 1.1.10.2 tls * Redistribution and use in source and binary forms, with or without 10 1.1.10.2 tls * modification, are permitted provided that the following conditions 11 1.1.10.2 tls * are met: 12 1.1.10.2 tls * 1. Redistributions of source code must retain the above copyright 13 1.1.10.2 tls * notice, this list of conditions and the following disclaimer. 14 1.1.10.2 tls * 2. Redistributions in binary form must reproduce the above copyright 15 1.1.10.2 tls * notice, this list of conditions and the following disclaimer in the 16 1.1.10.2 tls * documentation and/or other materials provided with the distribution. 17 1.1.10.2 tls * 18 1.1.10.2 tls * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 1.1.10.2 tls * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 1.1.10.2 tls * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 1.1.10.2 tls * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 22 1.1.10.2 tls * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 1.1.10.2 tls * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 1.1.10.2 tls * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 1.1.10.2 tls * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 1.1.10.2 tls * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 1.1.10.2 tls * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 1.1.10.2 tls * THE POSSIBILITY OF SUCH DAMAGE. 29 1.1.10.2 tls */ 30 1.1.10.2 tls /* 31 1.1.10.2 tls * These cards has to be known to work so far: 32 1.1.10.2 tls * - HPA1991AGrayscale rev 0.02 (705/35) (byte-wide) 33 1.1.10.2 tls * - HPA1991AC19 rev 0.02 (715/33) (byte-wide) 34 1.1.10.2 tls * - HPA208LC1280 rev 8.04 (712/80) just works 35 1.1.10.2 tls */ 36 1.1.10.2 tls 37 1.1.10.2 tls #include <sys/cdefs.h> 38 1.1.10.2 tls __KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.1.10.2 2014/08/20 00:03:04 tls Exp $"); 39 1.1.10.2 tls 40 1.1.10.2 tls #include "opt_cputype.h" 41 1.1.10.2 tls 42 1.1.10.2 tls #include <sys/param.h> 43 1.1.10.2 tls #include <sys/systm.h> 44 1.1.10.2 tls #include <sys/device.h> 45 1.1.10.2 tls 46 1.1.10.2 tls #include <uvm/uvm.h> 47 1.1.10.2 tls 48 1.1.10.2 tls #include <sys/bus.h> 49 1.1.10.2 tls #include <machine/cpu.h> 50 1.1.10.2 tls #include <machine/iomod.h> 51 1.1.10.2 tls #include <machine/autoconf.h> 52 1.1.10.2 tls 53 1.1.10.2 tls #include <dev/wscons/wsdisplayvar.h> 54 1.1.10.2 tls #include <dev/wscons/wsconsio.h> 55 1.1.10.2 tls 56 1.1.10.2 tls #include <dev/ic/stireg.h> 57 1.1.10.2 tls #include <dev/ic/stivar.h> 58 1.1.10.2 tls 59 1.1.10.2 tls #include <hppa/dev/cpudevs.h> 60 1.1.10.2 tls #include <hppa/hppa/machdep.h> 61 1.1.10.2 tls 62 1.1.10.2 tls #ifdef STIDEBUG 63 1.1.10.2 tls #define DPRINTF(s) do { \ 64 1.1.10.2 tls if (stidebug) \ 65 1.1.10.2 tls printf s; \ 66 1.1.10.2 tls } while(0) 67 1.1.10.2 tls 68 1.1.10.2 tls extern int stidebug; 69 1.1.10.2 tls #else 70 1.1.10.2 tls #define DPRINTF(s) /* */ 71 1.1.10.2 tls #endif 72 1.1.10.2 tls 73 1.1.10.2 tls #define STI_ROMSIZE (sizeof(struct sti_dd) * 4) 74 1.1.10.2 tls #define STI_ID_FDDI 0x280b31af /* Medusa FDDI ROM id */ 75 1.1.10.2 tls 76 1.1.10.2 tls /* gecko optional graphics */ 77 1.1.10.2 tls #define STI_GOPT1_REV 0x17 78 1.1.10.2 tls #define STI_GOPT2_REV 0x70 79 1.1.10.2 tls #define STI_GOPT3_REV 0xd0 80 1.1.10.2 tls #define STI_GOPT4_REV 0x00 81 1.1.10.2 tls #define STI_GOPT5_REV 0x20 82 1.1.10.2 tls #define STI_GOPT6_REV 0x40 83 1.1.10.2 tls #define STI_GOPT7_REV 0x30 84 1.1.10.2 tls 85 1.1.10.2 tls const char sti_sgc_opt[] = { 86 1.1.10.2 tls STI_GOPT1_REV, 87 1.1.10.2 tls STI_GOPT2_REV, 88 1.1.10.2 tls STI_GOPT3_REV, 89 1.1.10.2 tls STI_GOPT4_REV, 90 1.1.10.2 tls STI_GOPT5_REV, 91 1.1.10.2 tls STI_GOPT6_REV, 92 1.1.10.2 tls STI_GOPT7_REV 93 1.1.10.2 tls }; 94 1.1.10.2 tls 95 1.1.10.2 tls int sti_sgc_probe(device_t, cfdata_t, void *); 96 1.1.10.2 tls void sti_sgc_attach(device_t, device_t, void *); 97 1.1.10.2 tls 98 1.1.10.2 tls void sti_sgc_end_attach(device_t); 99 1.1.10.2 tls 100 1.1.10.2 tls extern struct cfdriver sti_cd; 101 1.1.10.2 tls 102 1.1.10.2 tls CFATTACH_DECL_NEW(sti_gedoens, sizeof(struct sti_softc), sti_sgc_probe, 103 1.1.10.2 tls sti_sgc_attach, NULL, NULL); 104 1.1.10.2 tls 105 1.1.10.2 tls paddr_t sti_sgc_getrom(struct confargs *); 106 1.1.10.2 tls 107 1.1.10.2 tls /* 108 1.1.10.2 tls * Locate STI ROM. 109 1.1.10.2 tls * On some machines it may not be part of the HPA space. 110 1.1.10.2 tls */ 111 1.1.10.2 tls paddr_t 112 1.1.10.2 tls sti_sgc_getrom(struct confargs *ca) 113 1.1.10.2 tls { 114 1.1.10.2 tls paddr_t rom; 115 1.1.10.2 tls int pagezero_cookie; 116 1.1.10.2 tls 117 1.1.10.2 tls pagezero_cookie = hppa_pagezero_map(); 118 1.1.10.2 tls rom = PAGE0->pd_resv2[1]; 119 1.1.10.2 tls hppa_pagezero_unmap(pagezero_cookie); 120 1.1.10.2 tls 121 1.1.10.2 tls if (ca->ca_type.iodc_sv_model == HPPA_FIO_GSGC) { 122 1.1.10.2 tls int i; 123 1.1.10.2 tls for (i = sizeof(sti_sgc_opt); i--; ) 124 1.1.10.2 tls if (sti_sgc_opt[i] == ca->ca_type.iodc_revision) 125 1.1.10.2 tls break; 126 1.1.10.2 tls if (i < 0) 127 1.1.10.2 tls rom = 0; 128 1.1.10.2 tls } 129 1.1.10.2 tls 130 1.1.10.2 tls if (rom < HPPA_IOBEGIN) { 131 1.1.10.2 tls if (ca->ca_naddrs > 0) 132 1.1.10.2 tls rom = ca->ca_addrs[0].addr; 133 1.1.10.2 tls else 134 1.1.10.2 tls rom = ca->ca_hpa; 135 1.1.10.2 tls } 136 1.1.10.2 tls 137 1.1.10.2 tls return rom; 138 1.1.10.2 tls } 139 1.1.10.2 tls 140 1.1.10.2 tls int 141 1.1.10.2 tls sti_sgc_probe(device_t parent, cfdata_t cf, void *aux) 142 1.1.10.2 tls { 143 1.1.10.2 tls struct confargs *ca = aux; 144 1.1.10.2 tls bus_space_handle_t romh; 145 1.1.10.2 tls paddr_t rom; 146 1.1.10.2 tls uint32_t id; 147 1.1.10.2 tls u_char devtype; 148 1.1.10.2 tls int rv = 0, romunmapped = 0; 149 1.1.10.2 tls 150 1.1.10.2 tls /* due to the graphic nature of this program do probe only one */ 151 1.1.10.2 tls if (cf->cf_unit > sti_cd.cd_ndevs) 152 1.1.10.2 tls return 0; 153 1.1.10.2 tls 154 1.1.10.2 tls if (ca->ca_type.iodc_type != HPPA_TYPE_FIO) 155 1.1.10.2 tls return 0; 156 1.1.10.2 tls 157 1.1.10.2 tls /* these need further checking for the graphics id */ 158 1.1.10.2 tls if (ca->ca_type.iodc_sv_model != HPPA_FIO_GSGC && 159 1.1.10.2 tls ca->ca_type.iodc_sv_model != HPPA_FIO_SGC) 160 1.1.10.2 tls return 0; 161 1.1.10.2 tls 162 1.1.10.2 tls rom = sti_sgc_getrom(ca); 163 1.1.10.2 tls DPRINTF(("%s: hpa=%x, rom=%x\n", __func__, (uint)ca->ca_hpa, 164 1.1.10.2 tls (uint)rom)); 165 1.1.10.2 tls 166 1.1.10.2 tls /* if it does not map, probably part of the lasi space */ 167 1.1.10.2 tls if ((rv = bus_space_map(ca->ca_iot, rom, STI_ROMSIZE, 0, &romh))) { 168 1.1.10.2 tls DPRINTF(("%s: can't map rom space (%d)\n", __func__, rv)); 169 1.1.10.2 tls 170 1.1.10.2 tls if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN) { 171 1.1.10.2 tls romh = rom; 172 1.1.10.2 tls romunmapped++; 173 1.1.10.2 tls } else { 174 1.1.10.2 tls /* in this case nobody has no freaking idea */ 175 1.1.10.2 tls return 0; 176 1.1.10.2 tls } 177 1.1.10.2 tls } 178 1.1.10.2 tls 179 1.1.10.2 tls devtype = bus_space_read_1(ca->ca_iot, romh, 3); 180 1.1.10.2 tls 181 1.1.10.2 tls DPRINTF(("%s: devtype=%d\n", __func__, devtype)); 182 1.1.10.2 tls rv = 1; 183 1.1.10.2 tls switch (devtype) { 184 1.1.10.2 tls case STI_DEVTYPE4: 185 1.1.10.2 tls id = bus_space_read_4(ca->ca_iot, romh, STI_DEV4_DD_GRID); 186 1.1.10.2 tls break; 187 1.1.10.2 tls case STI_DEVTYPE1: 188 1.1.10.2 tls id = (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID 189 1.1.10.2 tls + 3) << 24) | 190 1.1.10.2 tls (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID 191 1.1.10.2 tls + 7) << 16) | 192 1.1.10.2 tls (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID 193 1.1.10.2 tls + 11) << 8) | 194 1.1.10.2 tls (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID 195 1.1.10.2 tls + 15)); 196 1.1.10.2 tls break; 197 1.1.10.2 tls default: 198 1.1.10.2 tls DPRINTF(("%s: unknown type (%x)\n", __func__, devtype)); 199 1.1.10.2 tls rv = 0; 200 1.1.10.2 tls } 201 1.1.10.2 tls 202 1.1.10.2 tls if (rv && 203 1.1.10.2 tls ca->ca_type.iodc_sv_model == HPPA_FIO_SGC && id == STI_ID_FDDI) { 204 1.1.10.2 tls DPRINTF(("%s: not a graphics device\n", __func__)); 205 1.1.10.2 tls rv = 0; 206 1.1.10.2 tls } 207 1.1.10.2 tls 208 1.1.10.2 tls if (ca->ca_naddrs >= sizeof(ca->ca_addrs) / sizeof(ca->ca_addrs[0])) { 209 1.1.10.2 tls printf("sti: address list overflow\n"); 210 1.1.10.2 tls return 0; 211 1.1.10.2 tls } 212 1.1.10.2 tls 213 1.1.10.2 tls ca->ca_addrs[ca->ca_naddrs].addr = rom; 214 1.1.10.2 tls ca->ca_addrs[ca->ca_naddrs].size = sti_rom_size(ca->ca_iot, romh); 215 1.1.10.2 tls ca->ca_naddrs++; 216 1.1.10.2 tls 217 1.1.10.2 tls if (!romunmapped) 218 1.1.10.2 tls bus_space_unmap(ca->ca_iot, romh, STI_ROMSIZE); 219 1.1.10.2 tls return rv; 220 1.1.10.2 tls } 221 1.1.10.2 tls 222 1.1.10.2 tls void 223 1.1.10.2 tls sti_sgc_attach(device_t parent, device_t self, void *aux) 224 1.1.10.2 tls { 225 1.1.10.2 tls struct sti_softc *sc = device_private(self); 226 1.1.10.2 tls struct confargs *ca = aux; 227 1.1.10.2 tls bus_space_handle_t romh; 228 1.1.10.2 tls hppa_hpa_t consaddr; 229 1.1.10.2 tls int pagezero_cookie; 230 1.1.10.2 tls paddr_t rom; 231 1.1.10.2 tls uint32_t romlen; 232 1.1.10.2 tls int rv; 233 1.1.10.2 tls int i; 234 1.1.10.2 tls 235 1.1.10.2 tls pagezero_cookie = hppa_pagezero_map(); 236 1.1.10.2 tls consaddr = (hppa_hpa_t)PAGE0->mem_cons.pz_hpa; 237 1.1.10.2 tls hppa_pagezero_unmap(pagezero_cookie); 238 1.1.10.2 tls 239 1.1.10.2 tls sc->sc_dev = self; 240 1.1.10.2 tls sc->sc_enable_rom = NULL; 241 1.1.10.2 tls sc->sc_disable_rom = NULL; 242 1.1.10.2 tls 243 1.1.10.2 tls /* we stashed rom addr/len into the last slot during probe */ 244 1.1.10.2 tls rom = ca->ca_addrs[ca->ca_naddrs - 1].addr; 245 1.1.10.2 tls romlen = ca->ca_addrs[ca->ca_naddrs - 1].size; 246 1.1.10.2 tls 247 1.1.10.2 tls if ((rv = bus_space_map(ca->ca_iot, rom, romlen, 0, &romh))) { 248 1.1.10.2 tls if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN) 249 1.1.10.2 tls romh = rom; 250 1.1.10.2 tls else { 251 1.1.10.2 tls aprint_error(": can't map rom space (%d)\n", rv); 252 1.1.10.2 tls return; 253 1.1.10.2 tls } 254 1.1.10.2 tls } 255 1.1.10.2 tls 256 1.1.10.2 tls sc->bases[0] = romh; 257 1.1.10.2 tls for (i = 1; i < STI_REGION_MAX; i++) 258 1.1.10.2 tls sc->bases[i] = ca->ca_hpa; 259 1.1.10.2 tls 260 1.1.10.2 tls #ifdef HP7300LC_CPU 261 1.1.10.2 tls /* 262 1.1.10.2 tls * PCXL2: enable accel I/O for this space, see PCX-L2 ERS "ACCEL_IO". 263 1.1.10.2 tls * "pcxl2_ers.{ps,pdf}", (section / chapter . rel. page / abs. page) 264 1.1.10.2 tls * 8.7.4 / 8-12 / 92, 11.3.14 / 11-14 / 122 and 14.8 / 14-5 / 203. 265 1.1.10.2 tls */ 266 1.1.10.2 tls if (hppa_cpu_info->hci_cputype == hpcxl2 267 1.1.10.2 tls && ca->ca_hpa >= PCXL2_ACCEL_IO_START 268 1.1.10.2 tls && ca->ca_hpa <= PCXL2_ACCEL_IO_END) 269 1.1.10.2 tls eaio_l2(PCXL2_ACCEL_IO_ADDR2MASK(ca->ca_hpa)); 270 1.1.10.2 tls #endif /* HP7300LC_CPU */ 271 1.1.10.2 tls 272 1.1.10.2 tls if (ca->ca_hpa == consaddr) 273 1.1.10.2 tls sc->sc_flags |= STI_CONSOLE; 274 1.1.10.2 tls if (sti_attach_common(sc, ca->ca_iot, ca->ca_iot, romh, 275 1.1.10.2 tls STI_CODEBASE_PA) == 0) 276 1.1.10.2 tls config_interrupts(self, sti_sgc_end_attach); 277 1.1.10.2 tls } 278 1.1.10.2 tls 279 1.1.10.2 tls void 280 1.1.10.2 tls sti_sgc_end_attach(device_t dev) 281 1.1.10.2 tls { 282 1.1.10.2 tls struct sti_softc *sc = device_private(dev); 283 1.1.10.2 tls 284 1.1.10.2 tls sti_end_attach(sc); 285 1.1.10.2 tls } 286
Indexes created Sun Oct 26 20:09:54 GMT 2025