if_ie_gsc.c revision 1.1.10.2
1 1.1.10.2 tls /* $NetBSD: if_ie_gsc.c,v 1.1.10.2 2014/08/20 00:03:04 tls Exp $ */ 2 1.1.10.2 tls 3 1.1.10.2 tls /* $OpenBSD: if_ie_gsc.c,v 1.6 2001/01/12 22:57:04 mickey Exp $ */ 4 1.1.10.2 tls 5 1.1.10.2 tls /* 6 1.1.10.2 tls * Copyright (c) 1998-2004 Michael Shalayeff 7 1.1.10.2 tls * All rights reserved. 8 1.1.10.2 tls * 9 1.1.10.2 tls * Redistribution and use in source and binary forms, with or without 10 1.1.10.2 tls * modification, are permitted provided that the following conditions 11 1.1.10.2 tls * are met: 12 1.1.10.2 tls * 1. Redistributions of source code must retain the above copyright 13 1.1.10.2 tls * notice, this list of conditions and the following disclaimer. 14 1.1.10.2 tls * 2. Redistributions in binary form must reproduce the above copyright 15 1.1.10.2 tls * notice, this list of conditions and the following disclaimer in the 16 1.1.10.2 tls * documentation and/or other materials provided with the distribution. 17 1.1.10.2 tls * 18 1.1.10.2 tls * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 1.1.10.2 tls * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 1.1.10.2 tls * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 1.1.10.2 tls * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 22 1.1.10.2 tls * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 1.1.10.2 tls * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 1.1.10.2 tls * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 1.1.10.2 tls * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 1.1.10.2 tls * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 1.1.10.2 tls * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 1.1.10.2 tls * THE POSSIBILITY OF SUCH DAMAGE. 29 1.1.10.2 tls */ 30 1.1.10.2 tls 31 1.1.10.2 tls /* 32 1.1.10.2 tls * Referencies: 33 1.1.10.2 tls * 1. 82596DX and 82596SX High-Perfomance 32-bit Local Area Network Coprocessor 34 1.1.10.2 tls * Intel Corporation, November 1996, Order Number: 290219-006 35 1.1.10.2 tls * 36 1.1.10.2 tls * 2. 712 I/O Subsystem ERS Rev 1.0 37 1.1.10.2 tls * Hewlett-Packard, June 17 1992, Dwg No. A-A2263-66510-31 38 1.1.10.2 tls */ 39 1.1.10.2 tls 40 1.1.10.2 tls #include <sys/cdefs.h> 41 1.1.10.2 tls __KERNEL_RCSID(0, "$NetBSD: if_ie_gsc.c,v 1.1.10.2 2014/08/20 00:03:04 tls Exp $"); 42 1.1.10.2 tls 43 1.1.10.2 tls #include <sys/param.h> 44 1.1.10.2 tls #include <sys/systm.h> 45 1.1.10.2 tls #include <sys/device.h> 46 1.1.10.2 tls #include <sys/socket.h> 47 1.1.10.2 tls #include <sys/sockio.h> 48 1.1.10.2 tls 49 1.1.10.2 tls #include <uvm/uvm_extern.h> 50 1.1.10.2 tls 51 1.1.10.2 tls #include <net/if.h> 52 1.1.10.2 tls #include <net/if_dl.h> 53 1.1.10.2 tls #include <net/if_ether.h> 54 1.1.10.2 tls #include <net/if_types.h> 55 1.1.10.2 tls #include <net/if_media.h> 56 1.1.10.2 tls 57 1.1.10.2 tls #include <netinet/in.h> 58 1.1.10.2 tls 59 1.1.10.2 tls #include <sys/bus.h> 60 1.1.10.2 tls #include <machine/intr.h> 61 1.1.10.2 tls #include <machine/iomod.h> 62 1.1.10.2 tls #include <machine/autoconf.h> 63 1.1.10.2 tls 64 1.1.10.2 tls #include <hppa/dev/cpudevs.h> 65 1.1.10.2 tls #include <hppa/gsc/gscbusvar.h> 66 1.1.10.2 tls #include <hppa/hppa/machdep.h> 67 1.1.10.2 tls 68 1.1.10.2 tls #include <dev/ic/i82586reg.h> 69 1.1.10.2 tls #include <dev/ic/i82586var.h> 70 1.1.10.2 tls 71 1.1.10.2 tls #define I82596_DEBUG I82586_DEBUG 72 1.1.10.2 tls 73 1.1.10.2 tls #ifdef __for_reference_only 74 1.1.10.2 tls struct ie_gsc_regs { 75 1.1.10.2 tls uint32_t ie_reset; 76 1.1.10.2 tls uint32_t ie_port; 77 1.1.10.2 tls uint32_t ie_attn; 78 1.1.10.2 tls }; 79 1.1.10.2 tls #endif 80 1.1.10.2 tls 81 1.1.10.2 tls #define IE_GSC_BANK_SZ (12) 82 1.1.10.2 tls #define IE_GSC_REG_RESET (0) 83 1.1.10.2 tls #define IE_GSC_REG_PORT (4) 84 1.1.10.2 tls #define IE_GSC_REG_ATTN (8) 85 1.1.10.2 tls 86 1.1.10.2 tls #define IE_GSC_ALIGN(v) ((((u_int) (v)) + 0xf) & ~0xf) 87 1.1.10.2 tls 88 1.1.10.2 tls #define IE_GSC_SYSBUS (IE_SYSBUS_596_RSVD_SET | \ 89 1.1.10.2 tls IE_SYSBUS_596_82586 | \ 90 1.1.10.2 tls IE_SYSBUS_596_INTLOW | \ 91 1.1.10.2 tls IE_SYSBUS_596_TRGEXT | \ 92 1.1.10.2 tls IE_SYSBUS_596_BE) 93 1.1.10.2 tls 94 1.1.10.2 tls #define IE_SIZE 0x8000 95 1.1.10.2 tls 96 1.1.10.2 tls struct ie_gsc_softc { 97 1.1.10.2 tls struct ie_softc ie; 98 1.1.10.2 tls 99 1.1.10.2 tls /* tag and handle to hppa-specific adapter registers. */ 100 1.1.10.2 tls bus_space_tag_t iot; 101 1.1.10.2 tls bus_space_handle_t ioh; 102 1.1.10.2 tls 103 1.1.10.2 tls /* bus_dma_tag_t for the memory used by the adapter. */ 104 1.1.10.2 tls bus_dma_tag_t iemt; 105 1.1.10.2 tls 106 1.1.10.2 tls /* interrupt handle. */ 107 1.1.10.2 tls void *sc_ih; 108 1.1.10.2 tls 109 1.1.10.2 tls /* miscellaneous flags. */ 110 1.1.10.2 tls int flags; 111 1.1.10.2 tls #define IEGSC_GECKO (1 << 0) 112 1.1.10.2 tls }; 113 1.1.10.2 tls 114 1.1.10.2 tls int ie_gsc_probe(device_t, cfdata_t, void *); 115 1.1.10.2 tls void ie_gsc_attach(device_t, device_t, void *); 116 1.1.10.2 tls 117 1.1.10.2 tls CFATTACH_DECL_NEW(ie_gsc, sizeof(struct ie_gsc_softc), 118 1.1.10.2 tls ie_gsc_probe, ie_gsc_attach, NULL, NULL); 119 1.1.10.2 tls 120 1.1.10.2 tls static int ie_gsc_media[] = { 121 1.1.10.2 tls IFM_ETHER | IFM_10_2, 122 1.1.10.2 tls }; 123 1.1.10.2 tls #define IE_NMEDIA (sizeof(ie_gsc_media) / sizeof(ie_gsc_media[0])) 124 1.1.10.2 tls 125 1.1.10.2 tls void ie_gsc_reset(struct ie_softc *, int); 126 1.1.10.2 tls void ie_gsc_attend(struct ie_softc *, int); 127 1.1.10.2 tls void ie_gsc_run(struct ie_softc *); 128 1.1.10.2 tls void ie_gsc_port(struct ie_softc *, u_int); 129 1.1.10.2 tls uint16_t ie_gsc_read16(struct ie_softc *, int); 130 1.1.10.2 tls void ie_gsc_write16(struct ie_softc *, int, uint16_t); 131 1.1.10.2 tls void ie_gsc_write24(struct ie_softc *, int, int); 132 1.1.10.2 tls void ie_gsc_memcopyin(struct ie_softc *, void *, int, size_t); 133 1.1.10.2 tls void ie_gsc_memcopyout(struct ie_softc *, const void *, int, size_t); 134 1.1.10.2 tls 135 1.1.10.2 tls 136 1.1.10.2 tls /* Reset the adapter. */ 137 1.1.10.2 tls void 138 1.1.10.2 tls ie_gsc_reset(struct ie_softc *sc, int what) 139 1.1.10.2 tls { 140 1.1.10.2 tls struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 141 1.1.10.2 tls int i; 142 1.1.10.2 tls 143 1.1.10.2 tls switch (what) { 144 1.1.10.2 tls case CHIP_PROBE: 145 1.1.10.2 tls bus_space_write_4(gsc->iot, gsc->ioh, IE_GSC_REG_RESET, 0); 146 1.1.10.2 tls break; 147 1.1.10.2 tls 148 1.1.10.2 tls case CARD_RESET: 149 1.1.10.2 tls bus_space_write_4(gsc->iot, gsc->ioh, IE_GSC_REG_RESET, 0); 150 1.1.10.2 tls 151 1.1.10.2 tls /* 152 1.1.10.2 tls * per [2] 4.6.2.1 153 1.1.10.2 tls * delay for 10 system clocks + 5 transmit clocks, 154 1.1.10.2 tls * NB: works for system clocks over 10MHz 155 1.1.10.2 tls */ 156 1.1.10.2 tls DELAY(1000); 157 1.1.10.2 tls 158 1.1.10.2 tls /* 159 1.1.10.2 tls * after the hardware reset: 160 1.1.10.2 tls * inform i825[89]6 about new SCP address, 161 1.1.10.2 tls * which must be at least 16-byte aligned 162 1.1.10.2 tls */ 163 1.1.10.2 tls ie_gsc_port(sc, IE_PORT_ALT_SCP); 164 1.1.10.2 tls ie_gsc_attend(sc, what); 165 1.1.10.2 tls 166 1.1.10.2 tls for (i = 9000; i-- && ie_gsc_read16(sc, IE_ISCP_BUSY(sc->iscp)); 167 1.1.10.2 tls DELAY(100)) 168 1.1.10.2 tls pdcache(0, (vaddr_t)sc->sc_maddr + sc->iscp, IE_ISCP_SZ); 169 1.1.10.2 tls 170 1.1.10.2 tls #if I82596_DEBUG 171 1.1.10.2 tls if (i < 0) { 172 1.1.10.2 tls printf("timeout for PORT command (%x)%s\n", 173 1.1.10.2 tls ie_gsc_read16(sc, IE_ISCP_BUSY(sc->iscp)), 174 1.1.10.2 tls (gsc->flags & IEGSC_GECKO)? " on gecko":""); 175 1.1.10.2 tls return; 176 1.1.10.2 tls } 177 1.1.10.2 tls #endif 178 1.1.10.2 tls break; 179 1.1.10.2 tls } 180 1.1.10.2 tls } 181 1.1.10.2 tls 182 1.1.10.2 tls /* Do a channel attention on the adapter. */ 183 1.1.10.2 tls void 184 1.1.10.2 tls ie_gsc_attend(struct ie_softc *sc, int why) 185 1.1.10.2 tls { 186 1.1.10.2 tls struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 187 1.1.10.2 tls 188 1.1.10.2 tls bus_space_write_4(gsc->iot, gsc->ioh, IE_GSC_REG_ATTN, 0); 189 1.1.10.2 tls } 190 1.1.10.2 tls 191 1.1.10.2 tls /* Enable the adapter. */ 192 1.1.10.2 tls void 193 1.1.10.2 tls ie_gsc_run(struct ie_softc *sc) 194 1.1.10.2 tls { 195 1.1.10.2 tls } 196 1.1.10.2 tls 197 1.1.10.2 tls /* Run an i82596 PORT command on the adapter. */ 198 1.1.10.2 tls void 199 1.1.10.2 tls ie_gsc_port(struct ie_softc *sc, u_int cmd) 200 1.1.10.2 tls { 201 1.1.10.2 tls struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 202 1.1.10.2 tls 203 1.1.10.2 tls switch (cmd) { 204 1.1.10.2 tls case IE_PORT_RESET: 205 1.1.10.2 tls case IE_PORT_DUMP: 206 1.1.10.2 tls break; 207 1.1.10.2 tls case IE_PORT_SELF_TEST: 208 1.1.10.2 tls cmd |= (sc->sc_dmamap->dm_segs[0].ds_addr + 0); 209 1.1.10.2 tls break; 210 1.1.10.2 tls case IE_PORT_ALT_SCP: 211 1.1.10.2 tls cmd |= (sc->sc_dmamap->dm_segs[0].ds_addr + sc->scp); 212 1.1.10.2 tls break; 213 1.1.10.2 tls } 214 1.1.10.2 tls 215 1.1.10.2 tls if (gsc->flags & IEGSC_GECKO) { 216 1.1.10.2 tls bus_space_write_4(gsc->iot, gsc->ioh, 217 1.1.10.2 tls IE_GSC_REG_PORT, (cmd & 0xffff)); 218 1.1.10.2 tls DELAY(1000); 219 1.1.10.2 tls bus_space_write_4(gsc->iot, gsc->ioh, 220 1.1.10.2 tls IE_GSC_REG_PORT, (cmd >> 16)); 221 1.1.10.2 tls DELAY(1000); 222 1.1.10.2 tls } else { 223 1.1.10.2 tls bus_space_write_4(gsc->iot, gsc->ioh, 224 1.1.10.2 tls IE_GSC_REG_PORT, (cmd >> 16)); 225 1.1.10.2 tls DELAY(1000); 226 1.1.10.2 tls bus_space_write_4(gsc->iot, gsc->ioh, 227 1.1.10.2 tls IE_GSC_REG_PORT, (cmd & 0xffff)); 228 1.1.10.2 tls DELAY(1000); 229 1.1.10.2 tls } 230 1.1.10.2 tls } 231 1.1.10.2 tls 232 1.1.10.2 tls uint16_t 233 1.1.10.2 tls ie_gsc_read16(struct ie_softc *sc, int offset) 234 1.1.10.2 tls { 235 1.1.10.2 tls uint16_t val; 236 1.1.10.2 tls 237 1.1.10.2 tls __asm volatile( 238 1.1.10.2 tls " ldh 0(%1), %0 \n" 239 1.1.10.2 tls " fdc %%r0(%1) \n" 240 1.1.10.2 tls : "=&r" (val) 241 1.1.10.2 tls : "r" ((char *)sc->sc_maddr + offset)); 242 1.1.10.2 tls return (val); 243 1.1.10.2 tls } 244 1.1.10.2 tls 245 1.1.10.2 tls void 246 1.1.10.2 tls ie_gsc_write16(struct ie_softc *sc, int offset, uint16_t v) 247 1.1.10.2 tls { 248 1.1.10.2 tls 249 1.1.10.2 tls __asm volatile( 250 1.1.10.2 tls " sth %0, 0(%1) \n" 251 1.1.10.2 tls " fdc %%r0(%1) \n" 252 1.1.10.2 tls : /* no outputs */ 253 1.1.10.2 tls : "r" (v), "r" ((char *)sc->sc_maddr + offset)); 254 1.1.10.2 tls } 255 1.1.10.2 tls 256 1.1.10.2 tls void 257 1.1.10.2 tls ie_gsc_write24(struct ie_softc *sc, int offset, int addr) 258 1.1.10.2 tls { 259 1.1.10.2 tls 260 1.1.10.2 tls /* 261 1.1.10.2 tls * i82586.c assumes that the chip address space starts at 262 1.1.10.2 tls * zero, so we have to add in the appropriate offset here. 263 1.1.10.2 tls */ 264 1.1.10.2 tls addr += sc->sc_dmamap->dm_segs[0].ds_addr; 265 1.1.10.2 tls __asm volatile( 266 1.1.10.2 tls " ldi 2, %%r21 \n" 267 1.1.10.2 tls " extru %0, 15, 16, %%r22 \n" 268 1.1.10.2 tls " sth %0, 0(%1) \n" 269 1.1.10.2 tls " sth %%r22, 2(%1) \n" 270 1.1.10.2 tls " fdc %%r0(%1) \n" 271 1.1.10.2 tls " fdc %%r21(%1) \n" 272 1.1.10.2 tls : /* No outputs */ 273 1.1.10.2 tls : "r" (addr), "r" ((char *)sc->sc_maddr + offset) 274 1.1.10.2 tls : "r21", "r22"); 275 1.1.10.2 tls } 276 1.1.10.2 tls 277 1.1.10.2 tls void 278 1.1.10.2 tls ie_gsc_memcopyin(struct ie_softc *sc, void *p, int offset, size_t size) 279 1.1.10.2 tls { 280 1.1.10.2 tls struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 281 1.1.10.2 tls 282 1.1.10.2 tls if (size == 0) 283 1.1.10.2 tls return; 284 1.1.10.2 tls 285 1.1.10.2 tls memcpy(p, (char *)sc->sc_maddr + offset, size); 286 1.1.10.2 tls bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, offset, size, 287 1.1.10.2 tls BUS_DMASYNC_PREREAD); 288 1.1.10.2 tls hppa_led_blink(HPPA_LED_NETRCV); 289 1.1.10.2 tls } 290 1.1.10.2 tls 291 1.1.10.2 tls void 292 1.1.10.2 tls ie_gsc_memcopyout(struct ie_softc *sc, const void *p, int offset, size_t size) 293 1.1.10.2 tls { 294 1.1.10.2 tls struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 295 1.1.10.2 tls 296 1.1.10.2 tls if (size == 0) 297 1.1.10.2 tls return; 298 1.1.10.2 tls 299 1.1.10.2 tls memcpy((char *)sc->sc_maddr + offset, p, size); 300 1.1.10.2 tls bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, offset, size, 301 1.1.10.2 tls BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 302 1.1.10.2 tls hppa_led_blink(HPPA_LED_NETSND); 303 1.1.10.2 tls } 304 1.1.10.2 tls 305 1.1.10.2 tls /* 306 1.1.10.2 tls * i82596 probe routine 307 1.1.10.2 tls */ 308 1.1.10.2 tls int i82596_probe(struct ie_softc *); 309 1.1.10.2 tls int 310 1.1.10.2 tls i82596_probe(struct ie_softc *sc) 311 1.1.10.2 tls { 312 1.1.10.2 tls struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 313 1.1.10.2 tls int i; 314 1.1.10.2 tls 315 1.1.10.2 tls /* Set up the SCP. */ 316 1.1.10.2 tls sc->ie_bus_write16(sc, IE_SCP_BUS_USE(sc->scp), IE_GSC_SYSBUS); 317 1.1.10.2 tls sc->ie_bus_write24(sc, IE_SCP_ISCP(sc->scp), sc->iscp); 318 1.1.10.2 tls 319 1.1.10.2 tls /* Set up the ISCP. */ 320 1.1.10.2 tls sc->ie_bus_write16(sc, IE_ISCP_SCB(sc->iscp), sc->scb); 321 1.1.10.2 tls sc->ie_bus_write24(sc, IE_ISCP_BASE(sc->iscp), 0); 322 1.1.10.2 tls 323 1.1.10.2 tls /* Set BUSY in the ISCP. */ 324 1.1.10.2 tls sc->ie_bus_write16(sc, IE_ISCP_BUSY(sc->iscp), 1); 325 1.1.10.2 tls 326 1.1.10.2 tls /* Reset the adapter. */ 327 1.1.10.2 tls bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, 0, sc->sc_msize, 328 1.1.10.2 tls BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 329 1.1.10.2 tls sc->hwreset(sc, CARD_RESET); 330 1.1.10.2 tls 331 1.1.10.2 tls /* Make sure that BUSY got cleared. */ 332 1.1.10.2 tls if (sc->ie_bus_read16(sc, IE_ISCP_BUSY(sc->iscp))) { 333 1.1.10.2 tls #if I82596_DEBUG 334 1.1.10.2 tls printf ("%s: ISCP set failed\n", device_xname(sc->sc_dev)); 335 1.1.10.2 tls #endif 336 1.1.10.2 tls return 0; 337 1.1.10.2 tls } 338 1.1.10.2 tls 339 1.1.10.2 tls /* Run the chip self-test. */ 340 1.1.10.2 tls sc->ie_bus_write24(sc, 0, -sc->sc_dmamap->dm_segs[0].ds_addr); 341 1.1.10.2 tls sc->ie_bus_write24(sc, 4, -(sc->sc_dmamap->dm_segs[0].ds_addr + 1)); 342 1.1.10.2 tls bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, 0, sc->sc_msize, 343 1.1.10.2 tls BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 344 1.1.10.2 tls ie_gsc_port(sc, IE_PORT_SELF_TEST); 345 1.1.10.2 tls for (i = 9000; i-- && 346 1.1.10.2 tls sc->ie_bus_read16(sc, 4); 347 1.1.10.2 tls DELAY(100)) 348 1.1.10.2 tls pdcache(0, (vaddr_t)sc->sc_maddr, sc->sc_msize); 349 1.1.10.2 tls 350 1.1.10.2 tls #if I82596_DEBUG 351 1.1.10.2 tls printf (": test %x:%x\n%s", 352 1.1.10.2 tls *((volatile int32_t *)((char *)sc->sc_maddr + 0)), 353 1.1.10.2 tls *((volatile int32_t *)((char *)sc->sc_maddr + 4)), 354 1.1.10.2 tls device_xname(sc->sc_dev)); 355 1.1.10.2 tls #endif 356 1.1.10.2 tls return 1; 357 1.1.10.2 tls } 358 1.1.10.2 tls 359 1.1.10.2 tls int 360 1.1.10.2 tls ie_gsc_probe(device_t parent, cfdata_t match, void *aux) 361 1.1.10.2 tls { 362 1.1.10.2 tls struct gsc_attach_args *ga = aux; 363 1.1.10.2 tls 364 1.1.10.2 tls if (ga->ga_type.iodc_type != HPPA_TYPE_FIO || 365 1.1.10.2 tls (ga->ga_type.iodc_sv_model != HPPA_FIO_LAN && 366 1.1.10.2 tls ga->ga_type.iodc_sv_model != HPPA_FIO_GLAN)) 367 1.1.10.2 tls return 0; 368 1.1.10.2 tls 369 1.1.10.2 tls return 1; 370 1.1.10.2 tls } 371 1.1.10.2 tls 372 1.1.10.2 tls void 373 1.1.10.2 tls ie_gsc_attach(device_t parent, device_t self, void *aux) 374 1.1.10.2 tls { 375 1.1.10.2 tls struct ie_gsc_softc *gsc = device_private(self); 376 1.1.10.2 tls struct ie_softc *sc = &gsc->ie; 377 1.1.10.2 tls struct gsc_attach_args *ga = aux; 378 1.1.10.2 tls bus_dma_segment_t seg; 379 1.1.10.2 tls int rseg; 380 1.1.10.2 tls int rv; 381 1.1.10.2 tls uint8_t myaddr[ETHER_ADDR_LEN]; 382 1.1.10.2 tls #ifdef PMAPDEBUG 383 1.1.10.2 tls extern int pmapdebug; 384 1.1.10.2 tls int opmapdebug = pmapdebug; 385 1.1.10.2 tls pmapdebug = 0; 386 1.1.10.2 tls #endif 387 1.1.10.2 tls 388 1.1.10.2 tls if (ga->ga_type.iodc_sv_model == HPPA_FIO_GLAN) 389 1.1.10.2 tls gsc->flags |= IEGSC_GECKO; 390 1.1.10.2 tls 391 1.1.10.2 tls /* 392 1.1.10.2 tls * Map the GSC registers. 393 1.1.10.2 tls */ 394 1.1.10.2 tls if (bus_space_map(ga->ga_iot, ga->ga_hpa, 395 1.1.10.2 tls IE_GSC_BANK_SZ, 0, &gsc->ioh)) { 396 1.1.10.2 tls printf(": can't map i/o space\n"); 397 1.1.10.2 tls return; 398 1.1.10.2 tls } 399 1.1.10.2 tls 400 1.1.10.2 tls /* Set up some initial glue. */ 401 1.1.10.2 tls sc->sc_dev = self; 402 1.1.10.2 tls gsc->iot = ga->ga_iot; 403 1.1.10.2 tls gsc->iemt = ga->ga_dmatag; 404 1.1.10.2 tls sc->bt = ga->ga_iot; 405 1.1.10.2 tls sc->sc_msize = IE_SIZE; 406 1.1.10.2 tls 407 1.1.10.2 tls /* 408 1.1.10.2 tls * Allocate one contiguous segment of physical memory 409 1.1.10.2 tls * to be used with the i82596. Since we're running the 410 1.1.10.2 tls * chip in i82586 mode, we're restricted to 24-bit 411 1.1.10.2 tls * physical addresses. 412 1.1.10.2 tls */ 413 1.1.10.2 tls if (bus_dmamem_alloc(gsc->iemt, sc->sc_msize, PAGE_SIZE, 0, 414 1.1.10.2 tls &seg, 1, &rseg, BUS_DMA_NOWAIT | BUS_DMA_24BIT)) { 415 1.1.10.2 tls printf (": can't allocate %d bytes of DMA memory\n", 416 1.1.10.2 tls sc->sc_msize); 417 1.1.10.2 tls return; 418 1.1.10.2 tls } 419 1.1.10.2 tls 420 1.1.10.2 tls /* 421 1.1.10.2 tls * Map that physical memory into kernel virtual space. 422 1.1.10.2 tls */ 423 1.1.10.2 tls if (bus_dmamem_map(gsc->iemt, &seg, rseg, sc->sc_msize, 424 1.1.10.2 tls (void **)&sc->sc_maddr, BUS_DMA_NOWAIT)) { 425 1.1.10.2 tls printf (": can't map DMA memory\n"); 426 1.1.10.2 tls bus_dmamem_free(gsc->iemt, &seg, rseg); 427 1.1.10.2 tls return; 428 1.1.10.2 tls } 429 1.1.10.2 tls 430 1.1.10.2 tls /* 431 1.1.10.2 tls * Create a DMA map for the memory. 432 1.1.10.2 tls */ 433 1.1.10.2 tls if (bus_dmamap_create(gsc->iemt, sc->sc_msize, rseg, sc->sc_msize, 434 1.1.10.2 tls 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) { 435 1.1.10.2 tls printf(": can't create DMA map\n"); 436 1.1.10.2 tls bus_dmamem_unmap(gsc->iemt, 437 1.1.10.2 tls (void *)sc->sc_maddr, sc->sc_msize); 438 1.1.10.2 tls bus_dmamem_free(gsc->iemt, &seg, rseg); 439 1.1.10.2 tls return; 440 1.1.10.2 tls } 441 1.1.10.2 tls 442 1.1.10.2 tls /* 443 1.1.10.2 tls * Load the mapped DMA memory into the DMA map. 444 1.1.10.2 tls */ 445 1.1.10.2 tls if (bus_dmamap_load(gsc->iemt, sc->sc_dmamap, 446 1.1.10.2 tls sc->sc_maddr, sc->sc_msize, 447 1.1.10.2 tls NULL, BUS_DMA_NOWAIT)) { 448 1.1.10.2 tls printf(": can't load DMA map\n"); 449 1.1.10.2 tls bus_dmamap_destroy(gsc->iemt, sc->sc_dmamap); 450 1.1.10.2 tls bus_dmamem_unmap(gsc->iemt, 451 1.1.10.2 tls (void *)sc->sc_maddr, sc->sc_msize); 452 1.1.10.2 tls bus_dmamem_free(gsc->iemt, &seg, rseg); 453 1.1.10.2 tls return; 454 1.1.10.2 tls } 455 1.1.10.2 tls 456 1.1.10.2 tls #if 1 457 1.1.10.2 tls /* XXX - this should go away. */ 458 1.1.10.2 tls sc->bh = (bus_space_handle_t) sc->sc_maddr; 459 1.1.10.2 tls #endif 460 1.1.10.2 tls 461 1.1.10.2 tls #if I82596_DEBUG 462 1.1.10.2 tls printf(" mem %x[%p]/%x\n%s", 463 1.1.10.2 tls (u_int)sc->sc_dmamap->dm_segs[0].ds_addr, 464 1.1.10.2 tls sc->sc_maddr, 465 1.1.10.2 tls sc->sc_msize, 466 1.1.10.2 tls device_xname(self)); 467 1.1.10.2 tls sc->sc_debug = IED_ALL; 468 1.1.10.2 tls #endif 469 1.1.10.2 tls 470 1.1.10.2 tls /* Initialize our bus glue. */ 471 1.1.10.2 tls sc->hwreset = ie_gsc_reset; 472 1.1.10.2 tls sc->chan_attn = ie_gsc_attend; 473 1.1.10.2 tls sc->hwinit = ie_gsc_run; 474 1.1.10.2 tls sc->memcopyout = ie_gsc_memcopyout; 475 1.1.10.2 tls sc->memcopyin = ie_gsc_memcopyin; 476 1.1.10.2 tls sc->ie_bus_read16 = ie_gsc_read16; 477 1.1.10.2 tls sc->ie_bus_write16 = ie_gsc_write16; 478 1.1.10.2 tls sc->ie_bus_write24 = ie_gsc_write24; 479 1.1.10.2 tls sc->intrhook = NULL; 480 1.1.10.2 tls 481 1.1.10.2 tls /* Clear all RAM. */ 482 1.1.10.2 tls memset(sc->sc_maddr, 0, sc->sc_msize); 483 1.1.10.2 tls bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, 0, sc->sc_msize, 484 1.1.10.2 tls BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 485 1.1.10.2 tls 486 1.1.10.2 tls /* 487 1.1.10.2 tls * We use low memory to set up SCP, ICSP and SCB data 488 1.1.10.2 tls * structures. The remaining pages become the buffer area 489 1.1.10.2 tls * (managed in i82586.c). 490 1.1.10.2 tls */ 491 1.1.10.2 tls 492 1.1.10.2 tls /* 493 1.1.10.2 tls * Since we have an i82596, we can control where where 494 1.1.10.2 tls * the chip looks for SCP. We plan to use the first 495 1.1.10.2 tls * two 32-bit words of memory for the self-test, so the 496 1.1.10.2 tls * SCP can go after that. 497 1.1.10.2 tls */ 498 1.1.10.2 tls sc->scp = IE_GSC_ALIGN(8); 499 1.1.10.2 tls 500 1.1.10.2 tls /* ISCP follows SCP */ 501 1.1.10.2 tls sc->iscp = IE_GSC_ALIGN(sc->scp + IE_SCP_SZ); 502 1.1.10.2 tls 503 1.1.10.2 tls /* SCB follows ISCP */ 504 1.1.10.2 tls sc->scb = IE_GSC_ALIGN(sc->iscp + IE_ISCP_SZ); 505 1.1.10.2 tls 506 1.1.10.2 tls /* The remainder of the memory is for buffers. */ 507 1.1.10.2 tls sc->buf_area = IE_GSC_ALIGN(sc->scb + IE_SCB_SZ); 508 1.1.10.2 tls sc->buf_area_sz = sc->sc_msize - sc->buf_area; 509 1.1.10.2 tls 510 1.1.10.2 tls /* Finally, we can probe the chip. */ 511 1.1.10.2 tls rv = i82596_probe(sc); 512 1.1.10.2 tls if (!rv) { 513 1.1.10.2 tls bus_dmamap_destroy(gsc->iemt, sc->sc_dmamap); 514 1.1.10.2 tls bus_dmamem_unmap(gsc->iemt, 515 1.1.10.2 tls (void *)sc->sc_maddr, sc->sc_msize); 516 1.1.10.2 tls bus_dmamem_free(gsc->iemt, &seg, rseg); 517 1.1.10.2 tls return; 518 1.1.10.2 tls } 519 1.1.10.2 tls #ifdef PMAPDEBUG 520 1.1.10.2 tls pmapdebug = opmapdebug; 521 1.1.10.2 tls #endif 522 1.1.10.2 tls if (!rv) 523 1.1.10.2 tls return; 524 1.1.10.2 tls 525 1.1.10.2 tls /* Get our Ethernet address. */ 526 1.1.10.2 tls memcpy(myaddr, ga->ga_ether_address, ETHER_ADDR_LEN); 527 1.1.10.2 tls 528 1.1.10.2 tls /* Set up the SCP. */ 529 1.1.10.2 tls sc->ie_bus_write16(sc, IE_SCP_BUS_USE(sc->scp), IE_GSC_SYSBUS); 530 1.1.10.2 tls sc->ie_bus_write24(sc, IE_SCP_ISCP(sc->scp), sc->iscp); 531 1.1.10.2 tls 532 1.1.10.2 tls /* Set up the ISCP. */ 533 1.1.10.2 tls sc->ie_bus_write16(sc, IE_ISCP_SCB(sc->iscp), sc->scb); 534 1.1.10.2 tls sc->ie_bus_write24(sc, IE_ISCP_BASE(sc->iscp), 0); 535 1.1.10.2 tls 536 1.1.10.2 tls /* Set BUSY in the ISCP. */ 537 1.1.10.2 tls sc->ie_bus_write16(sc, IE_ISCP_BUSY(sc->iscp), 1); 538 1.1.10.2 tls 539 1.1.10.2 tls /* Reset the adapter. */ 540 1.1.10.2 tls bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, 0, sc->sc_msize, 541 1.1.10.2 tls BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 542 1.1.10.2 tls sc->hwreset(sc, CARD_RESET); 543 1.1.10.2 tls bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, 0, sc->sc_msize, 544 1.1.10.2 tls BUS_DMASYNC_PREREAD); 545 1.1.10.2 tls 546 1.1.10.2 tls /* Now call the MI attachment. */ 547 1.1.10.2 tls printf(": v%d.%d", ga->ga_type.iodc_model, ga->ga_type.iodc_sv_rev); 548 1.1.10.2 tls i82586_attach(sc, 549 1.1.10.2 tls (gsc->flags & IEGSC_GECKO) ? 550 1.1.10.2 tls "LASI/i82596CA" : 551 1.1.10.2 tls "i82596DX", 552 1.1.10.2 tls myaddr, ie_gsc_media, IE_NMEDIA, ie_gsc_media[0]); 553 1.1.10.2 tls gsc->sc_ih = hppa_intr_establish(IPL_NET, i82586_intr, sc, 554 1.1.10.2 tls ga->ga_ir, ga->ga_irq); 555 1.1.10.2 tls } 556
Indexes created Fri Oct 31 11:10:07 GMT 2025