if_ie_gsc.c revision 1.1.6.2
1 /* $NetBSD: if_ie_gsc.c,v 1.1.6.2 2014/05/22 11:39:50 yamt Exp $ */ 2 3 /* $OpenBSD: if_ie_gsc.c,v 1.6 2001/01/12 22:57:04 mickey Exp $ */ 4 5 /* 6 * Copyright (c) 1998-2004 Michael Shalayeff 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 /* 32 * Referencies: 33 * 1. 82596DX and 82596SX High-Perfomance 32-bit Local Area Network Coprocessor 34 * Intel Corporation, November 1996, Order Number: 290219-006 35 * 36 * 2. 712 I/O Subsystem ERS Rev 1.0 37 * Hewlett-Packard, June 17 1992, Dwg No. A-A2263-66510-31 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: if_ie_gsc.c,v 1.1.6.2 2014/05/22 11:39:50 yamt Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 #include <sys/socket.h> 47 #include <sys/sockio.h> 48 49 #include <uvm/uvm_extern.h> 50 51 #include <net/if.h> 52 #include <net/if_dl.h> 53 #include <net/if_ether.h> 54 #include <net/if_types.h> 55 #include <net/if_media.h> 56 57 #include <netinet/in.h> 58 59 #include <sys/bus.h> 60 #include <machine/intr.h> 61 #include <machine/iomod.h> 62 #include <machine/autoconf.h> 63 64 #include <hppa/dev/cpudevs.h> 65 #include <hppa/gsc/gscbusvar.h> 66 #include <hppa/hppa/machdep.h> 67 68 #include <dev/ic/i82586reg.h> 69 #include <dev/ic/i82586var.h> 70 71 #define I82596_DEBUG I82586_DEBUG 72 73 #ifdef __for_reference_only 74 struct ie_gsc_regs { 75 uint32_t ie_reset; 76 uint32_t ie_port; 77 uint32_t ie_attn; 78 }; 79 #endif 80 81 #define IE_GSC_BANK_SZ (12) 82 #define IE_GSC_REG_RESET (0) 83 #define IE_GSC_REG_PORT (4) 84 #define IE_GSC_REG_ATTN (8) 85 86 #define IE_GSC_ALIGN(v) ((((u_int) (v)) + 0xf) & ~0xf) 87 88 #define IE_GSC_SYSBUS (IE_SYSBUS_596_RSVD_SET | \ 89 IE_SYSBUS_596_82586 | \ 90 IE_SYSBUS_596_INTLOW | \ 91 IE_SYSBUS_596_TRGEXT | \ 92 IE_SYSBUS_596_BE) 93 94 #define IE_SIZE 0x8000 95 96 struct ie_gsc_softc { 97 struct ie_softc ie; 98 99 /* tag and handle to hppa-specific adapter registers. */ 100 bus_space_tag_t iot; 101 bus_space_handle_t ioh; 102 103 /* bus_dma_tag_t for the memory used by the adapter. */ 104 bus_dma_tag_t iemt; 105 106 /* interrupt handle. */ 107 void *sc_ih; 108 109 /* miscellaneous flags. */ 110 int flags; 111 #define IEGSC_GECKO (1 << 0) 112 }; 113 114 int ie_gsc_probe(device_t, cfdata_t, void *); 115 void ie_gsc_attach(device_t, device_t, void *); 116 117 CFATTACH_DECL_NEW(ie_gsc, sizeof(struct ie_gsc_softc), 118 ie_gsc_probe, ie_gsc_attach, NULL, NULL); 119 120 static int ie_gsc_media[] = { 121 IFM_ETHER | IFM_10_2, 122 }; 123 #define IE_NMEDIA (sizeof(ie_gsc_media) / sizeof(ie_gsc_media[0])) 124 125 void ie_gsc_reset(struct ie_softc *, int); 126 void ie_gsc_attend(struct ie_softc *, int); 127 void ie_gsc_run(struct ie_softc *); 128 void ie_gsc_port(struct ie_softc *, u_int); 129 uint16_t ie_gsc_read16(struct ie_softc *, int); 130 void ie_gsc_write16(struct ie_softc *, int, uint16_t); 131 void ie_gsc_write24(struct ie_softc *, int, int); 132 void ie_gsc_memcopyin(struct ie_softc *, void *, int, size_t); 133 void ie_gsc_memcopyout(struct ie_softc *, const void *, int, size_t); 134 135 136 /* Reset the adapter. */ 137 void 138 ie_gsc_reset(struct ie_softc *sc, int what) 139 { 140 struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 141 int i; 142 143 switch (what) { 144 case CHIP_PROBE: 145 bus_space_write_4(gsc->iot, gsc->ioh, IE_GSC_REG_RESET, 0); 146 break; 147 148 case CARD_RESET: 149 bus_space_write_4(gsc->iot, gsc->ioh, IE_GSC_REG_RESET, 0); 150 151 /* 152 * per [2] 4.6.2.1 153 * delay for 10 system clocks + 5 transmit clocks, 154 * NB: works for system clocks over 10MHz 155 */ 156 DELAY(1000); 157 158 /* 159 * after the hardware reset: 160 * inform i825[89]6 about new SCP address, 161 * which must be at least 16-byte aligned 162 */ 163 ie_gsc_port(sc, IE_PORT_ALT_SCP); 164 ie_gsc_attend(sc, what); 165 166 for (i = 9000; i-- && ie_gsc_read16(sc, IE_ISCP_BUSY(sc->iscp)); 167 DELAY(100)) 168 pdcache(0, (vaddr_t)sc->sc_maddr + sc->iscp, IE_ISCP_SZ); 169 170 #if I82596_DEBUG 171 if (i < 0) { 172 printf("timeout for PORT command (%x)%s\n", 173 ie_gsc_read16(sc, IE_ISCP_BUSY(sc->iscp)), 174 (gsc->flags & IEGSC_GECKO)? " on gecko":""); 175 return; 176 } 177 #endif 178 break; 179 } 180 } 181 182 /* Do a channel attention on the adapter. */ 183 void 184 ie_gsc_attend(struct ie_softc *sc, int why) 185 { 186 struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 187 188 bus_space_write_4(gsc->iot, gsc->ioh, IE_GSC_REG_ATTN, 0); 189 } 190 191 /* Enable the adapter. */ 192 void 193 ie_gsc_run(struct ie_softc *sc) 194 { 195 } 196 197 /* Run an i82596 PORT command on the adapter. */ 198 void 199 ie_gsc_port(struct ie_softc *sc, u_int cmd) 200 { 201 struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 202 203 switch (cmd) { 204 case IE_PORT_RESET: 205 case IE_PORT_DUMP: 206 break; 207 case IE_PORT_SELF_TEST: 208 cmd |= (sc->sc_dmamap->dm_segs[0].ds_addr + 0); 209 break; 210 case IE_PORT_ALT_SCP: 211 cmd |= (sc->sc_dmamap->dm_segs[0].ds_addr + sc->scp); 212 break; 213 } 214 215 if (gsc->flags & IEGSC_GECKO) { 216 bus_space_write_4(gsc->iot, gsc->ioh, 217 IE_GSC_REG_PORT, (cmd & 0xffff)); 218 DELAY(1000); 219 bus_space_write_4(gsc->iot, gsc->ioh, 220 IE_GSC_REG_PORT, (cmd >> 16)); 221 DELAY(1000); 222 } else { 223 bus_space_write_4(gsc->iot, gsc->ioh, 224 IE_GSC_REG_PORT, (cmd >> 16)); 225 DELAY(1000); 226 bus_space_write_4(gsc->iot, gsc->ioh, 227 IE_GSC_REG_PORT, (cmd & 0xffff)); 228 DELAY(1000); 229 } 230 } 231 232 uint16_t 233 ie_gsc_read16(struct ie_softc *sc, int offset) 234 { 235 uint16_t val; 236 237 __asm volatile( 238 " ldh 0(%1), %0 \n" 239 " fdc %%r0(%1) \n" 240 : "=&r" (val) 241 : "r" ((char *)sc->sc_maddr + offset)); 242 return (val); 243 } 244 245 void 246 ie_gsc_write16(struct ie_softc *sc, int offset, uint16_t v) 247 { 248 249 __asm volatile( 250 " sth %0, 0(%1) \n" 251 " fdc %%r0(%1) \n" 252 : /* no outputs */ 253 : "r" (v), "r" ((char *)sc->sc_maddr + offset)); 254 } 255 256 void 257 ie_gsc_write24(struct ie_softc *sc, int offset, int addr) 258 { 259 260 /* 261 * i82586.c assumes that the chip address space starts at 262 * zero, so we have to add in the appropriate offset here. 263 */ 264 addr += sc->sc_dmamap->dm_segs[0].ds_addr; 265 __asm volatile( 266 " ldi 2, %%r21 \n" 267 " extru %0, 15, 16, %%r22 \n" 268 " sth %0, 0(%1) \n" 269 " sth %%r22, 2(%1) \n" 270 " fdc %%r0(%1) \n" 271 " fdc %%r21(%1) \n" 272 : /* No outputs */ 273 : "r" (addr), "r" ((char *)sc->sc_maddr + offset) 274 : "r21", "r22"); 275 } 276 277 void 278 ie_gsc_memcopyin(struct ie_softc *sc, void *p, int offset, size_t size) 279 { 280 struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 281 282 if (size == 0) 283 return; 284 285 memcpy(p, (char *)sc->sc_maddr + offset, size); 286 bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, offset, size, 287 BUS_DMASYNC_PREREAD); 288 hppa_led_blink(HPPA_LED_NETRCV); 289 } 290 291 void 292 ie_gsc_memcopyout(struct ie_softc *sc, const void *p, int offset, size_t size) 293 { 294 struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 295 296 if (size == 0) 297 return; 298 299 memcpy((char *)sc->sc_maddr + offset, p, size); 300 bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, offset, size, 301 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 302 hppa_led_blink(HPPA_LED_NETSND); 303 } 304 305 /* 306 * i82596 probe routine 307 */ 308 int i82596_probe(struct ie_softc *); 309 int 310 i82596_probe(struct ie_softc *sc) 311 { 312 struct ie_gsc_softc *gsc = (struct ie_gsc_softc *) sc; 313 int i; 314 315 /* Set up the SCP. */ 316 sc->ie_bus_write16(sc, IE_SCP_BUS_USE(sc->scp), IE_GSC_SYSBUS); 317 sc->ie_bus_write24(sc, IE_SCP_ISCP(sc->scp), sc->iscp); 318 319 /* Set up the ISCP. */ 320 sc->ie_bus_write16(sc, IE_ISCP_SCB(sc->iscp), sc->scb); 321 sc->ie_bus_write24(sc, IE_ISCP_BASE(sc->iscp), 0); 322 323 /* Set BUSY in the ISCP. */ 324 sc->ie_bus_write16(sc, IE_ISCP_BUSY(sc->iscp), 1); 325 326 /* Reset the adapter. */ 327 bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, 0, sc->sc_msize, 328 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 329 sc->hwreset(sc, CARD_RESET); 330 331 /* Make sure that BUSY got cleared. */ 332 if (sc->ie_bus_read16(sc, IE_ISCP_BUSY(sc->iscp))) { 333 #if I82596_DEBUG 334 printf ("%s: ISCP set failed\n", device_xname(sc->sc_dev)); 335 #endif 336 return 0; 337 } 338 339 /* Run the chip self-test. */ 340 sc->ie_bus_write24(sc, 0, -sc->sc_dmamap->dm_segs[0].ds_addr); 341 sc->ie_bus_write24(sc, 4, -(sc->sc_dmamap->dm_segs[0].ds_addr + 1)); 342 bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, 0, sc->sc_msize, 343 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 344 ie_gsc_port(sc, IE_PORT_SELF_TEST); 345 for (i = 9000; i-- && 346 sc->ie_bus_read16(sc, 4); 347 DELAY(100)) 348 pdcache(0, (vaddr_t)sc->sc_maddr, sc->sc_msize); 349 350 #if I82596_DEBUG 351 printf (": test %x:%x\n%s", 352 *((volatile int32_t *)((char *)sc->sc_maddr + 0)), 353 *((volatile int32_t *)((char *)sc->sc_maddr + 4)), 354 device_xname(sc->sc_dev)); 355 #endif 356 return 1; 357 } 358 359 int 360 ie_gsc_probe(device_t parent, cfdata_t match, void *aux) 361 { 362 struct gsc_attach_args *ga = aux; 363 364 if (ga->ga_type.iodc_type != HPPA_TYPE_FIO || 365 (ga->ga_type.iodc_sv_model != HPPA_FIO_LAN && 366 ga->ga_type.iodc_sv_model != HPPA_FIO_GLAN)) 367 return 0; 368 369 return 1; 370 } 371 372 void 373 ie_gsc_attach(device_t parent, device_t self, void *aux) 374 { 375 struct ie_gsc_softc *gsc = device_private(self); 376 struct ie_softc *sc = &gsc->ie; 377 struct gsc_attach_args *ga = aux; 378 bus_dma_segment_t seg; 379 int rseg; 380 int rv; 381 uint8_t myaddr[ETHER_ADDR_LEN]; 382 #ifdef PMAPDEBUG 383 extern int pmapdebug; 384 int opmapdebug = pmapdebug; 385 pmapdebug = 0; 386 #endif 387 388 if (ga->ga_type.iodc_sv_model == HPPA_FIO_GLAN) 389 gsc->flags |= IEGSC_GECKO; 390 391 /* 392 * Map the GSC registers. 393 */ 394 if (bus_space_map(ga->ga_iot, ga->ga_hpa, 395 IE_GSC_BANK_SZ, 0, &gsc->ioh)) { 396 printf(": can't map i/o space\n"); 397 return; 398 } 399 400 /* Set up some initial glue. */ 401 sc->sc_dev = self; 402 gsc->iot = ga->ga_iot; 403 gsc->iemt = ga->ga_dmatag; 404 sc->bt = ga->ga_iot; 405 sc->sc_msize = IE_SIZE; 406 407 /* 408 * Allocate one contiguous segment of physical memory 409 * to be used with the i82596. Since we're running the 410 * chip in i82586 mode, we're restricted to 24-bit 411 * physical addresses. 412 */ 413 if (bus_dmamem_alloc(gsc->iemt, sc->sc_msize, PAGE_SIZE, 0, 414 &seg, 1, &rseg, BUS_DMA_NOWAIT | BUS_DMA_24BIT)) { 415 printf (": can't allocate %d bytes of DMA memory\n", 416 sc->sc_msize); 417 return; 418 } 419 420 /* 421 * Map that physical memory into kernel virtual space. 422 */ 423 if (bus_dmamem_map(gsc->iemt, &seg, rseg, sc->sc_msize, 424 (void **)&sc->sc_maddr, BUS_DMA_NOWAIT)) { 425 printf (": can't map DMA memory\n"); 426 bus_dmamem_free(gsc->iemt, &seg, rseg); 427 return; 428 } 429 430 /* 431 * Create a DMA map for the memory. 432 */ 433 if (bus_dmamap_create(gsc->iemt, sc->sc_msize, rseg, sc->sc_msize, 434 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) { 435 printf(": can't create DMA map\n"); 436 bus_dmamem_unmap(gsc->iemt, 437 (void *)sc->sc_maddr, sc->sc_msize); 438 bus_dmamem_free(gsc->iemt, &seg, rseg); 439 return; 440 } 441 442 /* 443 * Load the mapped DMA memory into the DMA map. 444 */ 445 if (bus_dmamap_load(gsc->iemt, sc->sc_dmamap, 446 sc->sc_maddr, sc->sc_msize, 447 NULL, BUS_DMA_NOWAIT)) { 448 printf(": can't load DMA map\n"); 449 bus_dmamap_destroy(gsc->iemt, sc->sc_dmamap); 450 bus_dmamem_unmap(gsc->iemt, 451 (void *)sc->sc_maddr, sc->sc_msize); 452 bus_dmamem_free(gsc->iemt, &seg, rseg); 453 return; 454 } 455 456 #if 1 457 /* XXX - this should go away. */ 458 sc->bh = (bus_space_handle_t) sc->sc_maddr; 459 #endif 460 461 #if I82596_DEBUG 462 printf(" mem %x[%p]/%x\n%s", 463 (u_int)sc->sc_dmamap->dm_segs[0].ds_addr, 464 sc->sc_maddr, 465 sc->sc_msize, 466 device_xname(self)); 467 sc->sc_debug = IED_ALL; 468 #endif 469 470 /* Initialize our bus glue. */ 471 sc->hwreset = ie_gsc_reset; 472 sc->chan_attn = ie_gsc_attend; 473 sc->hwinit = ie_gsc_run; 474 sc->memcopyout = ie_gsc_memcopyout; 475 sc->memcopyin = ie_gsc_memcopyin; 476 sc->ie_bus_read16 = ie_gsc_read16; 477 sc->ie_bus_write16 = ie_gsc_write16; 478 sc->ie_bus_write24 = ie_gsc_write24; 479 sc->intrhook = NULL; 480 481 /* Clear all RAM. */ 482 memset(sc->sc_maddr, 0, sc->sc_msize); 483 bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, 0, sc->sc_msize, 484 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 485 486 /* 487 * We use low memory to set up SCP, ICSP and SCB data 488 * structures. The remaining pages become the buffer area 489 * (managed in i82586.c). 490 */ 491 492 /* 493 * Since we have an i82596, we can control where where 494 * the chip looks for SCP. We plan to use the first 495 * two 32-bit words of memory for the self-test, so the 496 * SCP can go after that. 497 */ 498 sc->scp = IE_GSC_ALIGN(8); 499 500 /* ISCP follows SCP */ 501 sc->iscp = IE_GSC_ALIGN(sc->scp + IE_SCP_SZ); 502 503 /* SCB follows ISCP */ 504 sc->scb = IE_GSC_ALIGN(sc->iscp + IE_ISCP_SZ); 505 506 /* The remainder of the memory is for buffers. */ 507 sc->buf_area = IE_GSC_ALIGN(sc->scb + IE_SCB_SZ); 508 sc->buf_area_sz = sc->sc_msize - sc->buf_area; 509 510 /* Finally, we can probe the chip. */ 511 rv = i82596_probe(sc); 512 if (!rv) { 513 bus_dmamap_destroy(gsc->iemt, sc->sc_dmamap); 514 bus_dmamem_unmap(gsc->iemt, 515 (void *)sc->sc_maddr, sc->sc_msize); 516 bus_dmamem_free(gsc->iemt, &seg, rseg); 517 return; 518 } 519 #ifdef PMAPDEBUG 520 pmapdebug = opmapdebug; 521 #endif 522 if (!rv) 523 return; 524 525 /* Get our Ethernet address. */ 526 memcpy(myaddr, ga->ga_ether_address, ETHER_ADDR_LEN); 527 528 /* Set up the SCP. */ 529 sc->ie_bus_write16(sc, IE_SCP_BUS_USE(sc->scp), IE_GSC_SYSBUS); 530 sc->ie_bus_write24(sc, IE_SCP_ISCP(sc->scp), sc->iscp); 531 532 /* Set up the ISCP. */ 533 sc->ie_bus_write16(sc, IE_ISCP_SCB(sc->iscp), sc->scb); 534 sc->ie_bus_write24(sc, IE_ISCP_BASE(sc->iscp), 0); 535 536 /* Set BUSY in the ISCP. */ 537 sc->ie_bus_write16(sc, IE_ISCP_BUSY(sc->iscp), 1); 538 539 /* Reset the adapter. */ 540 bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, 0, sc->sc_msize, 541 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 542 sc->hwreset(sc, CARD_RESET); 543 bus_dmamap_sync(gsc->iemt, sc->sc_dmamap, 0, sc->sc_msize, 544 BUS_DMASYNC_PREREAD); 545 546 /* Now call the MI attachment. */ 547 printf(": v%d.%d", ga->ga_type.iodc_model, ga->ga_type.iodc_sv_rev); 548 i82586_attach(sc, 549 (gsc->flags & IEGSC_GECKO) ? 550 "LASI/i82596CA" : 551 "i82596DX", 552 myaddr, ie_gsc_media, IE_NMEDIA, ie_gsc_media[0]); 553 gsc->sc_ih = hppa_intr_establish(IPL_NET, i82586_intr, sc, 554 ga->ga_ir, ga->ga_irq); 555 } 556
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