bus_defs.h revision 1.2 1 1.2 skrll /* $NetBSD: bus_defs.h,v 1.2 2019/09/23 16:17:56 skrll Exp $ */
2 1.1 skrll
3 1.1 skrll /* $OpenBSD: bus.h,v 1.13 2001/07/30 14:15:59 art Exp $ */
4 1.1 skrll
5 1.1 skrll /*
6 1.1 skrll * Copyright (c) 1998-2004 Michael Shalayeff
7 1.1 skrll * All rights reserved.
8 1.1 skrll *
9 1.1 skrll * Redistribution and use in source and binary forms, with or without
10 1.1 skrll * modification, are permitted provided that the following conditions
11 1.1 skrll * are met:
12 1.1 skrll * 1. Redistributions of source code must retain the above copyright
13 1.1 skrll * notice, this list of conditions and the following disclaimer.
14 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 skrll * notice, this list of conditions and the following disclaimer in the
16 1.1 skrll * documentation and/or other materials provided with the distribution.
17 1.1 skrll *
18 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 skrll * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
22 1.1 skrll * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23 1.1 skrll * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 1.1 skrll * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 1.1 skrll * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26 1.1 skrll * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
27 1.1 skrll * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 1.1 skrll * THE POSSIBILITY OF SUCH DAMAGE.
29 1.1 skrll */
30 1.1 skrll
31 1.1 skrll
32 1.1 skrll #ifndef _MACHINE_BUS_DEFS_H_
33 1.1 skrll #define _MACHINE_BUS_DEFS_H_
34 1.1 skrll
35 1.1 skrll #include <machine/cpufunc.h>
36 1.1 skrll
37 1.1 skrll /*
38 1.1 skrll * Bus address and size types.
39 1.1 skrll */
40 1.1 skrll typedef u_long bus_addr_t;
41 1.1 skrll typedef u_long bus_size_t;
42 1.2 skrll
43 1.2 skrll #define PRIxBUSADDR "lx"
44 1.2 skrll #define PRIxBUSSIZE "lx"
45 1.2 skrll #define PRIuBUSSIZE "lu"
46 1.2 skrll
47 1.1 skrll typedef u_long bus_space_handle_t;
48 1.1 skrll
49 1.2 skrll #define PRIxBSH "lx"
50 1.2 skrll
51 1.1 skrll struct hppa_bus_space_tag {
52 1.1 skrll void *hbt_cookie;
53 1.1 skrll
54 1.1 skrll int (*hbt_map)(void *v, bus_addr_t addr, bus_size_t size,
55 1.1 skrll int flags, bus_space_handle_t *bshp);
56 1.1 skrll void (*hbt_unmap)(void *v, bus_space_handle_t bsh,
57 1.1 skrll bus_size_t size);
58 1.1 skrll int (*hbt_subregion)(void *v, bus_space_handle_t bsh,
59 1.1 skrll bus_size_t offset, bus_size_t size,
60 1.1 skrll bus_space_handle_t *nbshp);
61 1.1 skrll int (*hbt_alloc)(void *v, bus_addr_t rstart, bus_addr_t rend,
62 1.1 skrll bus_size_t size, bus_size_t align,
63 1.1 skrll bus_size_t boundary, int flags,
64 1.1 skrll bus_addr_t *addrp, bus_space_handle_t *bshp);
65 1.1 skrll void (*hbt_free)(void *, bus_space_handle_t, bus_size_t);
66 1.1 skrll void (*hbt_barrier)(void *v, bus_space_handle_t h,
67 1.1 skrll bus_size_t o, bus_size_t l, int op);
68 1.1 skrll void *(*hbt_vaddr)(void *, bus_space_handle_t);
69 1.1 skrll paddr_t (*hbt_mmap)(void *, bus_addr_t, off_t, int, int);
70 1.1 skrll
71 1.1 skrll uint8_t (*hbt_r1)(void *, bus_space_handle_t, bus_size_t);
72 1.1 skrll uint16_t (*hbt_r2)(void *, bus_space_handle_t, bus_size_t);
73 1.1 skrll uint32_t (*hbt_r4)(void *, bus_space_handle_t, bus_size_t);
74 1.1 skrll uint64_t (*hbt_r8)(void *, bus_space_handle_t, bus_size_t);
75 1.1 skrll
76 1.1 skrll void (*hbt_w1)(void *, bus_space_handle_t, bus_size_t, uint8_t);
77 1.1 skrll void (*hbt_w2)(void *, bus_space_handle_t, bus_size_t, uint16_t);
78 1.1 skrll void (*hbt_w4)(void *, bus_space_handle_t, bus_size_t, uint32_t);
79 1.1 skrll void (*hbt_w8)(void *, bus_space_handle_t, bus_size_t, uint64_t);
80 1.1 skrll
81 1.1 skrll void (*hbt_rm_1)(void *v, bus_space_handle_t h,
82 1.1 skrll bus_size_t o, uint8_t *a, bus_size_t c);
83 1.1 skrll void (*hbt_rm_2)(void *v, bus_space_handle_t h,
84 1.1 skrll bus_size_t o, uint16_t *a, bus_size_t c);
85 1.1 skrll void (*hbt_rm_4)(void *v, bus_space_handle_t h,
86 1.1 skrll bus_size_t o, uint32_t *a, bus_size_t c);
87 1.1 skrll void (*hbt_rm_8)(void *v, bus_space_handle_t h,
88 1.1 skrll bus_size_t o, uint64_t *a, bus_size_t c);
89 1.1 skrll
90 1.1 skrll void (*hbt_wm_1)(void *v, bus_space_handle_t h, bus_size_t o,
91 1.1 skrll const uint8_t *a, bus_size_t c);
92 1.1 skrll void (*hbt_wm_2)(void *v, bus_space_handle_t h, bus_size_t o,
93 1.1 skrll const uint16_t *a, bus_size_t c);
94 1.1 skrll void (*hbt_wm_4)(void *v, bus_space_handle_t h, bus_size_t o,
95 1.1 skrll const uint32_t *a, bus_size_t c);
96 1.1 skrll void (*hbt_wm_8)(void *v, bus_space_handle_t h, bus_size_t o,
97 1.1 skrll const uint64_t *a, bus_size_t c);
98 1.1 skrll
99 1.1 skrll void (*hbt_sm_1)(void *v, bus_space_handle_t h, bus_size_t o,
100 1.1 skrll uint8_t vv, bus_size_t c);
101 1.1 skrll void (*hbt_sm_2)(void *v, bus_space_handle_t h, bus_size_t o,
102 1.1 skrll uint16_t vv, bus_size_t c);
103 1.1 skrll void (*hbt_sm_4)(void *v, bus_space_handle_t h, bus_size_t o,
104 1.1 skrll uint32_t vv, bus_size_t c);
105 1.1 skrll void (*hbt_sm_8)(void *v, bus_space_handle_t h, bus_size_t o,
106 1.1 skrll uint64_t vv, bus_size_t c);
107 1.1 skrll
108 1.1 skrll void (*hbt_rrm_2)(void *v, bus_space_handle_t h,
109 1.1 skrll bus_size_t o, uint16_t *a, bus_size_t c);
110 1.1 skrll void (*hbt_rrm_4)(void *v, bus_space_handle_t h,
111 1.1 skrll bus_size_t o, uint32_t *a, bus_size_t c);
112 1.1 skrll void (*hbt_rrm_8)(void *v, bus_space_handle_t h,
113 1.1 skrll bus_size_t o, uint64_t *a, bus_size_t c);
114 1.1 skrll
115 1.1 skrll void (*hbt_wrm_2)(void *v, bus_space_handle_t h,
116 1.1 skrll bus_size_t o, const uint16_t *a, bus_size_t c);
117 1.1 skrll void (*hbt_wrm_4)(void *v, bus_space_handle_t h,
118 1.1 skrll bus_size_t o, const uint32_t *a, bus_size_t c);
119 1.1 skrll void (*hbt_wrm_8)(void *v, bus_space_handle_t h,
120 1.1 skrll bus_size_t o, const uint64_t *a, bus_size_t c);
121 1.1 skrll
122 1.1 skrll void (*hbt_rr_1)(void *v, bus_space_handle_t h,
123 1.1 skrll bus_size_t o, uint8_t *a, bus_size_t c);
124 1.1 skrll void (*hbt_rr_2)(void *v, bus_space_handle_t h,
125 1.1 skrll bus_size_t o, uint16_t *a, bus_size_t c);
126 1.1 skrll void (*hbt_rr_4)(void *v, bus_space_handle_t h,
127 1.1 skrll bus_size_t o, uint32_t *a, bus_size_t c);
128 1.1 skrll void (*hbt_rr_8)(void *v, bus_space_handle_t h,
129 1.1 skrll bus_size_t o, uint64_t *a, bus_size_t c);
130 1.1 skrll
131 1.1 skrll void (*hbt_wr_1)(void *v, bus_space_handle_t h,
132 1.1 skrll bus_size_t o, const uint8_t *a, bus_size_t c);
133 1.1 skrll void (*hbt_wr_2)(void *v, bus_space_handle_t h,
134 1.1 skrll bus_size_t o, const uint16_t *a, bus_size_t c);
135 1.1 skrll void (*hbt_wr_4)(void *v, bus_space_handle_t h,
136 1.1 skrll bus_size_t o, const uint32_t *a, bus_size_t c);
137 1.1 skrll void (*hbt_wr_8)(void *v, bus_space_handle_t h,
138 1.1 skrll bus_size_t o, const uint64_t *a, bus_size_t c);
139 1.1 skrll
140 1.1 skrll void (*hbt_rrr_2)(void *v, bus_space_handle_t h,
141 1.1 skrll bus_size_t o, uint16_t *a, bus_size_t c);
142 1.1 skrll void (*hbt_rrr_4)(void *v, bus_space_handle_t h,
143 1.1 skrll bus_size_t o, uint32_t *a, bus_size_t c);
144 1.1 skrll void (*hbt_rrr_8)(void *v, bus_space_handle_t h,
145 1.1 skrll bus_size_t o, uint64_t *a, bus_size_t c);
146 1.1 skrll
147 1.1 skrll void (*hbt_wrr_2)(void *v, bus_space_handle_t h,
148 1.1 skrll bus_size_t o, const uint16_t *a, bus_size_t c);
149 1.1 skrll void (*hbt_wrr_4)(void *v, bus_space_handle_t h,
150 1.1 skrll bus_size_t o, const uint32_t *a, bus_size_t c);
151 1.1 skrll void (*hbt_wrr_8)(void *v, bus_space_handle_t h,
152 1.1 skrll bus_size_t o, const uint64_t *a, bus_size_t c);
153 1.1 skrll
154 1.1 skrll void (*hbt_sr_1)(void *v, bus_space_handle_t h,
155 1.1 skrll bus_size_t o, uint8_t vv, bus_size_t c);
156 1.1 skrll void (*hbt_sr_2)(void *v, bus_space_handle_t h,
157 1.1 skrll bus_size_t o, uint16_t vv, bus_size_t c);
158 1.1 skrll void (*hbt_sr_4)(void *v, bus_space_handle_t h,
159 1.1 skrll bus_size_t o, uint32_t vv, bus_size_t c);
160 1.1 skrll void (*hbt_sr_8)(void *v, bus_space_handle_t h,
161 1.1 skrll bus_size_t o, uint64_t vv, bus_size_t c);
162 1.1 skrll
163 1.1 skrll void (*hbt_cp_1)(void *v, bus_space_handle_t h1, bus_size_t o1,
164 1.1 skrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c);
165 1.1 skrll void (*hbt_cp_2)(void *v, bus_space_handle_t h1, bus_size_t o1,
166 1.1 skrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c);
167 1.1 skrll void (*hbt_cp_4)(void *v, bus_space_handle_t h1, bus_size_t o1,
168 1.1 skrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c);
169 1.1 skrll void (*hbt_cp_8)(void *v, bus_space_handle_t h1, bus_size_t o1,
170 1.1 skrll bus_space_handle_t h2, bus_size_t o2, bus_size_t c);
171 1.1 skrll };
172 1.1 skrll typedef const struct hppa_bus_space_tag *bus_space_tag_t;
173 1.1 skrll
174 1.1 skrll /* flags for bus space map functions */
175 1.1 skrll #define BUS_SPACE_MAP_READONLY 0x0008
176 1.1 skrll #define BUS_SPACE_MAP_NOEXTENT 0x8000 /* no extent ops */
177 1.1 skrll
178 1.1 skrll
179 1.1 skrll /* bus access routines */
180 1.1 skrll #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
181 1.1 skrll
182 1.1 skrll /* XXX fredette */
183 1.1 skrll #define __BUS_SPACE_HAS_STREAM_METHODS
184 1.1 skrll
185 1.1 skrll #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
186 1.1 skrll #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
187 1.1 skrll #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
188 1.1 skrll #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
189 1.1 skrll #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
190 1.1 skrll #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
191 1.1 skrll #define BUS_DMA_BUS2 0x020
192 1.1 skrll #define BUS_DMA_BUS3 0x040
193 1.1 skrll #define BUS_DMA_BUS4 0x080
194 1.1 skrll #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
195 1.1 skrll #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
196 1.1 skrll #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
197 1.1 skrll
198 1.1 skrll /* For devices that have a 24-bit address space */
199 1.1 skrll #define BUS_DMA_24BIT BUS_DMA_BUS1
200 1.1 skrll
201 1.1 skrll /* Forwards needed by prototypes below. */
202 1.1 skrll struct mbuf;
203 1.1 skrll struct proc;
204 1.1 skrll struct uio;
205 1.1 skrll
206 1.1 skrll typedef const struct hppa_bus_dma_tag *bus_dma_tag_t;
207 1.1 skrll typedef struct hppa_bus_dmamap *bus_dmamap_t;
208 1.1 skrll
209 1.1 skrll #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
210 1.1 skrll
211 1.1 skrll /*
212 1.1 skrll * bus_dma_segment_t
213 1.1 skrll *
214 1.1 skrll * Describes a single contiguous DMA transaction. Values
215 1.1 skrll * are suitable for programming into DMA registers.
216 1.1 skrll */
217 1.1 skrll struct hppa_bus_dma_segment {
218 1.1 skrll bus_addr_t ds_addr; /* DMA address */
219 1.1 skrll bus_size_t ds_len; /* length of transfer */
220 1.1 skrll void *_ds_mlist; /* page list when dmamem_alloc'ed */
221 1.1 skrll vaddr_t _ds_va; /* VA when dmamem_map'ed */
222 1.1 skrll };
223 1.1 skrll typedef struct hppa_bus_dma_segment bus_dma_segment_t;
224 1.1 skrll
225 1.1 skrll /*
226 1.1 skrll * bus_dma_tag_t
227 1.1 skrll *
228 1.1 skrll * A machine-dependent opaque type describing the implementation of
229 1.1 skrll * DMA for a given bus.
230 1.1 skrll */
231 1.1 skrll
232 1.1 skrll struct hppa_bus_dma_tag {
233 1.1 skrll void *_cookie; /* cookie used in the guts */
234 1.1 skrll
235 1.1 skrll /*
236 1.1 skrll * DMA mapping methods.
237 1.1 skrll */
238 1.1 skrll int (*_dmamap_create)(void *, bus_size_t, int,
239 1.1 skrll bus_size_t, bus_size_t, int, bus_dmamap_t *);
240 1.1 skrll void (*_dmamap_destroy)(void *, bus_dmamap_t);
241 1.1 skrll int (*_dmamap_load)(void *, bus_dmamap_t, void *,
242 1.1 skrll bus_size_t, struct proc *, int);
243 1.1 skrll int (*_dmamap_load_mbuf)(void *, bus_dmamap_t,
244 1.1 skrll struct mbuf *, int);
245 1.1 skrll int (*_dmamap_load_uio)(void *, bus_dmamap_t,
246 1.1 skrll struct uio *, int);
247 1.1 skrll int (*_dmamap_load_raw)(void *, bus_dmamap_t,
248 1.1 skrll bus_dma_segment_t *, int, bus_size_t, int);
249 1.1 skrll void (*_dmamap_unload)(void *, bus_dmamap_t);
250 1.1 skrll void (*_dmamap_sync)(void *, bus_dmamap_t, bus_addr_t, bus_size_t, int);
251 1.1 skrll
252 1.1 skrll /*
253 1.1 skrll * DMA memory utility functions.
254 1.1 skrll */
255 1.1 skrll int (*_dmamem_alloc)(void *, bus_size_t, bus_size_t,
256 1.1 skrll bus_size_t, bus_dma_segment_t *, int, int *, int);
257 1.1 skrll void (*_dmamem_free)(void *, bus_dma_segment_t *, int);
258 1.1 skrll int (*_dmamem_map)(void *, bus_dma_segment_t *,
259 1.1 skrll int, size_t, void **, int);
260 1.1 skrll void (*_dmamem_unmap)(void *, void *, size_t);
261 1.1 skrll paddr_t (*_dmamem_mmap)(void *, bus_dma_segment_t *,
262 1.1 skrll int, off_t, int, int);
263 1.1 skrll };
264 1.1 skrll
265 1.1 skrll /*
266 1.1 skrll * bus_dmamap_t
267 1.1 skrll *
268 1.1 skrll * Describes a DMA mapping.
269 1.1 skrll */
270 1.1 skrll struct hppa_bus_dmamap {
271 1.1 skrll /*
272 1.1 skrll * PRIVATE MEMBERS: not for use by machine-independent code.
273 1.1 skrll */
274 1.1 skrll bus_size_t _dm_size; /* largest DMA transfer mappable */
275 1.1 skrll int _dm_segcnt; /* number of segs this map can map */
276 1.1 skrll bus_size_t _dm_maxsegsz; /* fixed largest possible segment */
277 1.1 skrll bus_size_t _dm_boundary; /* don't cross this */
278 1.1 skrll int _dm_flags; /* misc. flags */
279 1.1 skrll
280 1.1 skrll void *_dm_cookie; /* cookie for bus-specific functions */
281 1.1 skrll
282 1.1 skrll /*
283 1.1 skrll * PUBLIC MEMBERS: these are used by machine-independent code.
284 1.1 skrll */
285 1.1 skrll bus_size_t dm_maxsegsz; /* largest possible segment */
286 1.1 skrll bus_size_t dm_mapsize; /* size of the mapping */
287 1.1 skrll int dm_nsegs; /* # valid segments in mapping */
288 1.1 skrll bus_dma_segment_t dm_segs[1]; /* segments; variable length */
289 1.1 skrll };
290 1.1 skrll
291 1.1 skrll #endif /* _MACHINE_BUS_DEFS_H_ */
292