cpu.h revision 1.2.10.3
1 1.2.10.2 tls /* $NetBSD: cpu.h,v 1.2.10.3 2017/12/03 11:36:16 jdolecek Exp $ */ 2 1.2.10.2 tls 3 1.2.10.2 tls /* $OpenBSD: cpu.h,v 1.55 2008/07/23 17:39:35 kettenis Exp $ */ 4 1.2.10.2 tls 5 1.2.10.2 tls /* 6 1.2.10.2 tls * Copyright (c) 2000-2004 Michael Shalayeff 7 1.2.10.2 tls * All rights reserved. 8 1.2.10.2 tls * 9 1.2.10.2 tls * Redistribution and use in source and binary forms, with or without 10 1.2.10.2 tls * modification, are permitted provided that the following conditions 11 1.2.10.2 tls * are met: 12 1.2.10.2 tls * 1. Redistributions of source code must retain the above copyright 13 1.2.10.2 tls * notice, this list of conditions and the following disclaimer. 14 1.2.10.2 tls * 2. Redistributions in binary form must reproduce the above copyright 15 1.2.10.2 tls * notice, this list of conditions and the following disclaimer in the 16 1.2.10.2 tls * documentation and/or other materials provided with the distribution. 17 1.2.10.2 tls * 18 1.2.10.2 tls * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 1.2.10.2 tls * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 1.2.10.2 tls * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 1.2.10.2 tls * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 22 1.2.10.2 tls * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 1.2.10.2 tls * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 1.2.10.2 tls * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 1.2.10.2 tls * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 1.2.10.2 tls * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 1.2.10.2 tls * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 1.2.10.2 tls * THE POSSIBILITY OF SUCH DAMAGE. 29 1.2.10.2 tls */ 30 1.2.10.2 tls /* 31 1.2.10.2 tls * Copyright (c) 1988-1994, The University of Utah and 32 1.2.10.2 tls * the Computer Systems Laboratory at the University of Utah (CSL). 33 1.2.10.2 tls * All rights reserved. 34 1.2.10.2 tls * 35 1.2.10.2 tls * Permission to use, copy, modify and distribute this software is hereby 36 1.2.10.2 tls * granted provided that (1) source code retains these copyright, permission, 37 1.2.10.2 tls * and disclaimer notices, and (2) redistributions including binaries 38 1.2.10.2 tls * reproduce the notices in supporting documentation, and (3) all advertising 39 1.2.10.2 tls * materials mentioning features or use of this software display the following 40 1.2.10.2 tls * acknowledgement: ``This product includes software developed by the 41 1.2.10.2 tls * Computer Systems Laboratory at the University of Utah.'' 42 1.2.10.2 tls * 43 1.2.10.2 tls * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS 44 1.2.10.2 tls * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF 45 1.2.10.2 tls * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 46 1.2.10.2 tls * 47 1.2.10.2 tls * CSL requests users of this software to return to csl-dist (at) cs.utah.edu any 48 1.2.10.2 tls * improvements that they make and grant CSL redistribution rights. 49 1.2.10.2 tls * 50 1.2.10.2 tls * Utah $Hdr: cpu.h 1.19 94/12/16$ 51 1.2.10.2 tls */ 52 1.2.10.2 tls 53 1.2.10.2 tls #ifndef _MACHINE_CPU_H_ 54 1.2.10.2 tls #define _MACHINE_CPU_H_ 55 1.2.10.2 tls 56 1.2.10.2 tls #ifdef _KERNEL_OPT 57 1.2.10.2 tls #include "opt_cputype.h" 58 1.2.10.2 tls #include "opt_multiprocessor.h" 59 1.2.10.2 tls #endif 60 1.2.10.2 tls 61 1.2.10.2 tls #include <machine/trap.h> 62 1.2.10.2 tls #include <machine/frame.h> 63 1.2.10.2 tls #include <machine/reg.h> 64 1.2.10.2 tls #include <machine/intrdefs.h> 65 1.2.10.2 tls 66 1.2.10.2 tls #ifndef __ASSEMBLER__ 67 1.2.10.2 tls #include <machine/intr.h> 68 1.2.10.2 tls #endif 69 1.2.10.2 tls 70 1.2.10.2 tls #ifndef _LOCORE 71 1.2.10.2 tls 72 1.2.10.2 tls /* types */ 73 1.2.10.2 tls enum hppa_cpu_type { 74 1.2.10.2 tls hpc_unknown, 75 1.2.10.2 tls hpcx, /* PA7000 (x) PA 1.0 */ 76 1.2.10.2 tls hpcxs, /* PA7000 (s) PA 1.1a */ 77 1.2.10.2 tls hpcxt, /* PA7100 (t) PA 1.1b */ 78 1.2.10.2 tls hpcxl, /* PA7100LC (l) PA 1.1c */ 79 1.2.10.2 tls hpcxtp, /* PA7200 (t') PA 1.1d */ 80 1.2.10.2 tls hpcxl2, /* PA7300LC (l2) PA 1.1e */ 81 1.2.10.2 tls hpcxu, /* PA8000 (u) PA 2.0 */ 82 1.2.10.2 tls hpcxup, /* PA8200 (u+) PA 2.0 */ 83 1.2.10.2 tls hpcxw, /* PA8500 (w) PA 2.0 */ 84 1.2.10.2 tls hpcxwp, /* PA8600 (w+) PA 2.0 */ 85 1.2.10.2 tls hpcxw2, /* PA8700 (piranha) PA 2.0 */ 86 1.2.10.2 tls mako /* PA8800 (mako) PA 2.0 */ 87 1.2.10.2 tls }; 88 1.2.10.2 tls 89 1.2.10.3 jdolecek #ifdef _KERNEL 90 1.2.10.2 tls /* 91 1.2.10.2 tls * A CPU description. 92 1.2.10.2 tls */ 93 1.2.10.2 tls struct hppa_cpu_info { 94 1.2.10.2 tls /* The official name of the chip. */ 95 1.2.10.2 tls const char *hci_chip_name; 96 1.2.10.2 tls 97 1.2.10.2 tls /* The nickname for the chip. */ 98 1.2.10.2 tls const char *hci_chip_nickname; 99 1.2.10.2 tls 100 1.2.10.2 tls /* The type and PA-RISC specification of the chip. */ 101 1.2.10.2 tls const char hci_chip_type[8]; 102 1.2.10.2 tls enum hppa_cpu_type hci_cputype; 103 1.2.10.2 tls int hci_cpuversion; 104 1.2.10.2 tls int hci_features; /* CPU types and features */ 105 1.2.10.2 tls #define HPPA_FTRS_TLBU 0x00000001 106 1.2.10.2 tls #define HPPA_FTRS_BTLBU 0x00000002 107 1.2.10.2 tls #define HPPA_FTRS_HVT 0x00000004 108 1.2.10.2 tls #define HPPA_FTRS_W32B 0x00000008 109 1.2.10.2 tls 110 1.2.10.2 tls const char *hci_chip_spec; 111 1.2.10.2 tls 112 1.2.10.2 tls int (*desidhash)(void); 113 1.2.10.2 tls const u_int *itlbh, *dtlbh, *itlbnah, *dtlbnah, *tlbdh; 114 1.2.10.2 tls int (*dbtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int); 115 1.2.10.2 tls int (*ibtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int); 116 1.2.10.2 tls int (*btlbprg)(int); 117 1.2.10.2 tls int (*hptinit)(vaddr_t, vsize_t); 118 1.2.10.2 tls }; 119 1.2.10.2 tls 120 1.2.10.2 tls extern const struct hppa_cpu_info *hppa_cpu_info; 121 1.2.10.2 tls extern int cpu_modelno; 122 1.2.10.2 tls extern int cpu_revision; 123 1.2.10.2 tls #endif 124 1.2.10.2 tls #endif 125 1.2.10.2 tls 126 1.2.10.2 tls /* 127 1.2.10.2 tls * COPR/SFUs 128 1.2.10.2 tls */ 129 1.2.10.2 tls #define HPPA_FPUS 0xc0 130 1.2.10.2 tls #define HPPA_PMSFUS 0x20 /* ??? */ 131 1.2.10.2 tls 132 1.2.10.2 tls /* 133 1.2.10.2 tls * Exported definitions unique to hppa/PA-RISC cpu support. 134 1.2.10.2 tls */ 135 1.2.10.2 tls 136 1.2.10.2 tls /* 137 1.2.10.2 tls * COPR/SFUs 138 1.2.10.2 tls */ 139 1.2.10.2 tls #define HPPA_FPUVER(w) (((w) & 0x003ff800) >> 11) 140 1.2.10.2 tls #define HPPA_FPU_OP(w) ((w) >> 26) 141 1.2.10.2 tls #define HPPA_FPU_UNMPL 0x01 /* exception reg, the rest is << 1 */ 142 1.2.10.2 tls #define HPPA_FPU_ILL 0x80 /* software-only */ 143 1.2.10.2 tls #define HPPA_FPU_I 0x01 144 1.2.10.2 tls #define HPPA_FPU_U 0x02 145 1.2.10.2 tls #define HPPA_FPU_O 0x04 146 1.2.10.2 tls #define HPPA_FPU_Z 0x08 147 1.2.10.2 tls #define HPPA_FPU_V 0x10 148 1.2.10.2 tls #define HPPA_FPU_D 0x20 149 1.2.10.2 tls #define HPPA_FPU_T 0x40 150 1.2.10.2 tls #define HPPA_FPU_XMASK 0x7f 151 1.2.10.2 tls #define HPPA_FPU_T_POS 25 152 1.2.10.2 tls #define HPPA_FPU_RM 0x00000600 153 1.2.10.2 tls #define HPPA_FPU_CQ 0x00fff800 154 1.2.10.2 tls #define HPPA_FPU_C 0x04000000 155 1.2.10.2 tls #define HPPA_FPU_FLSH 27 156 1.2.10.2 tls #define HPPA_FPU_INIT (0) 157 1.2.10.2 tls #define HPPA_FPU_FORK(s) ((s) & ~((uint64_t)(HPPA_FPU_XMASK) << 32)) 158 1.2.10.2 tls 159 1.2.10.2 tls /* 160 1.2.10.2 tls * definitions of cpu-dependent requirements 161 1.2.10.2 tls * referenced in generic code 162 1.2.10.2 tls */ 163 1.2.10.2 tls #if defined(HP8000_CPU) || defined(HP8200_CPU) || \ 164 1.2.10.2 tls defined(HP8500_CPU) || defined(HP8600_CPU) 165 1.2.10.2 tls 166 1.2.10.2 tls /* PA2.0 aliases */ 167 1.2.10.2 tls #define HPPA_PGALIAS 0x00400000 168 1.2.10.2 tls #define HPPA_PGAMASK 0xffc00000 /* PA bits 0-9 not used in index */ 169 1.2.10.2 tls #define HPPA_PGAOFF 0x003fffff 170 1.2.10.2 tls 171 1.2.10.2 tls #else 172 1.2.10.2 tls 173 1.2.10.2 tls /* PA1.x aliases */ 174 1.2.10.2 tls #define HPPA_PGALIAS 0x00100000 175 1.2.10.2 tls #define HPPA_PGAMASK 0xfff00000 /* PA bits 0-11 not used in index */ 176 1.2.10.2 tls #define HPPA_PGAOFF 0x000fffff 177 1.2.10.2 tls 178 1.2.10.2 tls #endif 179 1.2.10.2 tls 180 1.2.10.2 tls #define HPPA_SPAMASK 0xf0f0f000 /* PA bits 0-3,8-11,16-19 not used */ 181 1.2.10.2 tls 182 1.2.10.2 tls #define HPPA_IOSPACE 0xf0000000 183 1.2.10.2 tls #define HPPA_IOLEN 0x10000000 184 1.2.10.2 tls #define HPPA_PDC_LOW 0xef000000 185 1.2.10.2 tls #define HPPA_PDC_HIGH 0xf1000000 186 1.2.10.2 tls #define HPPA_IOBCAST 0xfffc0000 187 1.2.10.2 tls #define HPPA_LBCAST 0xfffc0000 188 1.2.10.2 tls #define HPPA_GBCAST 0xfffe0000 189 1.2.10.2 tls #define HPPA_FPA 0xfff80000 190 1.2.10.2 tls #define HPPA_FLEX_DATA 0xfff80001 191 1.2.10.2 tls #define HPPA_DMA_ENABLE 0x00000001 192 1.2.10.2 tls #define HPPA_SPA_ENABLE 0x00000020 193 1.2.10.2 tls #define HPPA_NMODSPBUS 64 194 1.2.10.2 tls 195 1.2.10.2 tls #ifdef MULTIPROCESSOR 196 1.2.10.2 tls 197 1.2.10.2 tls #define GET_CURCPU(r) mfctl CR_CURCPU, r 198 1.2.10.2 tls #define GET_CURCPU_SPACE(s, r) GET_CURCPU(r) 199 1.2.10.2 tls #define GET_CURLWP(r) mfctl CR_CURCPU, r ! ldw CI_CURLWP(r), r 200 1.2.10.2 tls #define GET_CURLWP_SPACE(s, r) mfctl CR_CURCPU, r ! ldw CI_CURLWP(s, r), r 201 1.2.10.2 tls 202 1.2.10.2 tls #define SET_CURLWP(r,t) mfctl CR_CURCPU, t ! stw r, CI_CURLWP(t) 203 1.2.10.2 tls 204 1.2.10.2 tls #else /* MULTIPROCESSOR */ 205 1.2.10.2 tls 206 1.2.10.2 tls #define GET_CURCPU(r) mfctl CR_CURLWP, r ! ldw L_CPU(r), r 207 1.2.10.2 tls #define GET_CURCPU_SPACE(s, r) mfctl CR_CURLWP, r ! ldw L_CPU(s, r), r 208 1.2.10.2 tls #define GET_CURLWP(r) mfctl CR_CURLWP, r 209 1.2.10.2 tls #define GET_CURLWP_SPACE(s, r) GET_CURLWP(r) 210 1.2.10.2 tls 211 1.2.10.2 tls #define SET_CURLWP(r,t) mtctl r, CR_CURLWP 212 1.2.10.2 tls 213 1.2.10.2 tls #endif /* MULTIPROCESSOR */ 214 1.2.10.2 tls 215 1.2.10.2 tls #ifndef _LOCORE 216 1.2.10.2 tls #ifdef _KERNEL 217 1.2.10.2 tls 218 1.2.10.2 tls /* 219 1.2.10.2 tls * External definitions unique to PA-RISC cpu support. 220 1.2.10.2 tls * These are the "public" declarations - those needed in 221 1.2.10.2 tls * machine-independent source code. The "private" ones 222 1.2.10.2 tls * are in machdep.h. 223 1.2.10.2 tls * 224 1.2.10.2 tls * Note that the name of this file is NOT meant to imply 225 1.2.10.2 tls * that it has anything to do with PA-RISC CPU stuff. 226 1.2.10.2 tls * The name "cpu" is historical, and used in the common 227 1.2.10.2 tls * code to identify machine-dependent functions, etc. 228 1.2.10.2 tls */ 229 1.2.10.2 tls 230 1.2.10.2 tls /* clockframe describes the system before we took an interrupt. */ 231 1.2.10.2 tls struct clockframe { 232 1.2.10.2 tls int cf_flags; 233 1.2.10.2 tls int cf_spl; 234 1.2.10.2 tls u_int cf_pc; 235 1.2.10.2 tls }; 236 1.2.10.2 tls #define CLKF_PC(framep) ((framep)->cf_pc) 237 1.2.10.2 tls #define CLKF_INTR(framep) ((framep)->cf_flags & TFF_INTR) 238 1.2.10.2 tls #define CLKF_USERMODE(framep) ((framep)->cf_flags & T_USER) 239 1.2.10.2 tls 240 1.2.10.2 tls int clock_intr(void *); 241 1.2.10.2 tls 242 1.2.10.2 tls /* 243 1.2.10.2 tls * LWP_PC: the program counter for the given lwp. 244 1.2.10.2 tls */ 245 1.2.10.2 tls #define LWP_PC(l) ((l)->l_md.md_regs->tf_iioq_head) 246 1.2.10.2 tls 247 1.2.10.2 tls #define cpu_signotify(l) (setsoftast(l)) 248 1.2.10.2 tls #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, setsoftast(l)) 249 1.2.10.2 tls 250 1.2.10.2 tls #endif /* _KERNEL */ 251 1.2.10.2 tls 252 1.2.10.2 tls #ifndef __ASSEMBLER__ 253 1.2.10.2 tls #if defined(_KERNEL) || defined(_KMEMUSER) 254 1.2.10.2 tls 255 1.2.10.2 tls #include <sys/cpu_data.h> 256 1.2.10.2 tls #include <sys/evcnt.h> 257 1.2.10.2 tls 258 1.2.10.2 tls /* 259 1.2.10.2 tls * Note that the alignment of ci_trap_save is important since we want to keep 260 1.2.10.2 tls * it within a single cache line. As a result, it must be kept as the first 261 1.2.10.2 tls * entry within the cpu_info struct. 262 1.2.10.2 tls */ 263 1.2.10.2 tls struct cpu_info { 264 1.2.10.2 tls /* Keep this first to simplify the trap handlers */ 265 1.2.10.2 tls register_t ci_trapsave[16];/* the "phys" part of frame */ 266 1.2.10.2 tls 267 1.2.10.2 tls struct cpu_data ci_data; /* MI per-cpu data */ 268 1.2.10.2 tls 269 1.2.10.2 tls #ifndef _KMEMUSER 270 1.2.10.2 tls hppa_hpa_t ci_hpa; 271 1.2.10.2 tls register_t ci_psw; /* Processor Status Word. */ 272 1.2.10.2 tls paddr_t ci_fpu_state; /* LWP FPU state address, or zero. */ 273 1.2.10.2 tls u_long ci_itmr; 274 1.2.10.2 tls 275 1.2.10.2 tls int ci_cpuid; /* CPU index (see cpus[] array) */ 276 1.2.10.2 tls int ci_mtx_count; 277 1.2.10.2 tls int ci_mtx_oldspl; 278 1.2.10.2 tls int ci_want_resched; 279 1.2.10.2 tls 280 1.2.10.2 tls volatile int ci_cpl; 281 1.2.10.2 tls volatile int ci_ipending; /* The pending interrupts. */ 282 1.2.10.2 tls u_int ci_intr_depth; /* Nonzero iff running an interrupt. */ 283 1.2.10.2 tls u_int ci_ishared; 284 1.2.10.2 tls u_int ci_eiem; 285 1.2.10.2 tls 286 1.2.10.2 tls u_int ci_imask[NIPL]; 287 1.2.10.2 tls 288 1.2.10.2 tls struct hppa_interrupt_register ci_ir; 289 1.2.10.2 tls struct hppa_interrupt_bit ci_ib[HPPA_INTERRUPT_BITS]; 290 1.2.10.2 tls 291 1.2.10.2 tls #if defined(MULTIPROCESSOR) 292 1.2.10.2 tls struct lwp *ci_curlwp; /* CPU owner */ 293 1.2.10.2 tls paddr_t ci_stack; /* stack for spin up */ 294 1.2.10.2 tls volatile int ci_flags; /* CPU status flags */ 295 1.2.10.2 tls #define CPUF_PRIMARY 0x0001 /* ... is monarch/primary */ 296 1.2.10.2 tls #define CPUF_RUNNING 0x0002 /* ... is running. */ 297 1.2.10.2 tls 298 1.2.10.2 tls volatile u_long ci_ipi; /* IPIs pending */ 299 1.2.10.2 tls 300 1.2.10.2 tls struct cpu_softc *ci_softc; 301 1.2.10.2 tls #endif 302 1.2.10.2 tls 303 1.2.10.2 tls #endif /* !_KMEMUSER */ 304 1.2.10.2 tls } __aligned(64); 305 1.2.10.2 tls 306 1.2.10.2 tls #endif /* _KERNEL || _KMEMUSER */ 307 1.2.10.2 tls #endif /* __ASSEMBLER__ */ 308 1.2.10.2 tls 309 1.2.10.2 tls #if defined(_KERNEL) 310 1.2.10.2 tls 311 1.2.10.2 tls /* 312 1.2.10.2 tls * definitions of cpu-dependent requirements 313 1.2.10.2 tls * referenced in generic code 314 1.2.10.2 tls */ 315 1.2.10.2 tls 316 1.2.10.2 tls void cpu_proc_fork(struct proc *, struct proc *); 317 1.2.10.2 tls 318 1.2.10.2 tls #ifdef MULTIPROCESSOR 319 1.2.10.2 tls 320 1.2.10.2 tls /* Number of CPUs in the system */ 321 1.2.10.2 tls extern int hppa_ncpu; 322 1.2.10.2 tls 323 1.2.10.2 tls #define HPPA_MAXCPUS 4 324 1.2.10.2 tls #define cpu_number() (curcpu()->ci_cpuid) 325 1.2.10.2 tls 326 1.2.10.2 tls #define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) 327 1.2.10.2 tls #define CPU_INFO_ITERATOR int 328 1.2.10.2 tls #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = &cpus[0]; cii < hppa_ncpu; cii++, ci++ 329 1.2.10.2 tls 330 1.2.10.2 tls void cpu_boot_secondary_processors(void); 331 1.2.10.2 tls 332 1.2.10.2 tls static __inline struct cpu_info * 333 1.2.10.2 tls hppa_curcpu(void) 334 1.2.10.2 tls { 335 1.2.10.2 tls struct cpu_info *ci; 336 1.2.10.2 tls 337 1.2.10.2 tls __asm volatile("mfctl %1, %0" : "=r" (ci): "i" (CR_CURCPU)); 338 1.2.10.2 tls 339 1.2.10.2 tls return ci; 340 1.2.10.2 tls } 341 1.2.10.2 tls 342 1.2.10.2 tls #define curcpu() hppa_curcpu() 343 1.2.10.2 tls 344 1.2.10.2 tls #else /* MULTIPROCESSOR */ 345 1.2.10.2 tls 346 1.2.10.2 tls #define HPPA_MAXCPUS 1 347 1.2.10.2 tls #define curcpu() (&cpus[0]) 348 1.2.10.2 tls #define cpu_number() 0 349 1.2.10.2 tls 350 1.2.10.2 tls static __inline struct lwp * 351 1.2.10.2 tls hppa_curlwp(void) 352 1.2.10.2 tls { 353 1.2.10.2 tls struct lwp *l; 354 1.2.10.2 tls 355 1.2.10.2 tls __asm volatile("mfctl %1, %0" : "=r" (l): "i" (CR_CURLWP)); 356 1.2.10.2 tls 357 1.2.10.2 tls return l; 358 1.2.10.2 tls } 359 1.2.10.2 tls 360 1.2.10.2 tls #define curlwp hppa_curlwp() 361 1.2.10.2 tls 362 1.2.10.2 tls #endif /* MULTIPROCESSOR */ 363 1.2.10.2 tls 364 1.2.10.2 tls extern struct cpu_info cpus[HPPA_MAXCPUS]; 365 1.2.10.2 tls 366 1.2.10.2 tls #define DELAY(x) delay(x) 367 1.2.10.2 tls 368 1.2.10.2 tls static __inline paddr_t 369 1.2.10.2 tls kvtop(const void *va) 370 1.2.10.2 tls { 371 1.2.10.2 tls paddr_t pa; 372 1.2.10.2 tls 373 1.2.10.2 tls __asm volatile ("lpa %%r0(%1), %0" : "=r" (pa) : "r" (va)); 374 1.2.10.2 tls return pa; 375 1.2.10.2 tls } 376 1.2.10.2 tls 377 1.2.10.2 tls extern int (*cpu_desidhash)(void); 378 1.2.10.2 tls 379 1.2.10.2 tls static __inline bool 380 1.2.10.2 tls hppa_cpu_ispa20_p(void) 381 1.2.10.2 tls { 382 1.2.10.2 tls 383 1.2.10.2 tls return (hppa_cpu_info->hci_features & HPPA_FTRS_W32B) != 0; 384 1.2.10.2 tls } 385 1.2.10.2 tls 386 1.2.10.2 tls static __inline bool 387 1.2.10.2 tls hppa_cpu_hastlbu_p(void) 388 1.2.10.2 tls { 389 1.2.10.2 tls 390 1.2.10.2 tls return (hppa_cpu_info->hci_features & HPPA_FTRS_TLBU) != 0; 391 1.2.10.2 tls } 392 1.2.10.2 tls 393 1.2.10.2 tls void delay(u_int); 394 1.2.10.2 tls void hppa_init(paddr_t, void *); 395 1.2.10.2 tls void trap(int, struct trapframe *); 396 1.2.10.2 tls void hppa_ras(struct lwp *); 397 1.2.10.2 tls int spcopy(pa_space_t, const void *, pa_space_t, void *, size_t); 398 1.2.10.2 tls int spstrcpy(pa_space_t, const void *, pa_space_t, void *, size_t, 399 1.2.10.2 tls size_t *); 400 1.2.10.2 tls int copy_on_fault(void); 401 1.2.10.2 tls void lwp_trampoline(void); 402 1.2.10.2 tls int cpu_dumpsize(void); 403 1.2.10.2 tls int cpu_dump(void); 404 1.2.10.2 tls 405 1.2.10.2 tls #ifdef MULTIPROCESSOR 406 1.2.10.2 tls void cpu_boot_secondary_processors(void); 407 1.2.10.2 tls void cpu_hw_init(void); 408 1.2.10.2 tls void cpu_hatch(void); 409 1.2.10.2 tls #endif 410 1.2.10.2 tls #endif /* _KERNEL */ 411 1.2.10.2 tls 412 1.2.10.2 tls /* 413 1.2.10.2 tls * Boot arguments stuff 414 1.2.10.2 tls */ 415 1.2.10.2 tls 416 1.2.10.2 tls #define BOOTARG_LEN (PAGE_SIZE) 417 1.2.10.2 tls #define BOOTARG_OFF (0x10000) 418 1.2.10.2 tls 419 1.2.10.2 tls /* 420 1.2.10.2 tls * CTL_MACHDEP definitions. 421 1.2.10.2 tls */ 422 1.2.10.2 tls #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 423 1.2.10.2 tls #define CPU_BOOTED_KERNEL 2 /* string: booted kernel name */ 424 1.2.10.2 tls #define CPU_LCD_BLINK 3 /* int: twiddle heartbeat LED/LCD */ 425 1.2.10.2 tls #define CPU_MAXID 4 /* number of valid machdep ids */ 426 1.2.10.2 tls 427 1.2.10.2 tls #ifdef _KERNEL 428 1.2.10.2 tls #include <sys/queue.h> 429 1.2.10.2 tls 430 1.2.10.2 tls struct blink_lcd { 431 1.2.10.2 tls void (*bl_func)(void *, int); 432 1.2.10.2 tls void *bl_arg; 433 1.2.10.2 tls SLIST_ENTRY(blink_lcd) bl_next; 434 1.2.10.2 tls }; 435 1.2.10.2 tls 436 1.2.10.2 tls extern void blink_lcd_register(struct blink_lcd *); 437 1.2.10.2 tls #endif /* _KERNEL */ 438 1.2.10.2 tls #endif /* !_LOCORE */ 439 1.2.10.2 tls 440 1.2.10.2 tls #endif /* _MACHINE_CPU_H_ */ 441
Indexes created Thu Oct 23 22:10:10 GMT 2025