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cpu.h revision 1.3.18.1
      1  1.3.18.1  christos /*	$NetBSD: cpu.h,v 1.3.18.1 2019/06/10 22:06:19 christos Exp $	*/
      2       1.1     skrll 
      3       1.1     skrll /*	$OpenBSD: cpu.h,v 1.55 2008/07/23 17:39:35 kettenis Exp $	*/
      4       1.1     skrll 
      5       1.1     skrll /*
      6       1.1     skrll  * Copyright (c) 2000-2004 Michael Shalayeff
      7       1.1     skrll  * All rights reserved.
      8       1.1     skrll  *
      9       1.1     skrll  * Redistribution and use in source and binary forms, with or without
     10       1.1     skrll  * modification, are permitted provided that the following conditions
     11       1.1     skrll  * are met:
     12       1.1     skrll  * 1. Redistributions of source code must retain the above copyright
     13       1.1     skrll  *    notice, this list of conditions and the following disclaimer.
     14       1.1     skrll  * 2. Redistributions in binary form must reproduce the above copyright
     15       1.1     skrll  *    notice, this list of conditions and the following disclaimer in the
     16       1.1     skrll  *    documentation and/or other materials provided with the distribution.
     17       1.1     skrll  *
     18       1.1     skrll  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19       1.1     skrll  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20       1.1     skrll  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21       1.1     skrll  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
     22       1.1     skrll  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     23       1.1     skrll  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     24       1.1     skrll  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     25       1.1     skrll  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     26       1.1     skrll  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
     27       1.1     skrll  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     28       1.1     skrll  * THE POSSIBILITY OF SUCH DAMAGE.
     29       1.1     skrll  */
     30       1.1     skrll /*
     31       1.1     skrll  * Copyright (c) 1988-1994, The University of Utah and
     32       1.1     skrll  * the Computer Systems Laboratory at the University of Utah (CSL).
     33       1.1     skrll  * All rights reserved.
     34       1.1     skrll  *
     35       1.1     skrll  * Permission to use, copy, modify and distribute this software is hereby
     36       1.1     skrll  * granted provided that (1) source code retains these copyright, permission,
     37       1.1     skrll  * and disclaimer notices, and (2) redistributions including binaries
     38       1.1     skrll  * reproduce the notices in supporting documentation, and (3) all advertising
     39       1.1     skrll  * materials mentioning features or use of this software display the following
     40       1.1     skrll  * acknowledgement: ``This product includes software developed by the
     41       1.1     skrll  * Computer Systems Laboratory at the University of Utah.''
     42       1.1     skrll  *
     43       1.1     skrll  * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
     44       1.1     skrll  * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
     45       1.1     skrll  * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     46       1.1     skrll  *
     47       1.1     skrll  * CSL requests users of this software to return to csl-dist (at) cs.utah.edu any
     48       1.1     skrll  * improvements that they make and grant CSL redistribution rights.
     49       1.1     skrll  *
     50       1.1     skrll  * 	Utah $Hdr: cpu.h 1.19 94/12/16$
     51       1.1     skrll  */
     52       1.1     skrll 
     53       1.1     skrll #ifndef	_MACHINE_CPU_H_
     54       1.1     skrll #define	_MACHINE_CPU_H_
     55       1.1     skrll 
     56       1.1     skrll #ifdef _KERNEL_OPT
     57       1.1     skrll #include "opt_cputype.h"
     58       1.1     skrll #include "opt_multiprocessor.h"
     59       1.1     skrll #endif
     60       1.1     skrll 
     61       1.1     skrll #include <machine/trap.h>
     62       1.1     skrll #include <machine/frame.h>
     63       1.1     skrll #include <machine/reg.h>
     64       1.1     skrll #include <machine/intrdefs.h>
     65       1.1     skrll 
     66       1.1     skrll #ifndef __ASSEMBLER__
     67       1.1     skrll #include <machine/intr.h>
     68       1.1     skrll #endif
     69       1.1     skrll 
     70       1.1     skrll #ifndef _LOCORE
     71       1.1     skrll 
     72       1.1     skrll /* types */
     73       1.1     skrll enum hppa_cpu_type {
     74       1.1     skrll 	hpc_unknown,
     75       1.1     skrll 	hpcx,	/* PA7000 (x)		PA 1.0 */
     76       1.1     skrll 	hpcxs,	/* PA7000 (s)		PA 1.1a */
     77       1.1     skrll 	hpcxt,	/* PA7100 (t)		PA 1.1b */
     78       1.1     skrll 	hpcxl,	/* PA7100LC (l)		PA 1.1c */
     79       1.1     skrll 	hpcxtp,	/* PA7200 (t')		PA 1.1d */
     80       1.1     skrll 	hpcxl2,	/* PA7300LC (l2)	PA 1.1e */
     81       1.1     skrll 	hpcxu,	/* PA8000 (u)		PA 2.0 */
     82  1.3.18.1  christos 	hpcxup,	/* PA8200 (u+)		PA 2.0 */
     83       1.1     skrll 	hpcxw,	/* PA8500 (w)		PA 2.0 */
     84       1.1     skrll 	hpcxwp,	/* PA8600 (w+)		PA 2.0 */
     85       1.1     skrll 	hpcxw2, /* PA8700 (piranha)	PA 2.0 */
     86       1.1     skrll 	mako	/* PA8800 (mako)	PA 2.0 */
     87       1.1     skrll };
     88       1.1     skrll 
     89       1.3  christos #ifdef _KERNEL
     90       1.1     skrll /*
     91       1.1     skrll  * A CPU description.
     92       1.1     skrll  */
     93       1.1     skrll struct hppa_cpu_info {
     94       1.1     skrll 	/* The official name of the chip. */
     95       1.1     skrll 	const char *hci_chip_name;
     96       1.1     skrll 
     97       1.1     skrll 	/* The nickname for the chip. */
     98       1.1     skrll 	const char *hci_chip_nickname;
     99       1.1     skrll 
    100       1.1     skrll 	/* The type and PA-RISC specification of the chip. */
    101       1.1     skrll 	const char hci_chip_type[8];
    102       1.1     skrll 	enum hppa_cpu_type hci_cputype;
    103       1.1     skrll 	int  hci_cpuversion;
    104       1.1     skrll 	int  hci_features;		/* CPU types and features */
    105       1.1     skrll #define	HPPA_FTRS_TLBU		0x00000001
    106       1.1     skrll #define	HPPA_FTRS_BTLBU		0x00000002
    107       1.1     skrll #define	HPPA_FTRS_HVT		0x00000004
    108       1.1     skrll #define	HPPA_FTRS_W32B		0x00000008
    109       1.1     skrll 
    110       1.1     skrll 	const char *hci_chip_spec;
    111       1.1     skrll 
    112       1.1     skrll 	int (*desidhash)(void);
    113       1.1     skrll 	const u_int *itlbh, *dtlbh, *itlbnah, *dtlbnah, *tlbdh;
    114       1.1     skrll 	int (*dbtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int);
    115       1.1     skrll 	int (*ibtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int);
    116       1.1     skrll 	int (*btlbprg)(int);
    117       1.1     skrll 	int (*hptinit)(vaddr_t, vsize_t);
    118       1.1     skrll };
    119       1.1     skrll 
    120       1.1     skrll extern const struct hppa_cpu_info *hppa_cpu_info;
    121       1.1     skrll extern int cpu_modelno;
    122       1.1     skrll extern int cpu_revision;
    123       1.1     skrll #endif
    124       1.1     skrll #endif
    125       1.1     skrll 
    126       1.1     skrll /*
    127       1.1     skrll  * COPR/SFUs
    128       1.1     skrll  */
    129       1.1     skrll #define	HPPA_FPUS	0xc0
    130       1.1     skrll #define	HPPA_PMSFUS	0x20	/* ??? */
    131       1.1     skrll 
    132       1.1     skrll /*
    133       1.1     skrll  * Exported definitions unique to hppa/PA-RISC cpu support.
    134       1.1     skrll  */
    135       1.1     skrll 
    136       1.1     skrll /*
    137       1.1     skrll  * COPR/SFUs
    138       1.1     skrll  */
    139       1.1     skrll #define	HPPA_FPUVER(w)	(((w) & 0x003ff800) >> 11)
    140       1.1     skrll #define	HPPA_FPU_OP(w)	((w) >> 26)
    141       1.1     skrll #define	HPPA_FPU_UNMPL	0x01	/* exception reg, the rest is << 1 */
    142       1.1     skrll #define	HPPA_FPU_ILL	0x80	/* software-only */
    143       1.1     skrll #define	HPPA_FPU_I	0x01
    144       1.1     skrll #define	HPPA_FPU_U	0x02
    145       1.1     skrll #define	HPPA_FPU_O	0x04
    146       1.1     skrll #define	HPPA_FPU_Z	0x08
    147       1.1     skrll #define	HPPA_FPU_V	0x10
    148       1.1     skrll #define	HPPA_FPU_D	0x20
    149       1.1     skrll #define	HPPA_FPU_T	0x40
    150       1.1     skrll #define	HPPA_FPU_XMASK	0x7f
    151       1.1     skrll #define	HPPA_FPU_T_POS	25
    152       1.1     skrll #define	HPPA_FPU_RM	0x00000600
    153       1.1     skrll #define	HPPA_FPU_CQ	0x00fff800
    154       1.1     skrll #define	HPPA_FPU_C	0x04000000
    155       1.1     skrll #define	HPPA_FPU_FLSH	27
    156       1.1     skrll #define	HPPA_FPU_INIT	(0)
    157       1.1     skrll #define	HPPA_FPU_FORK(s) ((s) & ~((uint64_t)(HPPA_FPU_XMASK) << 32))
    158       1.1     skrll 
    159       1.1     skrll /*
    160       1.1     skrll  * definitions of cpu-dependent requirements
    161       1.1     skrll  * referenced in generic code
    162       1.1     skrll  */
    163       1.1     skrll #if defined(HP8000_CPU) || defined(HP8200_CPU) || \
    164       1.1     skrll     defined(HP8500_CPU) || defined(HP8600_CPU)
    165       1.1     skrll 
    166       1.1     skrll /* PA2.0 aliases */
    167       1.1     skrll #define	HPPA_PGALIAS	0x00400000
    168       1.1     skrll #define	HPPA_PGAMASK	0xffc00000	/* PA bits 0-9 not used in index */
    169       1.1     skrll #define	HPPA_PGAOFF	0x003fffff
    170       1.1     skrll 
    171       1.1     skrll #else
    172       1.1     skrll 
    173       1.1     skrll /* PA1.x aliases */
    174       1.1     skrll #define	HPPA_PGALIAS	0x00100000
    175       1.1     skrll #define	HPPA_PGAMASK	0xfff00000	/* PA bits 0-11 not used in index */
    176       1.1     skrll #define	HPPA_PGAOFF	0x000fffff
    177       1.1     skrll 
    178       1.1     skrll #endif
    179       1.1     skrll 
    180       1.1     skrll #define	HPPA_SPAMASK	0xf0f0f000	/* PA bits 0-3,8-11,16-19 not used */
    181       1.1     skrll 
    182       1.1     skrll #define	HPPA_IOSPACE	0xf0000000
    183       1.1     skrll #define	HPPA_IOLEN      0x10000000
    184       1.1     skrll #define	HPPA_PDC_LOW	0xef000000
    185       1.1     skrll #define	HPPA_PDC_HIGH	0xf1000000
    186       1.1     skrll #define	HPPA_IOBCAST	0xfffc0000
    187       1.1     skrll #define	HPPA_LBCAST	0xfffc0000
    188       1.1     skrll #define	HPPA_GBCAST	0xfffe0000
    189       1.1     skrll #define	HPPA_FPA	0xfff80000
    190       1.1     skrll #define	HPPA_FLEX_DATA	0xfff80001
    191       1.1     skrll #define	HPPA_DMA_ENABLE	0x00000001
    192       1.1     skrll #define	HPPA_SPA_ENABLE	0x00000020
    193       1.1     skrll #define	HPPA_NMODSPBUS	64
    194       1.1     skrll 
    195       1.1     skrll #ifdef MULTIPROCESSOR
    196       1.1     skrll 
    197       1.1     skrll #define	GET_CURCPU(r)		mfctl CR_CURCPU, r
    198       1.1     skrll #define	GET_CURCPU_SPACE(s, r)	GET_CURCPU(r)
    199       1.1     skrll #define	GET_CURLWP(r)		mfctl CR_CURCPU, r ! ldw CI_CURLWP(r), r
    200       1.1     skrll #define	GET_CURLWP_SPACE(s, r)	mfctl CR_CURCPU, r ! ldw CI_CURLWP(s, r), r
    201       1.1     skrll 
    202       1.1     skrll #define	SET_CURLWP(r,t)		mfctl CR_CURCPU, t ! stw r, CI_CURLWP(t)
    203       1.1     skrll 
    204       1.1     skrll #else /*  MULTIPROCESSOR */
    205       1.1     skrll 
    206       1.1     skrll #define	GET_CURCPU(r)		mfctl CR_CURLWP, r ! ldw L_CPU(r), r
    207       1.1     skrll #define	GET_CURCPU_SPACE(s, r)	mfctl CR_CURLWP, r ! ldw L_CPU(s, r), r
    208       1.1     skrll #define	GET_CURLWP(r)		mfctl CR_CURLWP, r
    209       1.1     skrll #define	GET_CURLWP_SPACE(s, r)	GET_CURLWP(r)
    210       1.1     skrll 
    211       1.1     skrll #define	SET_CURLWP(r,t) mtctl   r, CR_CURLWP
    212       1.1     skrll 
    213       1.1     skrll #endif /*  MULTIPROCESSOR */
    214       1.1     skrll 
    215       1.1     skrll #ifndef _LOCORE
    216       1.1     skrll #ifdef _KERNEL
    217       1.1     skrll 
    218       1.1     skrll /*
    219       1.1     skrll  * External definitions unique to PA-RISC cpu support.
    220       1.1     skrll  * These are the "public" declarations - those needed in
    221       1.1     skrll  * machine-independent source code.  The "private" ones
    222       1.1     skrll  * are in machdep.h.
    223       1.1     skrll  *
    224       1.1     skrll  * Note that the name of this file is NOT meant to imply
    225       1.1     skrll  * that it has anything to do with PA-RISC CPU stuff.
    226       1.1     skrll  * The name "cpu" is historical, and used in the common
    227       1.1     skrll  * code to identify machine-dependent functions, etc.
    228       1.1     skrll  */
    229       1.1     skrll 
    230       1.1     skrll /* clockframe describes the system before we took an interrupt. */
    231       1.1     skrll struct clockframe {
    232       1.1     skrll 	int	cf_flags;
    233       1.1     skrll 	int	cf_spl;
    234       1.1     skrll 	u_int	cf_pc;
    235       1.1     skrll };
    236       1.1     skrll #define	CLKF_PC(framep)		((framep)->cf_pc)
    237       1.1     skrll #define	CLKF_INTR(framep)	((framep)->cf_flags & TFF_INTR)
    238       1.1     skrll #define	CLKF_USERMODE(framep)	((framep)->cf_flags & T_USER)
    239       1.1     skrll 
    240       1.1     skrll int	clock_intr(void *);
    241       1.1     skrll 
    242       1.1     skrll /*
    243       1.1     skrll  * LWP_PC: the program counter for the given lwp.
    244       1.1     skrll  */
    245       1.1     skrll #define	LWP_PC(l)		((l)->l_md.md_regs->tf_iioq_head)
    246       1.1     skrll 
    247       1.1     skrll #define	cpu_signotify(l)	(setsoftast(l))
    248       1.1     skrll #define	cpu_need_proftick(l)	((l)->l_pflag |= LP_OWEUPC, setsoftast(l))
    249       1.1     skrll 
    250       1.1     skrll #endif /* _KERNEL */
    251       1.1     skrll 
    252       1.1     skrll #ifndef __ASSEMBLER__
    253       1.1     skrll #if defined(_KERNEL) || defined(_KMEMUSER)
    254       1.1     skrll 
    255       1.1     skrll #include <sys/cpu_data.h>
    256       1.1     skrll #include <sys/evcnt.h>
    257       1.1     skrll 
    258       1.1     skrll /*
    259       1.1     skrll  * Note that the alignment of ci_trap_save is important since we want to keep
    260       1.1     skrll  * it within a single cache line.  As a result, it must be kept as the first
    261       1.1     skrll  * entry within the cpu_info struct.
    262       1.1     skrll  */
    263       1.1     skrll struct cpu_info {
    264       1.1     skrll 	/* Keep this first to simplify the trap handlers */
    265       1.1     skrll 	register_t	ci_trapsave[16];/* the "phys" part of frame */
    266       1.1     skrll 
    267       1.1     skrll 	struct cpu_data ci_data;	/* MI per-cpu data */
    268       1.1     skrll 
    269       1.1     skrll #ifndef _KMEMUSER
    270       1.1     skrll 	hppa_hpa_t	ci_hpa;
    271       1.1     skrll 	register_t	ci_psw;		/* Processor Status Word. */
    272       1.1     skrll 	paddr_t		ci_fpu_state;	/* LWP FPU state address, or zero. */
    273       1.1     skrll 	u_long		ci_itmr;
    274       1.1     skrll 
    275       1.1     skrll 	int		ci_cpuid;	/* CPU index (see cpus[] array) */
    276       1.1     skrll 	int		ci_mtx_count;
    277       1.1     skrll 	int		ci_mtx_oldspl;
    278       1.1     skrll 	int		ci_want_resched;
    279       1.1     skrll 
    280       1.1     skrll 	volatile int	ci_cpl;
    281       1.1     skrll 	volatile int	ci_ipending;	/* The pending interrupts. */
    282       1.1     skrll 	u_int		ci_intr_depth;	/* Nonzero iff running an interrupt. */
    283       1.1     skrll 	u_int		ci_ishared;
    284       1.1     skrll 	u_int		ci_eiem;
    285       1.1     skrll 
    286       1.1     skrll 	u_int		ci_imask[NIPL];
    287       1.1     skrll 
    288       1.1     skrll 	struct hppa_interrupt_register	ci_ir;
    289       1.1     skrll 	struct hppa_interrupt_bit	ci_ib[HPPA_INTERRUPT_BITS];
    290  1.3.18.1  christos 
    291       1.1     skrll #if defined(MULTIPROCESSOR)
    292       1.1     skrll 	struct lwp	*ci_curlwp;	/* CPU owner */
    293       1.1     skrll 	paddr_t		ci_stack;	/* stack for spin up */
    294       1.1     skrll 	volatile int	ci_flags;	/* CPU status flags */
    295       1.1     skrll #define	CPUF_PRIMARY	0x0001		/* ... is monarch/primary */
    296       1.1     skrll #define	CPUF_RUNNING	0x0002 		/* ... is running. */
    297       1.1     skrll 
    298       1.1     skrll 	volatile u_long	ci_ipi;		/* IPIs pending */
    299       1.1     skrll 
    300       1.1     skrll 	struct cpu_softc *ci_softc;
    301       1.1     skrll #endif
    302       1.1     skrll 
    303       1.1     skrll #endif /* !_KMEMUSER */
    304       1.1     skrll } __aligned(64);
    305       1.1     skrll 
    306       1.1     skrll #endif /* _KERNEL || _KMEMUSER */
    307       1.1     skrll #endif /* __ASSEMBLER__ */
    308       1.1     skrll 
    309       1.1     skrll #if defined(_KERNEL)
    310       1.1     skrll 
    311       1.1     skrll /*
    312       1.1     skrll  * definitions of cpu-dependent requirements
    313       1.1     skrll  * referenced in generic code
    314       1.1     skrll  */
    315       1.1     skrll 
    316       1.2     skrll void	cpu_proc_fork(struct proc *, struct proc *);
    317       1.1     skrll 
    318       1.1     skrll #ifdef MULTIPROCESSOR
    319       1.1     skrll 
    320       1.1     skrll /* Number of CPUs in the system */
    321       1.1     skrll extern int hppa_ncpu;
    322       1.1     skrll 
    323       1.1     skrll #define	HPPA_MAXCPUS	4
    324       1.1     skrll #define	cpu_number()			(curcpu()->ci_cpuid)
    325       1.1     skrll 
    326       1.1     skrll #define	CPU_IS_PRIMARY(ci)		((ci)->ci_cpuid == 0)
    327       1.1     skrll #define	CPU_INFO_ITERATOR		int
    328       1.1     skrll #define	CPU_INFO_FOREACH(cii, ci)	cii = 0, ci =  &cpus[0]; cii < hppa_ncpu; cii++, ci++
    329       1.1     skrll 
    330       1.1     skrll void	cpu_boot_secondary_processors(void);
    331       1.1     skrll 
    332       1.1     skrll static __inline struct cpu_info *
    333       1.1     skrll hppa_curcpu(void)
    334       1.1     skrll {
    335       1.1     skrll 	struct cpu_info *ci;
    336       1.1     skrll 
    337       1.1     skrll 	__asm volatile("mfctl %1, %0" : "=r" (ci): "i" (CR_CURCPU));
    338       1.1     skrll 
    339       1.1     skrll 	return ci;
    340       1.1     skrll }
    341       1.1     skrll 
    342       1.1     skrll #define	curcpu()			hppa_curcpu()
    343       1.1     skrll 
    344       1.1     skrll #else /*  MULTIPROCESSOR */
    345       1.1     skrll 
    346       1.1     skrll #define	HPPA_MAXCPUS	1
    347       1.1     skrll #define	curcpu()			(&cpus[0])
    348       1.1     skrll #define	cpu_number()			0
    349       1.1     skrll 
    350       1.1     skrll static __inline struct lwp *
    351       1.1     skrll hppa_curlwp(void)
    352       1.1     skrll {
    353       1.1     skrll 	struct lwp *l;
    354       1.1     skrll 
    355       1.1     skrll 	__asm volatile("mfctl %1, %0" : "=r" (l): "i" (CR_CURLWP));
    356       1.1     skrll 
    357       1.1     skrll 	return l;
    358       1.1     skrll }
    359       1.1     skrll 
    360       1.1     skrll #define	curlwp				hppa_curlwp()
    361       1.1     skrll 
    362       1.1     skrll #endif /* MULTIPROCESSOR */
    363       1.1     skrll 
    364       1.1     skrll extern struct cpu_info cpus[HPPA_MAXCPUS];
    365       1.1     skrll 
    366       1.1     skrll #define	DELAY(x) delay(x)
    367       1.1     skrll 
    368       1.1     skrll static __inline paddr_t
    369       1.1     skrll kvtop(const void *va)
    370       1.1     skrll {
    371       1.1     skrll 	paddr_t pa;
    372       1.1     skrll 
    373       1.1     skrll 	__asm volatile ("lpa %%r0(%1), %0" : "=r" (pa) : "r" (va));
    374       1.1     skrll 	return pa;
    375       1.1     skrll }
    376       1.1     skrll 
    377       1.1     skrll extern int (*cpu_desidhash)(void);
    378       1.1     skrll 
    379       1.1     skrll static __inline bool
    380       1.1     skrll hppa_cpu_ispa20_p(void)
    381       1.1     skrll {
    382       1.1     skrll 
    383       1.1     skrll 	return (hppa_cpu_info->hci_features & HPPA_FTRS_W32B) != 0;
    384       1.1     skrll }
    385       1.1     skrll 
    386       1.1     skrll static __inline bool
    387       1.1     skrll hppa_cpu_hastlbu_p(void)
    388       1.1     skrll {
    389       1.1     skrll 
    390       1.1     skrll 	return (hppa_cpu_info->hci_features & HPPA_FTRS_TLBU) != 0;
    391       1.1     skrll }
    392       1.1     skrll 
    393       1.1     skrll void	delay(u_int);
    394       1.1     skrll void	hppa_init(paddr_t, void *);
    395       1.1     skrll void	trap(int, struct trapframe *);
    396       1.1     skrll void	hppa_ras(struct lwp *);
    397       1.1     skrll int	spcopy(pa_space_t, const void *, pa_space_t, void *, size_t);
    398       1.1     skrll int	spstrcpy(pa_space_t, const void *, pa_space_t, void *, size_t,
    399       1.1     skrll     size_t *);
    400       1.1     skrll int	copy_on_fault(void);
    401       1.1     skrll void	lwp_trampoline(void);
    402       1.1     skrll int	cpu_dumpsize(void);
    403       1.1     skrll int	cpu_dump(void);
    404       1.1     skrll 
    405       1.1     skrll #ifdef MULTIPROCESSOR
    406       1.1     skrll void	cpu_boot_secondary_processors(void);
    407       1.1     skrll void	cpu_hw_init(void);
    408       1.1     skrll void	cpu_hatch(void);
    409       1.1     skrll #endif
    410       1.1     skrll #endif	/* _KERNEL */
    411       1.1     skrll 
    412       1.1     skrll /*
    413       1.1     skrll  * Boot arguments stuff
    414       1.1     skrll  */
    415       1.1     skrll 
    416       1.1     skrll #define	BOOTARG_LEN	(PAGE_SIZE)
    417       1.1     skrll #define	BOOTARG_OFF	(0x10000)
    418       1.1     skrll 
    419       1.1     skrll /*
    420       1.1     skrll  * CTL_MACHDEP definitions.
    421       1.1     skrll  */
    422       1.1     skrll #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    423       1.1     skrll #define	CPU_BOOTED_KERNEL	2	/* string: booted kernel name */
    424       1.1     skrll #define	CPU_LCD_BLINK           3	/* int: twiddle heartbeat LED/LCD */
    425       1.1     skrll 
    426       1.1     skrll #ifdef _KERNEL
    427       1.1     skrll #include <sys/queue.h>
    428       1.1     skrll 
    429       1.1     skrll struct blink_lcd {
    430       1.1     skrll 	void (*bl_func)(void *, int);
    431       1.1     skrll 	void *bl_arg;
    432       1.1     skrll 	SLIST_ENTRY(blink_lcd) bl_next;
    433       1.1     skrll };
    434       1.1     skrll 
    435       1.1     skrll extern void blink_lcd_register(struct blink_lcd *);
    436       1.1     skrll #endif	/* _KERNEL */
    437       1.1     skrll #endif	/* !_LOCORE */
    438       1.1     skrll 
    439       1.1     skrll #endif /* _MACHINE_CPU_H_ */
    440