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      1  1.17     skrll /*	$NetBSD: cpufunc.h,v 1.17 2012/05/21 07:42:51 skrll Exp $	*/
      2   1.1  fredette 
      3   1.1  fredette /*	$OpenBSD: cpufunc.h,v 1.17 2000/05/15 17:22:40 mickey Exp $	*/
      4   1.1  fredette 
      5   1.1  fredette /*
      6  1.12       snj  * Copyright (c) 1998-2004 Michael Shalayeff
      7   1.1  fredette  * All rights reserved.
      8   1.1  fredette  *
      9   1.1  fredette  * Redistribution and use in source and binary forms, with or without
     10   1.1  fredette  * modification, are permitted provided that the following conditions
     11   1.1  fredette  * are met:
     12   1.1  fredette  * 1. Redistributions of source code must retain the above copyright
     13   1.1  fredette  *    notice, this list of conditions and the following disclaimer.
     14   1.1  fredette  * 2. Redistributions in binary form must reproduce the above copyright
     15   1.1  fredette  *    notice, this list of conditions and the following disclaimer in the
     16   1.1  fredette  *    documentation and/or other materials provided with the distribution.
     17   1.1  fredette  *
     18   1.1  fredette  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19   1.1  fredette  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20   1.1  fredette  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21  1.12       snj  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
     22  1.12       snj  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     23  1.12       snj  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     24  1.12       snj  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     25  1.12       snj  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     26  1.12       snj  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
     27  1.12       snj  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     28  1.12       snj  * THE POSSIBILITY OF SUCH DAMAGE.
     29   1.1  fredette  */
     30   1.1  fredette /*
     31   1.1  fredette  *  (c) Copyright 1988 HEWLETT-PACKARD COMPANY
     32   1.1  fredette  *
     33   1.1  fredette  *  To anyone who acknowledges that this file is provided "AS IS"
     34   1.1  fredette  *  without any express or implied warranty:
     35   1.1  fredette  *      permission to use, copy, modify, and distribute this file
     36   1.1  fredette  *  for any purpose is hereby granted without fee, provided that
     37   1.1  fredette  *  the above copyright notice and this notice appears in all
     38   1.1  fredette  *  copies, and that the name of Hewlett-Packard Company not be
     39   1.1  fredette  *  used in advertising or publicity pertaining to distribution
     40   1.1  fredette  *  of the software without specific, written prior permission.
     41   1.1  fredette  *  Hewlett-Packard Company makes no representations about the
     42   1.1  fredette  *  suitability of this software for any purpose.
     43   1.1  fredette  */
     44   1.1  fredette /*
     45   1.1  fredette  * Copyright (c) 1990,1994 The University of Utah and
     46   1.1  fredette  * the Computer Systems Laboratory (CSL).  All rights reserved.
     47   1.1  fredette  *
     48   1.1  fredette  * THE UNIVERSITY OF UTAH AND CSL PROVIDE THIS SOFTWARE IN ITS "AS IS"
     49   1.1  fredette  * CONDITION, AND DISCLAIM ANY LIABILITY OF ANY KIND FOR ANY DAMAGES
     50   1.1  fredette  * WHATSOEVER RESULTING FROM ITS USE.
     51   1.1  fredette  *
     52   1.1  fredette  * CSL requests users of this software to return to csl-dist (at) cs.utah.edu any
     53   1.1  fredette  * improvements that they make and grant CSL redistribution rights.
     54   1.1  fredette  *
     55   1.1  fredette  * 	Utah $Hdr: c_support.s 1.8 94/12/14$
     56   1.1  fredette  *	Author: Bob Wheeler, University of Utah CSL
     57   1.1  fredette  */
     58   1.1  fredette 
     59   1.1  fredette #ifndef _HPPA_CPUFUNC_H_
     60   1.1  fredette #define _HPPA_CPUFUNC_H_
     61   1.1  fredette 
     62   1.1  fredette #include <machine/psl.h>
     63   1.1  fredette #include <machine/pte.h>
     64   1.1  fredette 
     65   1.1  fredette #define tlbbtop(b) ((b) >> (PGSHIFT - 5))
     66   1.1  fredette #define tlbptob(p) ((p) << (PGSHIFT - 5))
     67   1.1  fredette 
     68   1.1  fredette #define hptbtop(b) ((b) >> 17)
     69   1.1  fredette 
     70   1.1  fredette /* Get space register for an address */
     71  1.13     skrll static __inline register_t
     72  1.13     skrll ldsid(vaddr_t p) {
     73   1.1  fredette 	register_t ret;
     74   1.6     perry 	__asm volatile("ldsid (%1),%0" : "=r" (ret) : "r" (p));
     75   1.1  fredette 	return ret;
     76   1.1  fredette }
     77   1.1  fredette 
     78   1.6     perry #define mtctl(v,r) __asm volatile("mtctl %0,%1":: "r" (v), "i" (r))
     79   1.6     perry #define mfctl(r,v) __asm volatile("mfctl %1,%0": "=r" (v): "i" (r))
     80   1.1  fredette 
     81   1.4     jkunz #define mfcpu(r,v)	/* XXX for the lack of the mnemonics */		\
     82   1.6     perry 	__asm volatile("diag  %1\n\t"					\
     83   1.4     jkunz 			 "copy  %%r22, %0"				\
     84   1.4     jkunz 	: "=r" (v) : "i" ((0x1400 | ((r) << 21) | (22))) : "r22")
     85   1.4     jkunz 
     86   1.6     perry #define mtsp(v,r) __asm volatile("mtsp %0,%1":: "r" (v), "i" (r))
     87   1.6     perry #define mfsp(r,v) __asm volatile("mfsp %1,%0": "=r" (v): "i" (r))
     88   1.1  fredette 
     89   1.6     perry #define ssm(v,r) __asm volatile("ssm %1,%0": "=r" (r): "i" (v))
     90   1.6     perry #define rsm(v,r) __asm volatile("rsm %1,%0": "=r" (r): "i" (v))
     91   1.1  fredette 
     92  1.14     skrll 
     93  1.14     skrll /* Get coherence index for an address */
     94  1.14     skrll static __inline register_t
     95  1.14     skrll lci(pa_space_t sp, vaddr_t va) {
     96  1.14     skrll 	register_t ret;
     97  1.14     skrll 
     98  1.14     skrll 	mtsp((sp), 1);	\
     99  1.14     skrll 	__asm volatile("lci 0(%%sr1, %1), %0" : "=r" (ret) : "r" (va));
    100  1.14     skrll 
    101  1.14     skrll 	return ret;
    102  1.14     skrll }
    103  1.14     skrll 
    104  1.14     skrll 
    105   1.1  fredette /* Move to system mask. Old value of system mask is returned. */
    106   1.7     perry static __inline register_t mtsm(register_t mask) {
    107   1.1  fredette 	register_t ret;
    108   1.9     skrll 	__asm volatile(
    109   1.9     skrll 	    "ssm 0,%0\n\t"
    110   1.9     skrll 	    "mtsm %1": "=&r" (ret) : "r" (mask));
    111   1.1  fredette 	return ret;
    112   1.1  fredette }
    113   1.1  fredette 
    114   1.6     perry #define	fdce(sp,off) __asm volatile("fdce 0(%0,%1)":: "i" (sp), "r" (off))
    115   1.6     perry #define	fice(sp,off) __asm volatile("fice 0(%0,%1)":: "i" (sp), "r" (off))
    116   1.1  fredette #define sync_caches() \
    117   1.8     skrll     __asm volatile("sync\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop":::"memory")
    118   1.1  fredette 
    119   1.7     perry static __inline void
    120   1.1  fredette iitlba(u_int pg, pa_space_t sp, vaddr_t va)
    121   1.1  fredette {
    122   1.1  fredette 	mtsp(sp, 1);
    123   1.1  fredette 	__asm volatile("iitlba %0,(%%sr1, %1)":: "r" (pg), "r" (va));
    124   1.1  fredette }
    125   1.1  fredette 
    126   1.7     perry static __inline void
    127   1.1  fredette idtlba(u_int pg, pa_space_t sp, vaddr_t va)
    128   1.1  fredette {
    129   1.1  fredette 	mtsp(sp, 1);
    130   1.1  fredette 	__asm volatile("idtlba %0,(%%sr1, %1)":: "r" (pg), "r" (va));
    131   1.1  fredette }
    132   1.1  fredette 
    133   1.7     perry static __inline void
    134   1.1  fredette iitlbp(u_int prot, pa_space_t sp, vaddr_t va)
    135   1.1  fredette {
    136   1.1  fredette 	mtsp(sp, 1);
    137   1.1  fredette 	__asm volatile("iitlbp %0,(%%sr1, %1)":: "r" (prot), "r" (va));
    138   1.1  fredette }
    139   1.1  fredette 
    140   1.7     perry static __inline void
    141   1.1  fredette idtlbp(u_int prot, pa_space_t sp, vaddr_t va)
    142   1.1  fredette {
    143   1.1  fredette 	mtsp(sp, 1);
    144   1.1  fredette 	__asm volatile("idtlbp %0,(%%sr1, %1)":: "r" (prot), "r" (va));
    145   1.1  fredette }
    146   1.1  fredette 
    147   1.7     perry static __inline void
    148   1.1  fredette pitlb(pa_space_t sp, vaddr_t va)
    149   1.1  fredette {
    150   1.1  fredette 	mtsp(sp, 1);
    151   1.1  fredette 	__asm volatile("pitlb %%r0(%%sr1, %0)":: "r" (va));
    152   1.1  fredette }
    153   1.1  fredette 
    154   1.7     perry static __inline void
    155   1.1  fredette pdtlb(pa_space_t sp, vaddr_t va)
    156   1.1  fredette {
    157   1.1  fredette 	mtsp(sp, 1);
    158   1.1  fredette 	__asm volatile("pdtlb %%r0(%%sr1, %0)":: "r" (va));
    159   1.1  fredette }
    160   1.1  fredette 
    161   1.7     perry static __inline void
    162   1.1  fredette pitlbe(pa_space_t sp, vaddr_t va)
    163   1.1  fredette {
    164   1.1  fredette 	mtsp(sp, 1);
    165   1.1  fredette 	__asm volatile("pitlbe %%r0(%%sr1, %0)":: "r" (va));
    166   1.1  fredette }
    167   1.1  fredette 
    168   1.7     perry static __inline void
    169   1.1  fredette pdtlbe(pa_space_t sp, vaddr_t va)
    170   1.1  fredette {
    171   1.1  fredette 	mtsp(sp, 1);
    172   1.1  fredette 	__asm volatile("pdtlbe %%r0(%%sr1, %0)":: "r" (va));
    173   1.1  fredette }
    174   1.1  fredette 
    175  1.17     skrll static __inline void
    176  1.17     skrll hppa_disable_irq(void)
    177  1.17     skrll {
    178  1.17     skrll         __asm volatile("rsm %0, %%r0" :: "i" (PSW_I) : "memory");
    179  1.17     skrll }
    180  1.17     skrll 
    181  1.17     skrll static __inline void
    182  1.17     skrll hppa_enable_irq(void)
    183  1.17     skrll {
    184  1.17     skrll         __asm volatile("ssm %0, %%r0" :: "i" (PSW_I) : "memory");
    185  1.17     skrll }
    186  1.17     skrll 
    187   1.1  fredette #ifdef _KERNEL
    188  1.11     skrll extern int (*cpu_hpt_init)(vaddr_t, vsize_t);
    189  1.11     skrll 
    190  1.11     skrll void ficache(pa_space_t, vaddr_t, vsize_t);
    191  1.11     skrll void fdcache(pa_space_t, vaddr_t, vsize_t);
    192  1.11     skrll void pdcache(pa_space_t, vaddr_t, vsize_t);
    193   1.9     skrll void fcacheall(void);
    194   1.9     skrll void ptlball(void);
    195   1.1  fredette 
    196   1.3     jkunz #define PCXL2_ACCEL_IO_START		0xf4000000
    197   1.3     jkunz #define PCXL2_ACCEL_IO_END		(0xfc000000 - 1)
    198   1.3     jkunz #define PCXL2_ACCEL_IO_ADDR2MASK(a)	(0x8 >> ((((a) >> 25) - 2) & 3))
    199   1.3     jkunz void eaio_l2(int);
    200   1.3     jkunz 
    201   1.1  fredette #endif /* _KERNEL */
    202   1.1  fredette 
    203   1.1  fredette #endif /* _HPPA_CPUFUNC_H_ */
    204