intr.h revision 1.3 1 1.3 riastrad /* $NetBSD: intr.h,v 1.3 2023/07/11 11:05:09 riastradh Exp $ */
2 1.1 skrll /* $OpenBSD: intr.h,v 1.26 2009/12/29 13:11:40 jsing Exp $ */
3 1.1 skrll
4 1.1 skrll /*-
5 1.1 skrll * Copyright (c) 1998, 2001, 2002 The NetBSD Foundation, Inc.
6 1.1 skrll * All rights reserved.
7 1.1 skrll *
8 1.1 skrll * This code is derived from software contributed to The NetBSD Foundation
9 1.1 skrll * by Charles M. Hannum, and by Jason R. Thorpe, and by Matthew Fredette.
10 1.1 skrll *
11 1.1 skrll * Redistribution and use in source and binary forms, with or without
12 1.1 skrll * modification, are permitted provided that the following conditions
13 1.1 skrll * are met:
14 1.1 skrll * 1. Redistributions of source code must retain the above copyright
15 1.1 skrll * notice, this list of conditions and the following disclaimer.
16 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 skrll * notice, this list of conditions and the following disclaimer in the
18 1.1 skrll * documentation and/or other materials provided with the distribution.
19 1.1 skrll *
20 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 skrll * POSSIBILITY OF SUCH DAMAGE.
31 1.1 skrll */
32 1.1 skrll
33 1.1 skrll #ifndef _HPPA_INTR_H_
34 1.1 skrll #define _HPPA_INTR_H_
35 1.1 skrll
36 1.1 skrll #include <machine/psl.h>
37 1.1 skrll #include <machine/intrdefs.h>
38 1.1 skrll
39 1.1 skrll #include <sys/evcnt.h>
40 1.1 skrll
41 1.1 skrll #ifndef _LOCORE
42 1.1 skrll
43 1.3 riastrad #if defined(_KERNEL) || defined(_KMEMUSER)
44 1.3 riastrad typedef struct {
45 1.3 riastrad ipl_t _ipl;
46 1.3 riastrad } ipl_cookie_t;
47 1.3 riastrad #endif
48 1.3 riastrad
49 1.1 skrll #ifdef _KERNEL
50 1.1 skrll
51 1.1 skrll struct cpu_info;
52 1.1 skrll
53 1.1 skrll /*
54 1.1 skrll * The maximum number of bits in a cpl value/spl mask, the maximum number of
55 1.1 skrll * bits in an interrupt request register, and the maximum number of interrupt
56 1.1 skrll * registers.
57 1.1 skrll */
58 1.1 skrll #define HPPA_INTERRUPT_BITS (32)
59 1.1 skrll #define CPU_NINTS HPPA_INTERRUPT_BITS /* Use this one */
60 1.1 skrll
61 1.1 skrll /*
62 1.1 skrll * This describes one HPPA interrupt register.
63 1.1 skrll */
64 1.1 skrll struct hppa_interrupt_register {
65 1.1 skrll bool ir_iscpu;
66 1.1 skrll const char *ir_name; /* name for this intr reg */
67 1.1 skrll struct cpu_info *ir_ci; /* cpu this intr reg */
68 1.1 skrll
69 1.1 skrll /*
70 1.1 skrll * The virtual address of the mask, request and level
71 1.1 skrll * registers.
72 1.1 skrll */
73 1.1 skrll volatile int *ir_mask;
74 1.1 skrll volatile int *ir_req;
75 1.1 skrll volatile int *ir_level;
76 1.1 skrll
77 1.1 skrll /*
78 1.1 skrll * This array has one entry for each bit in the interrupt request
79 1.1 skrll * register.
80 1.1 skrll *
81 1.1 skrll * If the 24 most significant bits are set, the low 8 bits are the
82 1.1 skrll * index of the hppa_interrupt_register that this interrupt bit leads
83 1.1 skrll * to, with zero meaning that the interrupt bit is unused.
84 1.1 skrll *
85 1.1 skrll * Otherwise these bits correspond to hppa_interrupt_bits. That is,
86 1.1 skrll * these bits are ORed to ipending_new in hppa_intr_ipending() when
87 1.1 skrll * an interrupt happens.
88 1.1 skrll *
89 1.1 skrll * Note that this array is indexed by HP bit number, *not* by "normal"
90 1.1 skrll * bit number. In other words, the least significant bit in the inter-
91 1.1 skrll * rupt register corresponds to array index 31.
92 1.1 skrll */
93 1.1 skrll
94 1.1 skrll unsigned int ir_bits_map[HPPA_INTERRUPT_BITS];
95 1.1 skrll
96 1.1 skrll #define IR_BIT_MASK 0xffffff00
97 1.1 skrll #define IR_BIT_REG(x) (IR_BIT_MASK | (x))
98 1.1 skrll #define IR_BIT_UNUSED IR_BIT_REG(0)
99 1.1 skrll #define IR_BIT_USED_P(x) (((x) & IR_BIT_MASK) != IR_BIT_MASK)
100 1.1 skrll #define IR_BIT_NESTED_P(x) (((x) & IR_BIT_MASK) == IR_BIT_MASK)
101 1.2 macallan /* true if not used for interrupt or nested interrupt register */
102 1.2 macallan #define IR_BIT_UNUSED_P(x) ((x) == IR_BIT_MASK)
103 1.1 skrll
104 1.1 skrll int ir_bits; /* mask of allocatable bit numbers */
105 1.1 skrll int ir_rbits; /* mask of reserved (for lasi/asp) bit numbers */
106 1.1 skrll };
107 1.1 skrll
108 1.1 skrll struct hppa_interrupt_bit {
109 1.1 skrll
110 1.1 skrll /*
111 1.1 skrll * The interrupt register this bit is in. Some handlers, e.g
112 1.1 skrll * apic_intr, don't make use of an hppa_interrupt_register, but are
113 1.1 skrll * nested.
114 1.1 skrll */
115 1.1 skrll struct hppa_interrupt_register *ib_reg;
116 1.1 skrll
117 1.1 skrll /*
118 1.1 skrll * The priority level associated with this bit, e.g, IPL_BIO, IPL_NET,
119 1.1 skrll * etc.
120 1.1 skrll */
121 1.1 skrll int ib_ipl;
122 1.1 skrll
123 1.1 skrll /*
124 1.1 skrll * The spl mask for this bit. This starts out as the spl bit assigned
125 1.1 skrll * to this particular interrupt, and later gets fleshed out by the mask
126 1.1 skrll * calculator to be the full mask that we need to raise spl to when we
127 1.1 skrll * get this interrupt.
128 1.1 skrll */
129 1.1 skrll int ib_spl;
130 1.1 skrll
131 1.1 skrll /* The interrupt name. */
132 1.1 skrll char ib_name[16];
133 1.1 skrll
134 1.1 skrll /* The interrupt event count. */
135 1.1 skrll struct evcnt ib_evcnt;
136 1.1 skrll
137 1.1 skrll /*
138 1.1 skrll * The interrupt handler and argument for this bit. If the argument is
139 1.1 skrll * NULL, the handler gets the trapframe.
140 1.1 skrll */
141 1.1 skrll int (*ib_handler)(void *);
142 1.1 skrll void *ib_arg;
143 1.1 skrll
144 1.1 skrll };
145 1.1 skrll
146 1.1 skrll void hppa_intr_bootstrap(void);
147 1.1 skrll void hppa_intr_initialise(struct cpu_info *);
148 1.1 skrll void hppa_interrupt_register_establish(struct cpu_info *,
149 1.1 skrll struct hppa_interrupt_register *);
150 1.1 skrll void * hppa_intr_establish(int, int (*)(void *), void *,
151 1.1 skrll struct hppa_interrupt_register *, int);
152 1.1 skrll int hppa_intr_allocate_bit(struct hppa_interrupt_register *, int);
153 1.1 skrll void hppa_intr_enable(void);
154 1.1 skrll
155 1.1 skrll /* splraise()/spllower() are in locore.S */
156 1.1 skrll int splraise(int);
157 1.1 skrll void spllower(int);
158 1.1 skrll
159 1.1 skrll /*
160 1.1 skrll * Miscellaneous
161 1.1 skrll */
162 1.1 skrll #define spl0() spllower(0)
163 1.1 skrll #define splx(x) spllower(x)
164 1.1 skrll
165 1.1 skrll typedef int ipl_t;
166 1.1 skrll
167 1.1 skrll static inline ipl_cookie_t
168 1.1 skrll makeiplcookie(ipl_t ipl)
169 1.1 skrll {
170 1.1 skrll
171 1.1 skrll return (ipl_cookie_t){._ipl = ipl};
172 1.1 skrll }
173 1.1 skrll
174 1.1 skrll static inline int
175 1.1 skrll splraiseipl(ipl_cookie_t icookie)
176 1.1 skrll {
177 1.1 skrll
178 1.1 skrll return splraise(icookie._ipl);
179 1.1 skrll }
180 1.1 skrll
181 1.1 skrll #include <sys/spl.h>
182 1.1 skrll #endif
183 1.1 skrll
184 1.1 skrll #define setsoftast(l) ((l)->l_md.md_astpending = 1)
185 1.1 skrll
186 1.1 skrll #ifdef MULTIPROCESSOR
187 1.1 skrll
188 1.1 skrll struct cpu_info;
189 1.1 skrll
190 1.1 skrll void hppa_ipi_init(struct cpu_info *);
191 1.1 skrll int hppa_ipi_intr(void *arg);
192 1.1 skrll int hppa_ipi_send(struct cpu_info *, u_long);
193 1.1 skrll int hppa_ipi_broadcast(u_long);
194 1.1 skrll #endif
195 1.1 skrll
196 1.1 skrll #endif /* !_LOCORE */
197 1.1 skrll
198 1.1 skrll #endif /* !_HPPA_INTR_H_ */
199