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lock.h revision 1.11.18.2 
      1 /* 	$NetBSD: lock.h,v 1.11.18.2 2007/08/23 07:49:51 skrll Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center, and Matthew Fredette.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Machine-dependent spin lock operations.
     42  */
     43 
     44 #ifndef _HPPA_LOCK_H_
     45 #define	_HPPA_LOCK_H_
     46 
     47 #define HPPA_LDCW_ALIGN	16
     48 
     49 #define __SIMPLELOCK_ALIGN(p) \
     50     (volatile unsigned long *)(((uintptr_t)(p) + HPPA_LDCW_ALIGN - 1) & \
     51     ~(HPPA_LDCW_ALIGN - 1))
     52 
     53 #define __SIMPLELOCK_RAW_LOCKED		0
     54 #define __SIMPLELOCK_RAW_UNLOCKED	1
     55 
     56 static __inline int
     57 __SIMPLELOCK_LOCKED_P(__cpu_simple_lock_t *__ptr)
     58 {
     59 	return *__SIMPLELOCK_ALIGN(__ptr) == __SIMPLELOCK_RAW_LOCKED;
     60 }
     61 
     62 static __inline int
     63 __SIMPLELOCK_UNLOCKED_P(__cpu_simple_lock_t *__ptr)
     64 {
     65 	return *__SIMPLELOCK_ALIGN(__ptr) == __SIMPLELOCK_RAW_UNLOCKED;
     66 }
     67 
     68 static __inline int
     69 __ldcw(volatile unsigned long *__ptr)
     70 {
     71 	int __val;
     72 
     73 	__asm volatile("ldcw 0(%1), %0"
     74 	    : "=r" (__val) : "r" (__ptr)
     75 	    : "memory");
     76 
     77 	return __val;
     78 }
     79 
     80 static __inline void
     81 __sync(void)
     82 {
     83 
     84 	__asm volatile("sync\n"
     85 		: /* no outputs */
     86 		: /* no inputs */
     87 		: "memory");
     88 }
     89 
     90 static __inline void
     91 __cpu_simple_lock_init(__cpu_simple_lock_t *alp)
     92 {
     93 	__cpu_simple_lock_t ul = __SIMPLELOCK_UNLOCKED;
     94 
     95 	*alp = ul;
     96 	__sync();
     97 }
     98 
     99 static __inline void
    100 __cpu_simple_lock(__cpu_simple_lock_t *alp)
    101 {
    102 	volatile unsigned long *__aptr = __SIMPLELOCK_ALIGN(alp);
    103 
    104 	/*
    105 	 * Note, if we detect that the lock is held when
    106 	 * we do the initial load-clear-word, we spin using
    107 	 * a non-locked load to save the coherency logic
    108 	 * some work.
    109 	 */
    110 
    111 	while (__ldcw(__aptr) == __SIMPLELOCK_RAW_LOCKED)
    112 		while (*__aptr == __SIMPLELOCK_RAW_LOCKED)
    113 			;
    114 }
    115 
    116 static __inline int
    117 __cpu_simple_lock_try(__cpu_simple_lock_t *alp)
    118 {
    119 	volatile unsigned long *__aptr = __SIMPLELOCK_ALIGN(alp);
    120 
    121 	return (__ldcw(__aptr) != __SIMPLELOCK_RAW_LOCKED);
    122 }
    123 
    124 static __inline void
    125 __cpu_simple_unlock(__cpu_simple_lock_t *alp)
    126 {
    127 	volatile unsigned long *__aptr = __SIMPLELOCK_ALIGN(alp);
    128 
    129 	__sync();
    130 	*__aptr = __SIMPLELOCK_RAW_UNLOCKED;
    131 }
    132 
    133 static __inline void
    134 __cpu_simple_lock_set(__cpu_simple_lock_t *alp)
    135 {
    136 	volatile unsigned long *__aptr = __SIMPLELOCK_ALIGN(alp);
    137 
    138 	*__aptr = __SIMPLELOCK_RAW_LOCKED;
    139 }
    140 
    141 static __inline void
    142 __cpu_simple_lock_clear(__cpu_simple_lock_t *alp)
    143 {
    144 	volatile unsigned long *__aptr = __SIMPLELOCK_ALIGN(alp);
    145 
    146 	*__aptr = __SIMPLELOCK_RAW_UNLOCKED;
    147 }
    148 
    149 static __inline void
    150 mb_read(void)
    151 {
    152 	__sync();
    153 }
    154 
    155 static __inline void
    156 mb_write(void)
    157 {
    158 	__sync();
    159 }
    160 
    161 static __inline void
    162 mb_memory(void)
    163 {
    164 	__sync();
    165 }
    166 
    167 #endif /* _HPPA_LOCK_H_ */
    168