dfmpy.c revision 1.5 1 1.5 skrll /* $NetBSD: dfmpy.c,v 1.5 2012/02/04 17:03:09 skrll Exp $ */
2 1.1 fredette
3 1.1 fredette /* $OpenBSD: dfmpy.c,v 1.4 2001/03/29 03:58:17 mickey Exp $ */
4 1.1 fredette
5 1.1 fredette /*
6 1.1 fredette * Copyright 1996 1995 by Open Software Foundation, Inc.
7 1.1 fredette * All Rights Reserved
8 1.1 fredette *
9 1.1 fredette * Permission to use, copy, modify, and distribute this software and
10 1.1 fredette * its documentation for any purpose and without fee is hereby granted,
11 1.1 fredette * provided that the above copyright notice appears in all copies and
12 1.1 fredette * that both the copyright notice and this permission notice appear in
13 1.1 fredette * supporting documentation.
14 1.1 fredette *
15 1.1 fredette * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
16 1.1 fredette * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
17 1.1 fredette * FOR A PARTICULAR PURPOSE.
18 1.1 fredette *
19 1.1 fredette * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
20 1.1 fredette * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
21 1.1 fredette * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
22 1.1 fredette * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
23 1.1 fredette * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
24 1.1 fredette *
25 1.1 fredette */
26 1.1 fredette /*
27 1.1 fredette * pmk1.1
28 1.1 fredette */
29 1.1 fredette /*
30 1.1 fredette * (c) Copyright 1986 HEWLETT-PACKARD COMPANY
31 1.1 fredette *
32 1.1 fredette * To anyone who acknowledges that this file is provided "AS IS"
33 1.1 fredette * without any express or implied warranty:
34 1.1 fredette * permission to use, copy, modify, and distribute this file
35 1.1 fredette * for any purpose is hereby granted without fee, provided that
36 1.1 fredette * the above copyright notice and this notice appears in all
37 1.1 fredette * copies, and that the name of Hewlett-Packard Company not be
38 1.1 fredette * used in advertising or publicity pertaining to distribution
39 1.1 fredette * of the software without specific, written prior permission.
40 1.1 fredette * Hewlett-Packard Company makes no representations about the
41 1.1 fredette * suitability of this software for any purpose.
42 1.1 fredette */
43 1.2 lukem
44 1.2 lukem #include <sys/cdefs.h>
45 1.5 skrll __KERNEL_RCSID(0, "$NetBSD: dfmpy.c,v 1.5 2012/02/04 17:03:09 skrll Exp $");
46 1.1 fredette
47 1.1 fredette #include "../spmath/float.h"
48 1.1 fredette #include "../spmath/dbl_float.h"
49 1.1 fredette
50 1.1 fredette /*
51 1.1 fredette * Double Precision Floating-point Multiply
52 1.1 fredette */
53 1.1 fredette
54 1.1 fredette int
55 1.5 skrll dbl_fmpy(dbl_floating_point *srcptr1, dbl_floating_point *srcptr2,
56 1.5 skrll dbl_floating_point *dstptr, unsigned int *status)
57 1.1 fredette {
58 1.1 fredette register unsigned int opnd1p1, opnd1p2, opnd2p1, opnd2p2;
59 1.1 fredette register unsigned int opnd3p1, opnd3p2, resultp1, resultp2;
60 1.1 fredette register int dest_exponent, count;
61 1.4 thorpej register int inexact = false, guardbit = false, stickybit = false;
62 1.1 fredette int is_tiny;
63 1.1 fredette
64 1.1 fredette Dbl_copyfromptr(srcptr1,opnd1p1,opnd1p2);
65 1.1 fredette Dbl_copyfromptr(srcptr2,opnd2p1,opnd2p2);
66 1.1 fredette
67 1.1 fredette /*
68 1.1 fredette * set sign bit of result
69 1.1 fredette */
70 1.1 fredette if (Dbl_sign(opnd1p1) ^ Dbl_sign(opnd2p1))
71 1.1 fredette Dbl_setnegativezerop1(resultp1);
72 1.1 fredette else Dbl_setzerop1(resultp1);
73 1.1 fredette /*
74 1.1 fredette * check first operand for NaN's or infinity
75 1.1 fredette */
76 1.1 fredette if (Dbl_isinfinity_exponent(opnd1p1)) {
77 1.1 fredette if (Dbl_iszero_mantissa(opnd1p1,opnd1p2)) {
78 1.1 fredette if (Dbl_isnotnan(opnd2p1,opnd2p2)) {
79 1.1 fredette if (Dbl_iszero_exponentmantissa(opnd2p1,opnd2p2)) {
80 1.1 fredette /*
81 1.1 fredette * invalid since operands are infinity
82 1.1 fredette * and zero
83 1.1 fredette */
84 1.1 fredette if (Is_invalidtrap_enabled())
85 1.1 fredette return(INVALIDEXCEPTION);
86 1.1 fredette Set_invalidflag();
87 1.1 fredette Dbl_makequietnan(resultp1,resultp2);
88 1.1 fredette Dbl_copytoptr(resultp1,resultp2,dstptr);
89 1.1 fredette return(NOEXCEPTION);
90 1.1 fredette }
91 1.1 fredette /*
92 1.1 fredette * return infinity
93 1.1 fredette */
94 1.1 fredette Dbl_setinfinity_exponentmantissa(resultp1,resultp2);
95 1.1 fredette Dbl_copytoptr(resultp1,resultp2,dstptr);
96 1.1 fredette return(NOEXCEPTION);
97 1.1 fredette }
98 1.1 fredette }
99 1.1 fredette else {
100 1.1 fredette /*
101 1.1 fredette * is NaN; signaling or quiet?
102 1.1 fredette */
103 1.1 fredette if (Dbl_isone_signaling(opnd1p1)) {
104 1.1 fredette /* trap if INVALIDTRAP enabled */
105 1.1 fredette if (Is_invalidtrap_enabled())
106 1.1 fredette return(INVALIDEXCEPTION);
107 1.1 fredette /* make NaN quiet */
108 1.1 fredette Set_invalidflag();
109 1.1 fredette Dbl_set_quiet(opnd1p1);
110 1.1 fredette }
111 1.1 fredette /*
112 1.1 fredette * is second operand a signaling NaN?
113 1.1 fredette */
114 1.1 fredette else if (Dbl_is_signalingnan(opnd2p1)) {
115 1.1 fredette /* trap if INVALIDTRAP enabled */
116 1.1 fredette if (Is_invalidtrap_enabled())
117 1.1 fredette return(INVALIDEXCEPTION);
118 1.1 fredette /* make NaN quiet */
119 1.1 fredette Set_invalidflag();
120 1.1 fredette Dbl_set_quiet(opnd2p1);
121 1.1 fredette Dbl_copytoptr(opnd2p1,opnd2p2,dstptr);
122 1.1 fredette return(NOEXCEPTION);
123 1.1 fredette }
124 1.1 fredette /*
125 1.1 fredette * return quiet NaN
126 1.1 fredette */
127 1.1 fredette Dbl_copytoptr(opnd1p1,opnd1p2,dstptr);
128 1.1 fredette return(NOEXCEPTION);
129 1.1 fredette }
130 1.1 fredette }
131 1.1 fredette /*
132 1.1 fredette * check second operand for NaN's or infinity
133 1.1 fredette */
134 1.1 fredette if (Dbl_isinfinity_exponent(opnd2p1)) {
135 1.1 fredette if (Dbl_iszero_mantissa(opnd2p1,opnd2p2)) {
136 1.1 fredette if (Dbl_iszero_exponentmantissa(opnd1p1,opnd1p2)) {
137 1.1 fredette /* invalid since operands are zero & infinity */
138 1.1 fredette if (Is_invalidtrap_enabled())
139 1.1 fredette return(INVALIDEXCEPTION);
140 1.1 fredette Set_invalidflag();
141 1.1 fredette Dbl_makequietnan(opnd2p1,opnd2p2);
142 1.1 fredette Dbl_copytoptr(opnd2p1,opnd2p2,dstptr);
143 1.1 fredette return(NOEXCEPTION);
144 1.1 fredette }
145 1.1 fredette /*
146 1.1 fredette * return infinity
147 1.1 fredette */
148 1.1 fredette Dbl_setinfinity_exponentmantissa(resultp1,resultp2);
149 1.1 fredette Dbl_copytoptr(resultp1,resultp2,dstptr);
150 1.1 fredette return(NOEXCEPTION);
151 1.1 fredette }
152 1.1 fredette /*
153 1.1 fredette * is NaN; signaling or quiet?
154 1.1 fredette */
155 1.1 fredette if (Dbl_isone_signaling(opnd2p1)) {
156 1.1 fredette /* trap if INVALIDTRAP enabled */
157 1.1 fredette if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION);
158 1.1 fredette /* make NaN quiet */
159 1.1 fredette Set_invalidflag();
160 1.1 fredette Dbl_set_quiet(opnd2p1);
161 1.1 fredette }
162 1.1 fredette /*
163 1.1 fredette * return quiet NaN
164 1.1 fredette */
165 1.1 fredette Dbl_copytoptr(opnd2p1,opnd2p2,dstptr);
166 1.1 fredette return(NOEXCEPTION);
167 1.1 fredette }
168 1.1 fredette /*
169 1.1 fredette * Generate exponent
170 1.1 fredette */
171 1.1 fredette dest_exponent = Dbl_exponent(opnd1p1) + Dbl_exponent(opnd2p1) -DBL_BIAS;
172 1.1 fredette
173 1.1 fredette /*
174 1.1 fredette * Generate mantissa
175 1.1 fredette */
176 1.1 fredette if (Dbl_isnotzero_exponent(opnd1p1)) {
177 1.1 fredette /* set hidden bit */
178 1.1 fredette Dbl_clear_signexponent_set_hidden(opnd1p1);
179 1.1 fredette }
180 1.1 fredette else {
181 1.1 fredette /* check for zero */
182 1.1 fredette if (Dbl_iszero_mantissa(opnd1p1,opnd1p2)) {
183 1.1 fredette Dbl_setzero_exponentmantissa(resultp1,resultp2);
184 1.1 fredette Dbl_copytoptr(resultp1,resultp2,dstptr);
185 1.1 fredette return(NOEXCEPTION);
186 1.1 fredette }
187 1.1 fredette /* is denormalized, adjust exponent */
188 1.1 fredette Dbl_clear_signexponent(opnd1p1);
189 1.1 fredette Dbl_leftshiftby1(opnd1p1,opnd1p2);
190 1.1 fredette Dbl_normalize(opnd1p1,opnd1p2,dest_exponent);
191 1.1 fredette }
192 1.1 fredette /* opnd2 needs to have hidden bit set with msb in hidden bit */
193 1.1 fredette if (Dbl_isnotzero_exponent(opnd2p1)) {
194 1.1 fredette Dbl_clear_signexponent_set_hidden(opnd2p1);
195 1.1 fredette }
196 1.1 fredette else {
197 1.1 fredette /* check for zero */
198 1.1 fredette if (Dbl_iszero_mantissa(opnd2p1,opnd2p2)) {
199 1.1 fredette Dbl_setzero_exponentmantissa(resultp1,resultp2);
200 1.1 fredette Dbl_copytoptr(resultp1,resultp2,dstptr);
201 1.1 fredette return(NOEXCEPTION);
202 1.1 fredette }
203 1.1 fredette /* is denormalized; want to normalize */
204 1.1 fredette Dbl_clear_signexponent(opnd2p1);
205 1.1 fredette Dbl_leftshiftby1(opnd2p1,opnd2p2);
206 1.1 fredette Dbl_normalize(opnd2p1,opnd2p2,dest_exponent);
207 1.1 fredette }
208 1.1 fredette
209 1.1 fredette /* Multiply two source mantissas together */
210 1.1 fredette
211 1.1 fredette /* make room for guard bits */
212 1.1 fredette Dbl_leftshiftby7(opnd2p1,opnd2p2);
213 1.1 fredette Dbl_setzero(opnd3p1,opnd3p2);
214 1.1 fredette /*
215 1.1 fredette * Four bits at a time are inspected in each loop, and a
216 1.1 fredette * simple shift and add multiply algorithm is used.
217 1.1 fredette */
218 1.1 fredette for (count=1;count<=DBL_P;count+=4) {
219 1.1 fredette stickybit |= Dlow4p2(opnd3p2);
220 1.1 fredette Dbl_rightshiftby4(opnd3p1,opnd3p2);
221 1.1 fredette if (Dbit28p2(opnd1p2)) {
222 1.1 fredette /* Twoword_add should be an ADDC followed by an ADD. */
223 1.1 fredette Twoword_add(opnd3p1, opnd3p2, opnd2p1<<3 | opnd2p2>>29,
224 1.1 fredette opnd2p2<<3);
225 1.1 fredette }
226 1.1 fredette if (Dbit29p2(opnd1p2)) {
227 1.1 fredette Twoword_add(opnd3p1, opnd3p2, opnd2p1<<2 | opnd2p2>>30,
228 1.1 fredette opnd2p2<<2);
229 1.1 fredette }
230 1.1 fredette if (Dbit30p2(opnd1p2)) {
231 1.1 fredette Twoword_add(opnd3p1, opnd3p2, opnd2p1<<1 | opnd2p2>>31,
232 1.1 fredette opnd2p2<<1);
233 1.1 fredette }
234 1.1 fredette if (Dbit31p2(opnd1p2)) {
235 1.1 fredette Twoword_add(opnd3p1, opnd3p2, opnd2p1, opnd2p2);
236 1.1 fredette }
237 1.1 fredette Dbl_rightshiftby4(opnd1p1,opnd1p2);
238 1.1 fredette }
239 1.1 fredette if (Dbit3p1(opnd3p1)==0) {
240 1.1 fredette Dbl_leftshiftby1(opnd3p1,opnd3p2);
241 1.1 fredette }
242 1.1 fredette else {
243 1.1 fredette /* result mantissa >= 2. */
244 1.1 fredette dest_exponent++;
245 1.1 fredette }
246 1.1 fredette /* check for denormalized result */
247 1.1 fredette while (Dbit3p1(opnd3p1)==0) {
248 1.1 fredette Dbl_leftshiftby1(opnd3p1,opnd3p2);
249 1.1 fredette dest_exponent--;
250 1.1 fredette }
251 1.1 fredette /*
252 1.1 fredette * check for guard, sticky and inexact bits
253 1.1 fredette */
254 1.1 fredette stickybit |= Dallp2(opnd3p2) << 25;
255 1.1 fredette guardbit = (Dallp2(opnd3p2) << 24) >> 31;
256 1.1 fredette inexact = guardbit | stickybit;
257 1.1 fredette
258 1.1 fredette /* align result mantissa */
259 1.1 fredette Dbl_rightshiftby8(opnd3p1,opnd3p2);
260 1.1 fredette
261 1.1 fredette /*
262 1.1 fredette * round result
263 1.1 fredette */
264 1.1 fredette if (inexact && (dest_exponent>0 || Is_underflowtrap_enabled())) {
265 1.1 fredette Dbl_clear_signexponent(opnd3p1);
266 1.1 fredette switch (Rounding_mode()) {
267 1.1 fredette case ROUNDPLUS:
268 1.1 fredette if (Dbl_iszero_sign(resultp1))
269 1.1 fredette Dbl_increment(opnd3p1,opnd3p2);
270 1.1 fredette break;
271 1.1 fredette case ROUNDMINUS:
272 1.1 fredette if (Dbl_isone_sign(resultp1))
273 1.1 fredette Dbl_increment(opnd3p1,opnd3p2);
274 1.1 fredette break;
275 1.1 fredette case ROUNDNEAREST:
276 1.1 fredette if (guardbit &&
277 1.1 fredette (stickybit || Dbl_isone_lowmantissap2(opnd3p2)))
278 1.1 fredette Dbl_increment(opnd3p1,opnd3p2);
279 1.1 fredette break;
280 1.1 fredette }
281 1.1 fredette if (Dbl_isone_hidden(opnd3p1)) dest_exponent++;
282 1.1 fredette }
283 1.1 fredette Dbl_set_mantissa(resultp1,resultp2,opnd3p1,opnd3p2);
284 1.1 fredette
285 1.1 fredette /*
286 1.1 fredette * Test for overflow
287 1.1 fredette */
288 1.1 fredette if (dest_exponent >= DBL_INFINITY_EXPONENT) {
289 1.1 fredette /* trap if OVERFLOWTRAP enabled */
290 1.1 fredette if (Is_overflowtrap_enabled()) {
291 1.1 fredette /*
292 1.1 fredette * Adjust bias of result
293 1.1 fredette */
294 1.1 fredette Dbl_setwrapped_exponent(resultp1,dest_exponent,ovfl);
295 1.1 fredette Dbl_copytoptr(resultp1,resultp2,dstptr);
296 1.1 fredette if (inexact) {
297 1.1 fredette if (Is_inexacttrap_enabled())
298 1.1 fredette return (OVERFLOWEXCEPTION | INEXACTEXCEPTION);
299 1.1 fredette else
300 1.1 fredette Set_inexactflag();
301 1.1 fredette }
302 1.1 fredette return (OVERFLOWEXCEPTION);
303 1.1 fredette }
304 1.4 thorpej inexact = true;
305 1.1 fredette Set_overflowflag();
306 1.1 fredette /* set result to infinity or largest number */
307 1.1 fredette Dbl_setoverflow(resultp1,resultp2);
308 1.1 fredette }
309 1.1 fredette /*
310 1.1 fredette * Test for underflow
311 1.1 fredette */
312 1.1 fredette else if (dest_exponent <= 0) {
313 1.1 fredette /* trap if UNDERFLOWTRAP enabled */
314 1.1 fredette if (Is_underflowtrap_enabled()) {
315 1.1 fredette /*
316 1.1 fredette * Adjust bias of result
317 1.1 fredette */
318 1.1 fredette Dbl_setwrapped_exponent(resultp1,dest_exponent,unfl);
319 1.1 fredette Dbl_copytoptr(resultp1,resultp2,dstptr);
320 1.1 fredette if (inexact) {
321 1.1 fredette if (Is_inexacttrap_enabled())
322 1.1 fredette return (UNDERFLOWEXCEPTION | INEXACTEXCEPTION);
323 1.1 fredette else
324 1.1 fredette Set_inexactflag();
325 1.1 fredette }
326 1.1 fredette return (UNDERFLOWEXCEPTION);
327 1.1 fredette }
328 1.1 fredette
329 1.1 fredette /* Determine if should set underflow flag */
330 1.4 thorpej is_tiny = true;
331 1.1 fredette if (dest_exponent == 0 && inexact) {
332 1.1 fredette switch (Rounding_mode()) {
333 1.1 fredette case ROUNDPLUS:
334 1.1 fredette if (Dbl_iszero_sign(resultp1)) {
335 1.1 fredette Dbl_increment(opnd3p1,opnd3p2);
336 1.1 fredette if (Dbl_isone_hiddenoverflow(opnd3p1))
337 1.4 thorpej is_tiny = false;
338 1.1 fredette Dbl_decrement(opnd3p1,opnd3p2);
339 1.1 fredette }
340 1.1 fredette break;
341 1.1 fredette case ROUNDMINUS:
342 1.1 fredette if (Dbl_isone_sign(resultp1)) {
343 1.1 fredette Dbl_increment(opnd3p1,opnd3p2);
344 1.1 fredette if (Dbl_isone_hiddenoverflow(opnd3p1))
345 1.4 thorpej is_tiny = false;
346 1.1 fredette Dbl_decrement(opnd3p1,opnd3p2);
347 1.1 fredette }
348 1.1 fredette break;
349 1.1 fredette case ROUNDNEAREST:
350 1.1 fredette if (guardbit && (stickybit ||
351 1.1 fredette Dbl_isone_lowmantissap2(opnd3p2))) {
352 1.1 fredette Dbl_increment(opnd3p1,opnd3p2);
353 1.1 fredette if (Dbl_isone_hiddenoverflow(opnd3p1))
354 1.4 thorpej is_tiny = false;
355 1.1 fredette Dbl_decrement(opnd3p1,opnd3p2);
356 1.1 fredette }
357 1.1 fredette break;
358 1.1 fredette }
359 1.1 fredette }
360 1.1 fredette
361 1.1 fredette /*
362 1.1 fredette * denormalize result or set to signed zero
363 1.1 fredette */
364 1.1 fredette stickybit = inexact;
365 1.1 fredette Dbl_denormalize(opnd3p1,opnd3p2,dest_exponent,guardbit,
366 1.1 fredette stickybit,inexact);
367 1.1 fredette
368 1.1 fredette /* return zero or smallest number */
369 1.1 fredette if (inexact) {
370 1.1 fredette switch (Rounding_mode()) {
371 1.1 fredette case ROUNDPLUS:
372 1.1 fredette if (Dbl_iszero_sign(resultp1)) {
373 1.1 fredette Dbl_increment(opnd3p1,opnd3p2);
374 1.1 fredette }
375 1.1 fredette break;
376 1.1 fredette case ROUNDMINUS:
377 1.1 fredette if (Dbl_isone_sign(resultp1)) {
378 1.1 fredette Dbl_increment(opnd3p1,opnd3p2);
379 1.1 fredette }
380 1.1 fredette break;
381 1.1 fredette case ROUNDNEAREST:
382 1.1 fredette if (guardbit && (stickybit ||
383 1.1 fredette Dbl_isone_lowmantissap2(opnd3p2))) {
384 1.1 fredette Dbl_increment(opnd3p1,opnd3p2);
385 1.1 fredette }
386 1.1 fredette break;
387 1.1 fredette }
388 1.1 fredette if (is_tiny) Set_underflowflag();
389 1.1 fredette }
390 1.1 fredette Dbl_set_exponentmantissa(resultp1,resultp2,opnd3p1,opnd3p2);
391 1.1 fredette }
392 1.1 fredette else Dbl_set_exponent(resultp1,dest_exponent);
393 1.1 fredette /* check for inexact */
394 1.1 fredette Dbl_copytoptr(resultp1,resultp2,dstptr);
395 1.1 fredette if (inexact) {
396 1.1 fredette if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
397 1.1 fredette else Set_inexactflag();
398 1.1 fredette }
399 1.1 fredette return(NOEXCEPTION);
400 1.1 fredette }
401